6648 - bit-shift instructions in Mu

I'm not happy with the names.

4 files changed, 152 insertions, 0 deletions

diff --git a/apps/mu b/apps/mu
index 2cfa2ea6..f91332b4 100755
--- a/apps/mu
+++ b/apps/mu
Binary files differdiff --git a/apps/mu.subx b/apps/mu.subx
index 01ba959b..d6f68b14 100644
--- a/apps/mu.subx
+++ b/apps/mu.subx
@@ -15811,6 +15811,114 @@ _Primitive-xor-lit-with-mem:  # (payload primitive)
     0/imm32/no-disp32
     0/imm32/output-is-write-only
     0x11/imm32/alloc-id:fake
+    _Primitive-shift-reg-left-by-lit/imm32/next
+_Primitive-shift-reg-left-by-lit:  # (payload primitive)
+    0x11/imm32/alloc-id:fake:payload
+    # var1/reg <- shift-left lit => c1/shift 4/subop/left var1/rm32 lit/imm32
+    0x11/imm32/alloc-id:fake
+    _string-shift-left/imm32/name
+    0x11/imm32/alloc-id:fake
+    Single-lit-var/imm32/inouts
+    0x11/imm32/alloc-id:fake
+    Single-int-var-in-some-register/imm32/outputs
+    0x11/imm32/alloc-id:fake
+    _string_c1_subop_shift_left/imm32/subx-name
+    3/imm32/rm32-is-first-output
+    0/imm32/no-r32
+    1/imm32/imm32-is-first-inout
+    0/imm32/no-disp32
+    0/imm32/output-is-write-only
+    0x11/imm32/alloc-id:fake
+    _Primitive-shift-reg-right-by-lit/imm32/next
+_Primitive-shift-reg-right-by-lit:  # (payload primitive)
+    0x11/imm32/alloc-id:fake:payload
+    # var1/reg <- shift-right lit => c1/shift 5/subop/right var1/rm32 lit/imm32
+    0x11/imm32/alloc-id:fake
+    _string-shift-right/imm32/name
+    0x11/imm32/alloc-id:fake
+    Single-lit-var/imm32/inouts
+    0x11/imm32/alloc-id:fake
+    Single-int-var-in-some-register/imm32/outputs
+    0x11/imm32/alloc-id:fake
+    _string_c1_subop_shift_right_padding_zeroes/imm32/subx-name
+    3/imm32/rm32-is-first-output
+    0/imm32/no-r32
+    1/imm32/imm32-is-first-inout
+    0/imm32/no-disp32
+    0/imm32/output-is-write-only
+    0x11/imm32/alloc-id:fake
+    _Primitive-shift-reg-right-signed-by-lit/imm32/next
+_Primitive-shift-reg-right-signed-by-lit:  # (payload primitive)
+    0x11/imm32/alloc-id:fake:payload
+    # var1/reg <- shift-right-signed lit => c1/shift 7/subop/right-preserving-sign var1/rm32 lit/imm32
+    0x11/imm32/alloc-id:fake
+    _string-shift-right-signed/imm32/name
+    0x11/imm32/alloc-id:fake
+    Single-lit-var/imm32/inouts
+    0x11/imm32/alloc-id:fake
+    Single-int-var-in-some-register/imm32/outputs
+    0x11/imm32/alloc-id:fake
+    _string_c1_subop_shift_right_preserving_sign/imm32/subx-name
+    3/imm32/rm32-is-first-output
+    0/imm32/no-r32
+    1/imm32/imm32-is-first-inout
+    0/imm32/no-disp32
+    0/imm32/output-is-write-only
+    0x11/imm32/alloc-id:fake
+    _Primitive-shift-mem-left-by-lit/imm32/next
+_Primitive-shift-mem-left-by-lit:  # (payload primitive)
+    0x11/imm32/alloc-id:fake:payload
+    # shift-left var1, lit => c1/shift 4/subop/left var1/rm32 lit/imm32
+    0x11/imm32/alloc-id:fake
+    _string-shift-left/imm32/name
+    0x11/imm32/alloc-id:fake
+    Int-var-and-literal/imm32/inouts
+    0/imm32/no-outputs
+    0/imm32/no-outputs
+    0x11/imm32/alloc-id:fake
+    _string_c1_subop_shift_left/imm32/subx-name
+    1/imm32/rm32-is-first-inout
+    0/imm32/no-r32
+    2/imm32/imm32-is-second-inout
+    0/imm32/no-disp32
+    0/imm32/output-is-write-only
+    0x11/imm32/alloc-id:fake
+    _Primitive-shift-mem-right-by-lit/imm32/next
+_Primitive-shift-mem-right-by-lit:  # (payload primitive)
+    0x11/imm32/alloc-id:fake:payload
+    # shift-right var1, lit => c1/shift 5/subop/right var1/rm32 lit/imm32
+    0x11/imm32/alloc-id:fake
+    _string-shift-right/imm32/name
+    0x11/imm32/alloc-id:fake
+    Int-var-and-literal/imm32/inouts
+    0/imm32/no-outputs
+    0/imm32/no-outputs
+    0x11/imm32/alloc-id:fake
+    _string_c1_subop_shift_right_padding_zeroes/imm32/subx-name
+    1/imm32/rm32-is-first-inout
+    0/imm32/no-r32
+    2/imm32/imm32-is-second-inout
+    0/imm32/no-disp32
+    0/imm32/output-is-write-only
+    0x11/imm32/alloc-id:fake
+    _Primitive-shift-mem-right-signed-by-lit/imm32/next
+_Primitive-shift-mem-right-signed-by-lit:  # (payload primitive)
+    0x11/imm32/alloc-id:fake:payload
+    # shift-right-signed var1, lit => c1/shift 7/subop/right-preserving-sign var1/rm32 lit/imm32
+    0x11/imm32/alloc-id:fake
+    _string-shift-right-signed/imm32/name
+    0x11/imm32/alloc-id:fake
+    Int-var-and-literal/imm32/inouts
+    0/imm32/no-outputs
+    0/imm32/no-outputs
+    0x11/imm32/alloc-id:fake
+    _string_c1_subop_shift_right_preserving_sign/imm32/subx-name
+    1/imm32/rm32-is-first-inout
+    0/imm32/no-r32
+    2/imm32/imm32-is-second-inout
+    0/imm32/no-disp32
+    0/imm32/output-is-write-only
+    0x11/imm32/alloc-id:fake
     _Primitive-copy-to-eax/imm32/next
 # - copy
 _Primitive-copy-to-eax:  # (payload primitive)
@@ -17188,6 +17296,21 @@ _string-xor-with:  # (payload array byte)
     # "xor-with"
     0x8/imm32/size
     0x78/x 0x6f/o 0x72/r 0x2d/dash 0x77/w 0x69/i 0x74/t 0x68/h
+_string-shift-left:  # (payload array byte)
+    0x11/imm32/alloc-id:fake:payload
+    # "shift-left"
+    0xa/imm32/size
+    0x73/s 0x68/h 0x69/i 0x66/f 0x74/t 0x2d/dash 0x6c/l 0x65/e 0x66/f 0x74/t
+_string-shift-right:  # (payload array byte)
+    0x11/imm32/alloc-id:fake:payload
+    # "shift-right"
+    0xb/imm32/size
+    0x73/s 0x68/h 0x69/i 0x66/f 0x74/t 0x2d/dash 0x72/r 0x69/i 0x67/g 0x68/h 0x74/t
+_string-shift-right-signed:  # (payload array byte)
+    0x11/imm32/alloc-id:fake:payload
+    # "shift-right-signed"
+    0x12/imm32/size
+    0x73/s 0x68/h 0x69/i 0x66/f 0x74/t 0x2d/dash 0x72/r 0x69/i 0x67/g 0x68/h 0x74/t 0x2d/dash 0x73/s 0x69/i 0x67/g 0x6e/n 0x65/e 0x64/d
 
 # string literals for SubX instructions
 _string_01_add_to:  # (payload array byte)
@@ -17610,6 +17733,21 @@ _string_ff_subop_decrement:  # (payload array byte)
     # "ff 1/subop/decrement"
     0x14/imm32/size
     0x66/f 0x66/f 0x20/space 0x31/1 0x2f/slash 0x73/s 0x75/u 0x62/b 0x6f/o 0x70/p 0x2f/slash 0x64/d 0x65/e 0x63/c 0x72/r 0x65/e 0x6d/m 0x65/e 0x6e/n 0x74/t
+_string_c1_subop_shift_left:  # (payload array byte)
+    0x11/imm32/alloc-id:fake:payload
+    # "c1/shift 4/subop/left"
+    0x15/imm32/size
+    0x63/c 0x31/1 0x2f/slash 0x73/s 0x68/h 0x69/i 0x66/f 0x74/t 0x20/space 0x34/4 0x2f/slash 0x73/s 0x75/u 0x62/b 0x6f/o 0x70/p 0x2f/slash 0x6c/l 0x65/e 0x66/f 0x74/t
+_string_c1_subop_shift_right_padding_zeroes:  # (payload array byte)
+    0x11/imm32/alloc-id:fake:payload
+    # "c1/shift 5/subop/right-padding-zeroes"
+    0x25/imm32/size
+    0x63/c 0x31/1 0x2f/slash 0x73/s 0x68/h 0x69/i 0x66/f 0x74/t 0x20/space 0x35/5 0x2f/slash 0x73/s 0x75/u 0x62/b 0x6f/o 0x70/p 0x2f/slash 0x72/r 0x69/i 0x67/g 0x68/h 0x74/t 0x2d/dash 0x70/p 0x61/a 0x64/d 0x64/d 0x69/i 0x6e/n 0x67/g 0x2d/dash 0x7a/z 0x65/e 0x72/r 0x6f/o 0x65/e 0x73/s
+_string_c1_subop_shift_right_preserving_sign:  # (payload array byte)
+    0x11/imm32/alloc-id:fake:payload
+    # "c1/shift 7/subop/right-preserving-sign"
+    0x26/imm32/size
+    0x63/c 0x31/1 0x2f/slash 0x73/s 0x68/h 0x69/i 0x66/f 0x74/t 0x20/space 0x37/7 0x2f/slash 0x73/s 0x75/u 0x62/b 0x6f/o 0x70/p 0x2f/slash 0x72/r 0x69/i 0x67/g 0x68/h 0x74/t 0x2d/dash 0x70/p 0x72/r 0x65/e 0x73/s 0x65/e 0x72/r 0x76/v 0x69/i 0x6e/n 0x67/g 0x2d/dash 0x73/s 0x69/i 0x67/g 0x6e/n
 
 Single-int-var-in-mem:  # (payload list var)
     0x11/imm32/alloc-id:fake:payload
diff --git a/mu.md b/mu.md
index 429f2034..be91fc10 100644
--- a/mu.md
+++ b/mu.md
@@ -188,6 +188,13 @@ compare var1/reg, var2
 compare var/eax, n
 compare var, n
 
+var/reg <- shift-left n
+var/reg <- shift-right n
+var/reg <- shift-right-signed n
+shift-left var, n
+shift-right var, n
+shift-right-signed var, n
+
 var/reg <- multiply var2
 ```
 
diff --git a/mu_instructions b/mu_instructions
index c23606ec..69999444 100644
--- a/mu_instructions
+++ b/mu_instructions
@@ -76,6 +76,13 @@ var/reg <- xor n                  => "81 6/subop/xor %" reg " " n "/imm32"
 xor-with var, n                   => "81 6/subop/xor *(ebp+" var.stack-offset ") " n "/imm32"
 xor-with *var/reg, n              => "81 6/subop/xor *" reg " " n "/imm32"
 
+var/reg <- shift-left n
+var/reg <- shift-right n
+var/reg <- shift-right-signed n
+shift-left var, n
+shift-right var, n
+shift-right-signed var, n
+
 var/eax <- copy n                 => "b8/copy-to-eax " n "/imm32"
 var/ecx <- copy n                 => "b9/copy-to-ecx " n "/imm32"
 var/edx <- copy n                 => "ba/copy-to-edx " n "/imm32"