diff options
| author | Kartik K. Agaram <vc@akkartik.com> | 2017-10-18 01:53:25 -0700 |
|---|---|---|
| committer | Kartik K. Agaram <vc@akkartik.com> | 2017-10-18 01:53:25 -0700 |
| commit | cb4be511b7bae326802420125403ba91870f30c5 (patch) | |
| tree | 5d523d15cce774e9f8b0d4be1973b64608160e34 | |
| parent | f44c49c776b2199dd83b0de4e203a26bafa9c7ba (diff) | |
| download | mu-cb4be511b7bae326802420125403ba91870f30c5.tar.gz | |
4081
| -rw-r--r-- | html/subx/013immediate_addressing.cc.html | 440 | ||||
| -rw-r--r-- | subx/013immediate_addressing.cc | 28 |
2 files changed, 230 insertions, 238 deletions
diff --git a/html/subx/013immediate_addressing.cc.html b/html/subx/013immediate_addressing.cc.html index adaff3e0..6215b01c 100644 --- a/html/subx/013immediate_addressing.cc.html +++ b/html/subx/013immediate_addressing.cc.html @@ -228,230 +228,226 @@ if ('onhashchange' in window) { <span id="L164" class="LineNr">164 </span><span class="traceContains">+run: subop or</span> <span id="L165" class="LineNr">165 </span><span class="traceContains">+run: storing 0xddccbbaa</span> <span id="L166" class="LineNr">166 </span> -<span id="L167" class="LineNr">167 </span><span class="Comment">//:</span> -<span id="L168" class="LineNr">168 </span> -<span id="L169" class="LineNr">169 </span><span class="Delimiter">:(scenario or_imm32_with_r32)</span> -<span id="L170" class="LineNr">170 </span><span class="Special">% Reg[3].i = 0xd0c0b0a0;</span> -<span id="L171" class="LineNr">171 </span><span class="Comment"># op ModRM SIB displacement immediate</span> -<span id="L172" class="LineNr">172 </span> <span class="Constant">81</span> cb 0a 0b 0c 0d <span class="Comment"># or 0x0d0c0b0a with EBX (reg 3)</span> -<span id="L173" class="LineNr">173 </span><span class="traceContains">+run: combine <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b0a with effective address</span> -<span id="L174" class="LineNr">174 </span><span class="traceContains">+run: effective address is <a href='010core.cc.html#L17'>reg</a> 3</span> -<span id="L175" class="LineNr">175 </span><span class="traceContains">+run: subop or</span> -<span id="L176" class="LineNr">176 </span><span class="traceContains">+run: storing 0xddccbbaa</span> -<span id="L177" class="LineNr">177 </span> -<span id="L178" class="LineNr">178 </span><span class="Delimiter">:(before "End Op 81 Subops")</span> -<span id="L179" class="LineNr">179 </span><span class="Normal">case</span> <span class="Constant">1</span>: <span class="Delimiter">{</span> -<span id="L180" class="LineNr">180 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"subop or"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span> -<span id="L181" class="LineNr">181 </span> <a href='010core.cc.html#L55'>BINARY_BITWISE_OP</a><span class="Delimiter">(</span>|<span class="Delimiter">,</span> *arg1<span class="Delimiter">,</span> arg2<span class="Delimiter">);</span> -<span id="L182" class="LineNr">182 </span> <span class="Identifier">break</span><span class="Delimiter">;</span> -<span id="L183" class="LineNr">183 </span><span class="Delimiter">}</span> +<span id="L167" class="LineNr">167 </span><span class="Delimiter">:(before "End Op 81 Subops")</span> +<span id="L168" class="LineNr">168 </span><span class="Normal">case</span> <span class="Constant">1</span>: <span class="Delimiter">{</span> +<span id="L169" class="LineNr">169 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"subop or"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span> +<span id="L170" class="LineNr">170 </span> <a href='010core.cc.html#L55'>BINARY_BITWISE_OP</a><span class="Delimiter">(</span>|<span class="Delimiter">,</span> *arg1<span class="Delimiter">,</span> arg2<span class="Delimiter">);</span> +<span id="L171" class="LineNr">171 </span> <span class="Identifier">break</span><span class="Delimiter">;</span> +<span id="L172" class="LineNr">172 </span><span class="Delimiter">}</span> +<span id="L173" class="LineNr">173 </span> +<span id="L174" class="LineNr">174 </span><span class="Delimiter">:(scenario or_imm32_with_r32)</span> +<span id="L175" class="LineNr">175 </span><span class="Special">% Reg[3].i = 0xd0c0b0a0;</span> +<span id="L176" class="LineNr">176 </span><span class="Comment"># op ModRM SIB displacement immediate</span> +<span id="L177" class="LineNr">177 </span> <span class="Constant">81</span> cb 0a 0b 0c 0d <span class="Comment"># or 0x0d0c0b0a with EBX (reg 3)</span> +<span id="L178" class="LineNr">178 </span><span class="traceContains">+run: combine <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b0a with effective address</span> +<span id="L179" class="LineNr">179 </span><span class="traceContains">+run: effective address is <a href='010core.cc.html#L17'>reg</a> 3</span> +<span id="L180" class="LineNr">180 </span><span class="traceContains">+run: subop or</span> +<span id="L181" class="LineNr">181 </span><span class="traceContains">+run: storing 0xddccbbaa</span> +<span id="L182" class="LineNr">182 </span> +<span id="L183" class="LineNr">183 </span><span class="SalientComment">//:: xor</span> <span id="L184" class="LineNr">184 </span> -<span id="L185" class="LineNr">185 </span><span class="SalientComment">//:: xor</span> -<span id="L186" class="LineNr">186 </span> -<span id="L187" class="LineNr">187 </span><span class="Delimiter">:(scenario xor_imm32_with_eax)</span> -<span id="L188" class="LineNr">188 </span><span class="Special">% Reg[EAX].i = 0xddccb0a0;</span> -<span id="L189" class="LineNr">189 </span><span class="Comment"># op ModR/M SIB displacement immediate</span> -<span id="L190" class="LineNr">190 </span> <span class="Constant">35</span> 0a 0b 0c 0d <span class="Comment"># xor 0x0d0c0b0a with EAX (reg 0)</span> -<span id="L191" class="LineNr">191 </span><span class="traceContains">+run: xor <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b0a with <a href='010core.cc.html#L17'>reg</a> <a href='010core.cc.html#L7'>EAX</a></span> -<span id="L192" class="LineNr">192 </span><span class="traceContains">+run: storing 0xd0c0bbaa</span> -<span id="L193" class="LineNr">193 </span> -<span id="L194" class="LineNr">194 </span><span class="Delimiter">:(before "End Single-Byte Opcodes")</span> -<span id="L195" class="LineNr">195 </span><span class="Normal">case</span> <span class="Constant">0x35</span>: <span class="Delimiter">{</span> <span class="Comment">// xor imm32 with EAX</span> -<span id="L196" class="LineNr">196 </span> <span class="Normal">int32_t</span> arg2 = <a href='010core.cc.html#L219'>imm32</a><span class="Delimiter">();</span> -<span id="L197" class="LineNr">197 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"xor <a href='010core.cc.html#L219'>imm32</a> 0x"</span> << <a href='010core.cc.html#L230'>HEXWORD</a> << arg2 << <span class="Constant">" with <a href='010core.cc.html#L17'>reg</a> EAX"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span> -<span id="L198" class="LineNr">198 </span> <a href='010core.cc.html#L55'>BINARY_BITWISE_OP</a><span class="Delimiter">(</span>^<span class="Delimiter">,</span> Reg[EAX]<span class="Delimiter">.</span>i<span class="Delimiter">,</span> arg2<span class="Delimiter">);</span> -<span id="L199" class="LineNr">199 </span> <span class="Identifier">break</span><span class="Delimiter">;</span> -<span id="L200" class="LineNr">200 </span><span class="Delimiter">}</span> +<span id="L185" class="LineNr">185 </span><span class="Delimiter">:(scenario xor_imm32_with_eax)</span> +<span id="L186" class="LineNr">186 </span><span class="Special">% Reg[EAX].i = 0xddccb0a0;</span> +<span id="L187" class="LineNr">187 </span><span class="Comment"># op ModR/M SIB displacement immediate</span> +<span id="L188" class="LineNr">188 </span> <span class="Constant">35</span> 0a 0b 0c 0d <span class="Comment"># xor 0x0d0c0b0a with EAX (reg 0)</span> +<span id="L189" class="LineNr">189 </span><span class="traceContains">+run: xor <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b0a with <a href='010core.cc.html#L17'>reg</a> <a href='010core.cc.html#L7'>EAX</a></span> +<span id="L190" class="LineNr">190 </span><span class="traceContains">+run: storing 0xd0c0bbaa</span> +<span id="L191" class="LineNr">191 </span> +<span id="L192" class="LineNr">192 </span><span class="Delimiter">:(before "End Single-Byte Opcodes")</span> +<span id="L193" class="LineNr">193 </span><span class="Normal">case</span> <span class="Constant">0x35</span>: <span class="Delimiter">{</span> <span class="Comment">// xor imm32 with EAX</span> +<span id="L194" class="LineNr">194 </span> <span class="Normal">int32_t</span> arg2 = <a href='010core.cc.html#L219'>imm32</a><span class="Delimiter">();</span> +<span id="L195" class="LineNr">195 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"xor <a href='010core.cc.html#L219'>imm32</a> 0x"</span> << <a href='010core.cc.html#L230'>HEXWORD</a> << arg2 << <span class="Constant">" with <a href='010core.cc.html#L17'>reg</a> EAX"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span> +<span id="L196" class="LineNr">196 </span> <a href='010core.cc.html#L55'>BINARY_BITWISE_OP</a><span class="Delimiter">(</span>^<span class="Delimiter">,</span> Reg[EAX]<span class="Delimiter">.</span>i<span class="Delimiter">,</span> arg2<span class="Delimiter">);</span> +<span id="L197" class="LineNr">197 </span> <span class="Identifier">break</span><span class="Delimiter">;</span> +<span id="L198" class="LineNr">198 </span><span class="Delimiter">}</span> +<span id="L199" class="LineNr">199 </span> +<span id="L200" class="LineNr">200 </span><span class="Comment">//:</span> <span id="L201" class="LineNr">201 </span> -<span id="L202" class="LineNr">202 </span><span class="Comment">//:</span> -<span id="L203" class="LineNr">203 </span> -<span id="L204" class="LineNr">204 </span><span class="Delimiter">:(scenario xor_imm32_with_mem_at_r32)</span> -<span id="L205" class="LineNr">205 </span><span class="Special">% Reg[3].i = 0x60;</span> -<span id="L206" class="LineNr">206 </span><span class="Special">% SET_WORD_IN_MEM(0x60, 0xd0c0b0a0);</span> -<span id="L207" class="LineNr">207 </span><span class="Comment"># op ModRM SIB displacement immediate</span> -<span id="L208" class="LineNr">208 </span> <span class="Constant">81</span> <span class="Constant">33</span> 0a 0b 0c 0d <span class="Comment"># xor 0x0d0c0b0a with *EBX (reg 3)</span> -<span id="L209" class="LineNr">209 </span><span class="traceContains">+run: combine <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b0a with effective address</span> -<span id="L210" class="LineNr">210 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 3)</span> -<span id="L211" class="LineNr">211 </span><span class="traceContains">+run: subop xor</span> -<span id="L212" class="LineNr">212 </span><span class="traceContains">+run: storing 0xddccbbaa</span> -<span id="L213" class="LineNr">213 </span> -<span id="L214" class="LineNr">214 </span><span class="Comment">//:</span> -<span id="L215" class="LineNr">215 </span> -<span id="L216" class="LineNr">216 </span><span class="Delimiter">:(scenario xor_imm32_with_r32)</span> -<span id="L217" class="LineNr">217 </span><span class="Special">% Reg[3].i = 0xd0c0b0a0;</span> -<span id="L218" class="LineNr">218 </span><span class="Comment"># op ModRM SIB displacement immediate</span> -<span id="L219" class="LineNr">219 </span> <span class="Constant">81</span> f3 0a 0b 0c 0d <span class="Comment"># xor 0x0d0c0b0a with EBX (reg 3)</span> -<span id="L220" class="LineNr">220 </span><span class="traceContains">+run: combine <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b0a with effective address</span> -<span id="L221" class="LineNr">221 </span><span class="traceContains">+run: effective address is <a href='010core.cc.html#L17'>reg</a> 3</span> -<span id="L222" class="LineNr">222 </span><span class="traceContains">+run: subop xor</span> -<span id="L223" class="LineNr">223 </span><span class="traceContains">+run: storing 0xddccbbaa</span> -<span id="L224" class="LineNr">224 </span> -<span id="L225" class="LineNr">225 </span><span class="Delimiter">:(before "End Op 81 Subops")</span> -<span id="L226" class="LineNr">226 </span><span class="Normal">case</span> <span class="Constant">6</span>: <span class="Delimiter">{</span> -<span id="L227" class="LineNr">227 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"subop xor"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span> -<span id="L228" class="LineNr">228 </span> <a href='010core.cc.html#L55'>BINARY_BITWISE_OP</a><span class="Delimiter">(</span>^<span class="Delimiter">,</span> *arg1<span class="Delimiter">,</span> arg2<span class="Delimiter">);</span> -<span id="L229" class="LineNr">229 </span> <span class="Identifier">break</span><span class="Delimiter">;</span> -<span id="L230" class="LineNr">230 </span><span class="Delimiter">}</span> -<span id="L231" class="LineNr">231 </span> -<span id="L232" class="LineNr">232 </span><span class="SalientComment">//:: compare (cmp)</span> -<span id="L233" class="LineNr">233 </span> -<span id="L234" class="LineNr">234 </span><span class="Delimiter">:(scenario compare_imm32_with_eax_greater)</span> -<span id="L235" class="LineNr">235 </span><span class="Special">% Reg[0].i = 0x0d0c0b0a;</span> -<span id="L236" class="LineNr">236 </span><span class="Comment"># op ModRM SIB displacement immediate</span> -<span id="L237" class="LineNr">237 </span> 3d <span class="PreProc">0</span><span class="Constant">7</span> 0b 0c 0d <span class="Comment"># compare 0x0d0c0b07 with EAX (reg 0)</span> -<span id="L238" class="LineNr">238 </span><span class="traceContains">+run: compare <a href='010core.cc.html#L17'>reg</a> <a href='010core.cc.html#L7'>EAX</a> and <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b07</span> -<span id="L239" class="LineNr">239 </span><span class="traceContains">+run: SF=0; ZF=0; OF=0</span> -<span id="L240" class="LineNr">240 </span> -<span id="L241" class="LineNr">241 </span><span class="Delimiter">:(before "End Single-Byte Opcodes")</span> -<span id="L242" class="LineNr">242 </span><span class="Normal">case</span> <span class="Constant">0x3d</span>: <span class="Delimiter">{</span> <span class="Comment">// subtract imm32 from EAX</span> -<span id="L243" class="LineNr">243 </span> <span class="Normal">int32_t</span> arg1 = Reg[EAX]<span class="Delimiter">.</span>i<span class="Delimiter">;</span> -<span id="L244" class="LineNr">244 </span> <span class="Normal">int32_t</span> arg2 = <a href='010core.cc.html#L219'>imm32</a><span class="Delimiter">();</span> -<span id="L245" class="LineNr">245 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"compare <a href='010core.cc.html#L17'>reg</a> <a href='010core.cc.html#L7'>EAX</a> and <a href='010core.cc.html#L219'>imm32</a> 0x"</span> << <a href='010core.cc.html#L230'>HEXWORD</a> << arg2 << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span> -<span id="L246" class="LineNr">246 </span> <span class="Normal">int32_t</span> tmp1 = arg1 - arg2<span class="Delimiter">;</span> -<span id="L247" class="LineNr">247 </span> SF = <span class="Delimiter">(</span>tmp1 < <span class="Constant">0</span><span class="Delimiter">);</span> -<span id="L248" class="LineNr">248 </span> ZF = <span class="Delimiter">(</span>tmp1 == <span class="Constant">0</span><span class="Delimiter">);</span> -<span id="L249" class="LineNr">249 </span> <span class="Normal">int64_t</span> tmp2 = arg1 - arg2<span class="Delimiter">;</span> -<span id="L250" class="LineNr">250 </span> <a href='010core.cc.html#L33'>OF</a> = <span class="Delimiter">(</span>tmp1 != tmp2<span class="Delimiter">);</span> -<span id="L251" class="LineNr">251 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"SF="</span> << SF << <span class="Constant">"; ZF="</span> << ZF << <span class="Constant">"; OF="</span> << <a href='010core.cc.html#L33'>OF</a> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span> -<span id="L252" class="LineNr">252 </span> <span class="Identifier">break</span><span class="Delimiter">;</span> -<span id="L253" class="LineNr">253 </span><span class="Delimiter">}</span> -<span id="L254" class="LineNr">254 </span> -<span id="L255" class="LineNr">255 </span><span class="Delimiter">:(scenario compare_imm32_with_eax_lesser)</span> -<span id="L256" class="LineNr">256 </span><span class="Special">% Reg[0].i = 0x0d0c0b07;</span> -<span id="L257" class="LineNr">257 </span><span class="Comment"># op ModRM SIB displacement immediate</span> -<span id="L258" class="LineNr">258 </span> 3d 0a 0b 0c 0d <span class="Comment"># compare 0x0d0c0b0a with EAX (reg 0)</span> -<span id="L259" class="LineNr">259 </span><span class="traceContains">+run: compare <a href='010core.cc.html#L17'>reg</a> <a href='010core.cc.html#L7'>EAX</a> and <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b0a</span> -<span id="L260" class="LineNr">260 </span><span class="traceContains">+run: SF=1; ZF=0; OF=0</span> -<span id="L261" class="LineNr">261 </span> -<span id="L262" class="LineNr">262 </span><span class="Delimiter">:(scenario compare_imm32_with_eax_equal)</span> -<span id="L263" class="LineNr">263 </span><span class="Special">% Reg[0].i = 0x0d0c0b0a;</span> -<span id="L264" class="LineNr">264 </span><span class="Comment"># op ModRM SIB displacement immediate</span> -<span id="L265" class="LineNr">265 </span> 3d 0a 0b 0c 0d <span class="Comment"># compare 0x0d0c0b0a with EAX (reg 0)</span> -<span id="L266" class="LineNr">266 </span><span class="traceContains">+run: compare <a href='010core.cc.html#L17'>reg</a> <a href='010core.cc.html#L7'>EAX</a> and <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b0a</span> -<span id="L267" class="LineNr">267 </span><span class="traceContains">+run: SF=0; ZF=1; OF=0</span> -<span id="L268" class="LineNr">268 </span> -<span id="L269" class="LineNr">269 </span><span class="Comment">//:</span> -<span id="L270" class="LineNr">270 </span> -<span id="L271" class="LineNr">271 </span><span class="Delimiter">:(scenario compare_imm32_with_r32_greater)</span> -<span id="L272" class="LineNr">272 </span><span class="Special">% Reg[3].i = 0x0d0c0b0a;</span> -<span id="L273" class="LineNr">273 </span><span class="Comment"># op ModRM SIB displacement immediate</span> -<span id="L274" class="LineNr">274 </span> <span class="Constant">81</span> fb <span class="PreProc">0</span><span class="Constant">7</span> 0b 0c 0d <span class="Comment"># compare 0x0d0c0b07 with EBX (reg 3)</span> -<span id="L275" class="LineNr">275 </span><span class="traceContains">+run: combine <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b07 with effective address</span> -<span id="L276" class="LineNr">276 </span><span class="traceContains">+run: effective address is <a href='010core.cc.html#L17'>reg</a> 3</span> -<span id="L277" class="LineNr">277 </span><span class="traceContains">+run: SF=0; ZF=0; OF=0</span> -<span id="L278" class="LineNr">278 </span> -<span id="L279" class="LineNr">279 </span><span class="Delimiter">:(before "End Op 81 Subops")</span> -<span id="L280" class="LineNr">280 </span><span class="Normal">case</span> <span class="Constant">7</span>: <span class="Delimiter">{</span> -<span id="L281" class="LineNr">281 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"subop compare"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span> -<span id="L282" class="LineNr">282 </span> <span class="Normal">int32_t</span> tmp1 = *arg1 - arg2<span class="Delimiter">;</span> -<span id="L283" class="LineNr">283 </span> SF = <span class="Delimiter">(</span>tmp1 < <span class="Constant">0</span><span class="Delimiter">);</span> -<span id="L284" class="LineNr">284 </span> ZF = <span class="Delimiter">(</span>tmp1 == <span class="Constant">0</span><span class="Delimiter">);</span> -<span id="L285" class="LineNr">285 </span> <span class="Normal">int64_t</span> tmp2 = *arg1 - arg2<span class="Delimiter">;</span> -<span id="L286" class="LineNr">286 </span> <a href='010core.cc.html#L33'>OF</a> = <span class="Delimiter">(</span>tmp1 != tmp2<span class="Delimiter">);</span> -<span id="L287" class="LineNr">287 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"SF="</span> << SF << <span class="Constant">"; ZF="</span> << ZF << <span class="Constant">"; OF="</span> << <a href='010core.cc.html#L33'>OF</a> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span> -<span id="L288" class="LineNr">288 </span> <span class="Identifier">break</span><span class="Delimiter">;</span> -<span id="L289" class="LineNr">289 </span><span class="Delimiter">}</span> -<span id="L290" class="LineNr">290 </span> -<span id="L291" class="LineNr">291 </span><span class="Delimiter">:(scenario compare_imm32_with_r32_lesser)</span> -<span id="L292" class="LineNr">292 </span><span class="Special">% Reg[3].i = 0x0d0c0b07;</span> -<span id="L293" class="LineNr">293 </span><span class="Comment"># op ModRM SIB displacement immediate</span> -<span id="L294" class="LineNr">294 </span> <span class="Constant">81</span> fb 0a 0b 0c 0d <span class="Comment"># compare 0x0d0c0b0a with EBX (reg 3)</span> -<span id="L295" class="LineNr">295 </span><span class="traceContains">+run: combine <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b0a with effective address</span> -<span id="L296" class="LineNr">296 </span><span class="traceContains">+run: effective address is <a href='010core.cc.html#L17'>reg</a> 3</span> -<span id="L297" class="LineNr">297 </span><span class="traceContains">+run: SF=1; ZF=0; OF=0</span> -<span id="L298" class="LineNr">298 </span> -<span id="L299" class="LineNr">299 </span><span class="Delimiter">:(scenario compare_imm32_with_r32_equal)</span> -<span id="L300" class="LineNr">300 </span><span class="Special">% Reg[3].i = 0x0d0c0b0a;</span> -<span id="L301" class="LineNr">301 </span><span class="Comment"># op ModRM SIB displacement immediate</span> -<span id="L302" class="LineNr">302 </span> <span class="Constant">81</span> fb 0a 0b 0c 0d <span class="Comment"># compare 0x0d0c0b0a with EBX (reg 3)</span> -<span id="L303" class="LineNr">303 </span><span class="traceContains">+run: combine <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b0a with effective address</span> -<span id="L304" class="LineNr">304 </span><span class="traceContains">+run: effective address is <a href='010core.cc.html#L17'>reg</a> 3</span> -<span id="L305" class="LineNr">305 </span><span class="traceContains">+run: SF=0; ZF=1; OF=0</span> -<span id="L306" class="LineNr">306 </span> -<span id="L307" class="LineNr">307 </span><span class="Delimiter">:(scenario compare_imm32_with_mem_at_r32_greater)</span> -<span id="L308" class="LineNr">308 </span><span class="Special">% Reg[3].i = 0x60;</span> -<span id="L309" class="LineNr">309 </span><span class="Special">% SET_WORD_IN_MEM(0x60, 0x0d0c0b0a);</span> -<span id="L310" class="LineNr">310 </span><span class="Comment"># op ModRM SIB displacement immediate</span> -<span id="L311" class="LineNr">311 </span> <span class="Constant">81</span> 3b <span class="PreProc">0</span><span class="Constant">7</span> 0b 0c 0d <span class="Comment"># compare 0x0d0c0b07 with *EBX (reg 3)</span> -<span id="L312" class="LineNr">312 </span><span class="traceContains">+run: combine <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b07 with effective address</span> -<span id="L313" class="LineNr">313 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 3)</span> -<span id="L314" class="LineNr">314 </span><span class="traceContains">+run: SF=0; ZF=0; OF=0</span> -<span id="L315" class="LineNr">315 </span> -<span id="L316" class="LineNr">316 </span><span class="Delimiter">:(scenario compare_imm32_with_mem_at_r32_lesser)</span> -<span id="L317" class="LineNr">317 </span><span class="Special">% Reg[3].i = 0x60;</span> -<span id="L318" class="LineNr">318 </span><span class="Special">% SET_WORD_IN_MEM(0x60, 0x0d0c0b07);</span> -<span id="L319" class="LineNr">319 </span><span class="Comment"># op ModRM SIB displacement immediate</span> -<span id="L320" class="LineNr">320 </span> <span class="Constant">81</span> 3b 0a 0b 0c 0d <span class="Comment"># compare 0x0d0c0b0a with *EBX (reg 3)</span> -<span id="L321" class="LineNr">321 </span><span class="traceContains">+run: combine <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b0a with effective address</span> -<span id="L322" class="LineNr">322 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 3)</span> -<span id="L323" class="LineNr">323 </span><span class="traceContains">+run: SF=1; ZF=0; OF=0</span> -<span id="L324" class="LineNr">324 </span> -<span id="L325" class="LineNr">325 </span><span class="Delimiter">:(scenario compare_imm32_with_mem_at_r32_equal)</span> -<span id="L326" class="LineNr">326 </span><span class="Special">% Reg[3].i = 0x0d0c0b0a;</span> -<span id="L327" class="LineNr">327 </span><span class="Special">% Reg[3].i = 0x60;</span> -<span id="L328" class="LineNr">328 </span><span class="Special">% SET_WORD_IN_MEM(0x60, 0x0d0c0b0a);</span> -<span id="L329" class="LineNr">329 </span><span class="Comment"># op ModRM SIB displacement immediate</span> -<span id="L330" class="LineNr">330 </span> <span class="Constant">81</span> 3b 0a 0b 0c 0d <span class="Comment"># compare 0x0d0c0b0a with *EBX (reg 3)</span> -<span id="L331" class="LineNr">331 </span><span class="traceContains">+run: combine <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b0a with effective address</span> -<span id="L332" class="LineNr">332 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 3)</span> -<span id="L333" class="LineNr">333 </span><span class="traceContains">+run: SF=0; ZF=1; OF=0</span> -<span id="L334" class="LineNr">334 </span> -<span id="L335" class="LineNr">335 </span><span class="SalientComment">//:: copy (mov)</span> -<span id="L336" class="LineNr">336 </span> -<span id="L337" class="LineNr">337 </span><span class="Delimiter">:(scenario copy_imm32_to_r32)</span> -<span id="L338" class="LineNr">338 </span><span class="Comment"># op ModRM SIB displacement immediate</span> -<span id="L339" class="LineNr">339 </span> b8 <span class="PreProc">0</span><span class="Constant">3</span> 0a 0b 0c 0d <span class="Comment"># copy 0x0d0c0b0a to EBX (reg 3)</span> -<span id="L340" class="LineNr">340 </span><span class="traceContains">+run: copy <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b0a to <a href='010core.cc.html#L17'>reg</a> 3</span> -<span id="L341" class="LineNr">341 </span> -<span id="L342" class="LineNr">342 </span><span class="Delimiter">:(before "End Single-Byte Opcodes")</span> -<span id="L343" class="LineNr">343 </span><span class="Normal">case</span> <span class="Constant">0xb8</span>: <span class="Delimiter">{</span> <span class="Comment">// copy imm32 to r32</span> -<span id="L344" class="LineNr">344 </span> <span class="Normal">uint8_t</span> modrm = <a href='010core.cc.html#L214'>next</a><span class="Delimiter">();</span> -<span id="L345" class="LineNr">345 </span> <span class="Normal">int32_t</span> arg2 = <a href='010core.cc.html#L219'>imm32</a><span class="Delimiter">();</span> -<span id="L346" class="LineNr">346 </span> <span class="Normal">uint8_t</span> reg1 = modrm&<span class="Constant">0x7</span><span class="Delimiter">;</span> <span class="Comment">// ignore mod bits</span> -<span id="L347" class="LineNr">347 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"copy <a href='010core.cc.html#L219'>imm32</a> 0x"</span> << <a href='010core.cc.html#L230'>HEXWORD</a> << arg2 << <span class="Constant">" to <a href='010core.cc.html#L17'>reg</a> "</span> << <a href='010core.cc.html#L232'>NUM</a><span class="Delimiter">(</span>reg1<span class="Delimiter">)</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span> -<span id="L348" class="LineNr">348 </span> Reg[reg1]<span class="Delimiter">.</span>i = arg2<span class="Delimiter">;</span> -<span id="L349" class="LineNr">349 </span> <span class="Identifier">break</span><span class="Delimiter">;</span> -<span id="L350" class="LineNr">350 </span><span class="Delimiter">}</span> -<span id="L351" class="LineNr">351 </span> -<span id="L352" class="LineNr">352 </span><span class="Comment">//:</span> -<span id="L353" class="LineNr">353 </span> -<span id="L354" class="LineNr">354 </span><span class="Delimiter">:(scenario copy_imm32_to_mem_at_r32)</span> -<span id="L355" class="LineNr">355 </span><span class="Special">% Reg[3].i = 0x60;</span> -<span id="L356" class="LineNr">356 </span><span class="Comment"># op ModRM SIB displacement immediate</span> -<span id="L357" class="LineNr">357 </span> c7 <span class="PreProc">0</span><span class="Constant">3</span> 0a 0b 0c 0d <span class="Comment"># copy 0x0d0c0b0a to *EBX (reg 3)</span> -<span id="L358" class="LineNr">358 </span><span class="traceContains">+run: copy <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b0a to effective address</span> -<span id="L359" class="LineNr">359 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 3)</span> -<span id="L360" class="LineNr">360 </span> -<span id="L361" class="LineNr">361 </span><span class="Delimiter">:(before "End Single-Byte Opcodes")</span> -<span id="L362" class="LineNr">362 </span><span class="Normal">case</span> <span class="Constant">0xc7</span>: <span class="Delimiter">{</span> <span class="Comment">// copy imm32 to r32</span> -<span id="L363" class="LineNr">363 </span> <span class="Normal">uint8_t</span> modrm = <a href='010core.cc.html#L214'>next</a><span class="Delimiter">();</span> -<span id="L364" class="LineNr">364 </span> <span class="Normal">int32_t</span> arg2 = <a href='010core.cc.html#L219'>imm32</a><span class="Delimiter">();</span> -<span id="L365" class="LineNr">365 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"copy <a href='010core.cc.html#L219'>imm32</a> 0x"</span> << <a href='010core.cc.html#L230'>HEXWORD</a> << arg2 << <span class="Constant">" to effective address"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span> -<span id="L366" class="LineNr">366 </span> <span class="Normal">int32_t</span>* arg1 = <a href='011direct_addressing.cc.html#L26'>effective_address</a><span class="Delimiter">(</span>modrm<span class="Delimiter">);</span> -<span id="L367" class="LineNr">367 </span> *arg1 = arg2<span class="Delimiter">;</span> -<span id="L368" class="LineNr">368 </span> <span class="Identifier">break</span><span class="Delimiter">;</span> -<span id="L369" class="LineNr">369 </span><span class="Delimiter">}</span> -<span id="L370" class="LineNr">370 </span> -<span id="L371" class="LineNr">371 </span><span class="SalientComment">//:: push</span> -<span id="L372" class="LineNr">372 </span> -<span id="L373" class="LineNr">373 </span><span class="Delimiter">:(scenario push_imm32)</span> -<span id="L374" class="LineNr">374 </span><span class="Special">% Reg[ESP].u = 0x14;</span> -<span id="L375" class="LineNr">375 </span><span class="Comment"># op ModRM SIB displacement immediate</span> -<span id="L376" class="LineNr">376 </span> <span class="Constant">68</span> af <span class="PreProc">0</span><span class="Constant">0</span> <span class="PreProc">0</span><span class="Constant">0</span> <span class="PreProc">0</span><span class="Constant">0</span> <span class="Comment"># push *EAX (reg 0) to stack</span> -<span id="L377" class="LineNr">377 </span><span class="traceContains">+run: push <a href='010core.cc.html#L219'>imm32</a> 0x000000af</span> -<span id="L378" class="LineNr">378 </span><span class="traceContains">+run: <a href='010core.cc.html#L11'>ESP</a> is now 0x00000010</span> -<span id="L379" class="LineNr">379 </span><span class="traceContains">+run: <a href='003trace.cc.html#L74'>contents</a> at <a href='010core.cc.html#L11'>ESP</a>: 0x000000af</span> -<span id="L380" class="LineNr">380 </span> -<span id="L381" class="LineNr">381 </span><span class="Delimiter">:(before "End Single-Byte Opcodes")</span> -<span id="L382" class="LineNr">382 </span><span class="Normal">case</span> <span class="Constant">0x68</span>: <span class="Delimiter">{</span> -<span id="L383" class="LineNr">383 </span> <span class="Normal">int32_t</span> val = <a href='010core.cc.html#L219'>imm32</a><span class="Delimiter">();</span> -<span id="L384" class="LineNr">384 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"push <a href='010core.cc.html#L219'>imm32</a> 0x"</span> << <a href='010core.cc.html#L230'>HEXWORD</a> << val << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span> -<span id="L385" class="LineNr">385 </span> Reg[ESP]<span class="Delimiter">.</span>u -= <span class="Constant">4</span><span class="Delimiter">;</span> -<span id="L386" class="LineNr">386 </span> *<span class="Normal">reinterpret_cast</span><<span class="Normal">uint32_t</span>*><span class="Delimiter">(</span>&Mem<span class="Delimiter">.</span>at<span class="Delimiter">(</span>Reg[ESP]<span class="Delimiter">.</span>u<span class="Delimiter">))</span> = val<span class="Delimiter">;</span> -<span id="L387" class="LineNr">387 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"ESP is now 0x"</span> << <a href='010core.cc.html#L230'>HEXWORD</a> << Reg[ESP]<span class="Delimiter">.</span>u << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span> -<span id="L388" class="LineNr">388 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"contents at <a href='010core.cc.html#L11'>ESP</a>: 0x"</span> << <a href='010core.cc.html#L230'>HEXWORD</a> << *<span class="Normal">reinterpret_cast</span><<span class="Normal">uint32_t</span>*><span class="Delimiter">(</span>&Mem<span class="Delimiter">.</span>at<span class="Delimiter">(</span>Reg[ESP]<span class="Delimiter">.</span>u<span class="Delimiter">))</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span> -<span id="L389" class="LineNr">389 </span> <span class="Identifier">break</span><span class="Delimiter">;</span> -<span id="L390" class="LineNr">390 </span><span class="Delimiter">}</span> +<span id="L202" class="LineNr">202 </span><span class="Delimiter">:(scenario xor_imm32_with_mem_at_r32)</span> +<span id="L203" class="LineNr">203 </span><span class="Special">% Reg[3].i = 0x60;</span> +<span id="L204" class="LineNr">204 </span><span class="Special">% SET_WORD_IN_MEM(0x60, 0xd0c0b0a0);</span> +<span id="L205" class="LineNr">205 </span><span class="Comment"># op ModRM SIB displacement immediate</span> +<span id="L206" class="LineNr">206 </span> <span class="Constant">81</span> <span class="Constant">33</span> 0a 0b 0c 0d <span class="Comment"># xor 0x0d0c0b0a with *EBX (reg 3)</span> +<span id="L207" class="LineNr">207 </span><span class="traceContains">+run: combine <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b0a with effective address</span> +<span id="L208" class="LineNr">208 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 3)</span> +<span id="L209" class="LineNr">209 </span><span class="traceContains">+run: subop xor</span> +<span id="L210" class="LineNr">210 </span><span class="traceContains">+run: storing 0xddccbbaa</span> +<span id="L211" class="LineNr">211 </span> +<span id="L212" class="LineNr">212 </span><span class="Delimiter">:(before "End Op 81 Subops")</span> +<span id="L213" class="LineNr">213 </span><span class="Normal">case</span> <span class="Constant">6</span>: <span class="Delimiter">{</span> +<span id="L214" class="LineNr">214 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"subop xor"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span> +<span id="L215" class="LineNr">215 </span> <a href='010core.cc.html#L55'>BINARY_BITWISE_OP</a><span class="Delimiter">(</span>^<span class="Delimiter">,</span> *arg1<span class="Delimiter">,</span> arg2<span class="Delimiter">);</span> +<span id="L216" class="LineNr">216 </span> <span class="Identifier">break</span><span class="Delimiter">;</span> +<span id="L217" class="LineNr">217 </span><span class="Delimiter">}</span> +<span id="L218" class="LineNr">218 </span> +<span id="L219" class="LineNr">219 </span><span class="Delimiter">:(scenario xor_imm32_with_r32)</span> +<span id="L220" class="LineNr">220 </span><span class="Special">% Reg[3].i = 0xd0c0b0a0;</span> +<span id="L221" class="LineNr">221 </span><span class="Comment"># op ModRM SIB displacement immediate</span> +<span id="L222" class="LineNr">222 </span> <span class="Constant">81</span> f3 0a 0b 0c 0d <span class="Comment"># xor 0x0d0c0b0a with EBX (reg 3)</span> +<span id="L223" class="LineNr">223 </span><span class="traceContains">+run: combine <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b0a with effective address</span> +<span id="L224" class="LineNr">224 </span><span class="traceContains">+run: effective address is <a href='010core.cc.html#L17'>reg</a> 3</span> +<span id="L225" class="LineNr">225 </span><span class="traceContains">+run: subop xor</span> +<span id="L226" class="LineNr">226 </span><span class="traceContains">+run: storing 0xddccbbaa</span> +<span id="L227" class="LineNr">227 </span> +<span id="L228" class="LineNr">228 </span><span class="SalientComment">//:: compare (cmp)</span> +<span id="L229" class="LineNr">229 </span> +<span id="L230" class="LineNr">230 </span><span class="Delimiter">:(scenario compare_imm32_with_eax_greater)</span> +<span id="L231" class="LineNr">231 </span><span class="Special">% Reg[0].i = 0x0d0c0b0a;</span> +<span id="L232" class="LineNr">232 </span><span class="Comment"># op ModRM SIB displacement immediate</span> +<span id="L233" class="LineNr">233 </span> 3d <span class="PreProc">0</span><span class="Constant">7</span> 0b 0c 0d <span class="Comment"># compare 0x0d0c0b07 with EAX (reg 0)</span> +<span id="L234" class="LineNr">234 </span><span class="traceContains">+run: compare <a href='010core.cc.html#L17'>reg</a> <a href='010core.cc.html#L7'>EAX</a> and <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b07</span> +<span id="L235" class="LineNr">235 </span><span class="traceContains">+run: SF=0; ZF=0; OF=0</span> +<span id="L236" class="LineNr">236 </span> +<span id="L237" class="LineNr">237 </span><span class="Delimiter">:(before "End Single-Byte Opcodes")</span> +<span id="L238" class="LineNr">238 </span><span class="Normal">case</span> <span class="Constant">0x3d</span>: <span class="Delimiter">{</span> <span class="Comment">// subtract imm32 from EAX</span> +<span id="L239" class="LineNr">239 </span> <span class="Normal">int32_t</span> arg1 = Reg[EAX]<span class="Delimiter">.</span>i<span class="Delimiter">;</span> +<span id="L240" class="LineNr">240 </span> <span class="Normal">int32_t</span> arg2 = <a href='010core.cc.html#L219'>imm32</a><span class="Delimiter">();</span> +<span id="L241" class="LineNr">241 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"compare <a href='010core.cc.html#L17'>reg</a> <a href='010core.cc.html#L7'>EAX</a> and <a href='010core.cc.html#L219'>imm32</a> 0x"</span> << <a href='010core.cc.html#L230'>HEXWORD</a> << arg2 << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span> +<span id="L242" class="LineNr">242 </span> <span class="Normal">int32_t</span> tmp1 = arg1 - arg2<span class="Delimiter">;</span> +<span id="L243" class="LineNr">243 </span> SF = <span class="Delimiter">(</span>tmp1 < <span class="Constant">0</span><span class="Delimiter">);</span> +<span id="L244" class="LineNr">244 </span> ZF = <span class="Delimiter">(</span>tmp1 == <span class="Constant">0</span><span class="Delimiter">);</span> +<span id="L245" class="LineNr">245 </span> <span class="Normal">int64_t</span> tmp2 = arg1 - arg2<span class="Delimiter">;</span> +<span id="L246" class="LineNr">246 </span> <a href='010core.cc.html#L33'>OF</a> = <span class="Delimiter">(</span>tmp1 != tmp2<span class="Delimiter">);</span> +<span id="L247" class="LineNr">247 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"SF="</span> << SF << <span class="Constant">"; ZF="</span> << ZF << <span class="Constant">"; OF="</span> << <a href='010core.cc.html#L33'>OF</a> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span> +<span id="L248" class="LineNr">248 </span> <span class="Identifier">break</span><span class="Delimiter">;</span> +<span id="L249" class="LineNr">249 </span><span class="Delimiter">}</span> +<span id="L250" class="LineNr">250 </span> +<span id="L251" class="LineNr">251 </span><span class="Delimiter">:(scenario compare_imm32_with_eax_lesser)</span> +<span id="L252" class="LineNr">252 </span><span class="Special">% Reg[0].i = 0x0d0c0b07;</span> +<span id="L253" class="LineNr">253 </span><span class="Comment"># op ModRM SIB displacement immediate</span> +<span id="L254" class="LineNr">254 </span> 3d 0a 0b 0c 0d <span class="Comment"># compare 0x0d0c0b0a with EAX (reg 0)</span> +<span id="L255" class="LineNr">255 </span><span class="traceContains">+run: compare <a href='010core.cc.html#L17'>reg</a> <a href='010core.cc.html#L7'>EAX</a> and <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b0a</span> +<span id="L256" class="LineNr">256 </span><span class="traceContains">+run: SF=1; ZF=0; OF=0</span> +<span id="L257" class="LineNr">257 </span> +<span id="L258" class="LineNr">258 </span><span class="Delimiter">:(scenario compare_imm32_with_eax_equal)</span> +<span id="L259" class="LineNr">259 </span><span class="Special">% Reg[0].i = 0x0d0c0b0a;</span> +<span id="L260" class="LineNr">260 </span><span class="Comment"># op ModRM SIB displacement immediate</span> +<span id="L261" class="LineNr">261 </span> 3d 0a 0b 0c 0d <span class="Comment"># compare 0x0d0c0b0a with EAX (reg 0)</span> +<span id="L262" class="LineNr">262 </span><span class="traceContains">+run: compare <a href='010core.cc.html#L17'>reg</a> <a href='010core.cc.html#L7'>EAX</a> and <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b0a</span> +<span id="L263" class="LineNr">263 </span><span class="traceContains">+run: SF=0; ZF=1; OF=0</span> +<span id="L264" class="LineNr">264 </span> +<span id="L265" class="LineNr">265 </span><span class="Comment">//:</span> +<span id="L266" class="LineNr">266 </span> +<span id="L267" class="LineNr">267 </span><span class="Delimiter">:(scenario compare_imm32_with_r32_greater)</span> +<span id="L268" class="LineNr">268 </span><span class="Special">% Reg[3].i = 0x0d0c0b0a;</span> +<span id="L269" class="LineNr">269 </span><span class="Comment"># op ModRM SIB displacement immediate</span> +<span id="L270" class="LineNr">270 </span> <span class="Constant">81</span> fb <span class="PreProc">0</span><span class="Constant">7</span> 0b 0c 0d <span class="Comment"># compare 0x0d0c0b07 with EBX (reg 3)</span> +<span id="L271" class="LineNr">271 </span><span class="traceContains">+run: combine <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b07 with effective address</span> +<span id="L272" class="LineNr">272 </span><span class="traceContains">+run: effective address is <a href='010core.cc.html#L17'>reg</a> 3</span> +<span id="L273" class="LineNr">273 </span><span class="traceContains">+run: SF=0; ZF=0; OF=0</span> +<span id="L274" class="LineNr">274 </span> +<span id="L275" class="LineNr">275 </span><span class="Delimiter">:(before "End Op 81 Subops")</span> +<span id="L276" class="LineNr">276 </span><span class="Normal">case</span> <span class="Constant">7</span>: <span class="Delimiter">{</span> +<span id="L277" class="LineNr">277 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"subop compare"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span> +<span id="L278" class="LineNr">278 </span> <span class="Normal">int32_t</span> tmp1 = *arg1 - arg2<span class="Delimiter">;</span> +<span id="L279" class="LineNr">279 </span> SF = <span class="Delimiter">(</span>tmp1 < <span class="Constant">0</span><span class="Delimiter">);</span> +<span id="L280" class="LineNr">280 </span> ZF = <span class="Delimiter">(</span>tmp1 == <span class="Constant">0</span><span class="Delimiter">);</span> +<span id="L281" class="LineNr">281 </span> <span class="Normal">int64_t</span> tmp2 = *arg1 - arg2<span class="Delimiter">;</span> +<span id="L282" class="LineNr">282 </span> <a href='010core.cc.html#L33'>OF</a> = <span class="Delimiter">(</span>tmp1 != tmp2<span class="Delimiter">);</span> +<span id="L283" class="LineNr">283 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"SF="</span> << SF << <span class="Constant">"; ZF="</span> << ZF << <span class="Constant">"; OF="</span> << <a href='010core.cc.html#L33'>OF</a> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span> +<span id="L284" class="LineNr">284 </span> <span class="Identifier">break</span><span class="Delimiter">;</span> +<span id="L285" class="LineNr">285 </span><span class="Delimiter">}</span> +<span id="L286" class="LineNr">286 </span> +<span id="L287" class="LineNr">287 </span><span class="Delimiter">:(scenario compare_imm32_with_r32_lesser)</span> +<span id="L288" class="LineNr">288 </span><span class="Special">% Reg[3].i = 0x0d0c0b07;</span> +<span id="L289" class="LineNr">289 </span><span class="Comment"># op ModRM SIB displacement immediate</span> +<span id="L290" class="LineNr">290 </span> <span class="Constant">81</span> fb 0a 0b 0c 0d <span class="Comment"># compare 0x0d0c0b0a with EBX (reg 3)</span> +<span id="L291" class="LineNr">291 </span><span class="traceContains">+run: combine <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b0a with effective address</span> +<span id="L292" class="LineNr">292 </span><span class="traceContains">+run: effective address is <a href='010core.cc.html#L17'>reg</a> 3</span> +<span id="L293" class="LineNr">293 </span><span class="traceContains">+run: SF=1; ZF=0; OF=0</span> +<span id="L294" class="LineNr">294 </span> +<span id="L295" class="LineNr">295 </span><span class="Delimiter">:(scenario compare_imm32_with_r32_equal)</span> +<span id="L296" class="LineNr">296 </span><span class="Special">% Reg[3].i = 0x0d0c0b0a;</span> +<span id="L297" class="LineNr">297 </span><span class="Comment"># op ModRM SIB displacement immediate</span> +<span id="L298" class="LineNr">298 </span> <span class="Constant">81</span> fb 0a 0b 0c 0d <span class="Comment"># compare 0x0d0c0b0a with EBX (reg 3)</span> +<span id="L299" class="LineNr">299 </span><span class="traceContains">+run: combine <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b0a with effective address</span> +<span id="L300" class="LineNr">300 </span><span class="traceContains">+run: effective address is <a href='010core.cc.html#L17'>reg</a> 3</span> +<span id="L301" class="LineNr">301 </span><span class="traceContains">+run: SF=0; ZF=1; OF=0</span> +<span id="L302" class="LineNr">302 </span> +<span id="L303" class="LineNr">303 </span><span class="Delimiter">:(scenario compare_imm32_with_mem_at_r32_greater)</span> +<span id="L304" class="LineNr">304 </span><span class="Special">% Reg[3].i = 0x60;</span> +<span id="L305" class="LineNr">305 </span><span class="Special">% SET_WORD_IN_MEM(0x60, 0x0d0c0b0a);</span> +<span id="L306" class="LineNr">306 </span><span class="Comment"># op ModRM SIB displacement immediate</span> +<span id="L307" class="LineNr">307 </span> <span class="Constant">81</span> 3b <span class="PreProc">0</span><span class="Constant">7</span> 0b 0c 0d <span class="Comment"># compare 0x0d0c0b07 with *EBX (reg 3)</span> +<span id="L308" class="LineNr">308 </span><span class="traceContains">+run: combine <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b07 with effective address</span> +<span id="L309" class="LineNr">309 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 3)</span> +<span id="L310" class="LineNr">310 </span><span class="traceContains">+run: SF=0; ZF=0; OF=0</span> +<span id="L311" class="LineNr">311 </span> +<span id="L312" class="LineNr">312 </span><span class="Delimiter">:(scenario compare_imm32_with_mem_at_r32_lesser)</span> +<span id="L313" class="LineNr">313 </span><span class="Special">% Reg[3].i = 0x60;</span> +<span id="L314" class="LineNr">314 </span><span class="Special">% SET_WORD_IN_MEM(0x60, 0x0d0c0b07);</span> +<span id="L315" class="LineNr">315 </span><span class="Comment"># op ModRM SIB displacement immediate</span> +<span id="L316" class="LineNr">316 </span> <span class="Constant">81</span> 3b 0a 0b 0c 0d <span class="Comment"># compare 0x0d0c0b0a with *EBX (reg 3)</span> +<span id="L317" class="LineNr">317 </span><span class="traceContains">+run: combine <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b0a with effective address</span> +<span id="L318" class="LineNr">318 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 3)</span> +<span id="L319" class="LineNr">319 </span><span class="traceContains">+run: SF=1; ZF=0; OF=0</span> +<span id="L320" class="LineNr">320 </span> +<span id="L321" class="LineNr">321 </span><span class="Delimiter">:(scenario compare_imm32_with_mem_at_r32_equal)</span> +<span id="L322" class="LineNr">322 </span><span class="Special">% Reg[3].i = 0x0d0c0b0a;</span> +<span id="L323" class="LineNr">323 </span><span class="Special">% Reg[3].i = 0x60;</span> +<span id="L324" class="LineNr">324 </span><span class="Special">% SET_WORD_IN_MEM(0x60, 0x0d0c0b0a);</span> +<span id="L325" class="LineNr">325 </span><span class="Comment"># op ModRM SIB displacement immediate</span> +<span id="L326" class="LineNr">326 </span> <span class="Constant">81</span> 3b 0a 0b 0c 0d <span class="Comment"># compare 0x0d0c0b0a with *EBX (reg 3)</span> +<span id="L327" class="LineNr">327 </span><span class="traceContains">+run: combine <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b0a with effective address</span> +<span id="L328" class="LineNr">328 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 3)</span> +<span id="L329" class="LineNr">329 </span><span class="traceContains">+run: SF=0; ZF=1; OF=0</span> +<span id="L330" class="LineNr">330 </span> +<span id="L331" class="LineNr">331 </span><span class="SalientComment">//:: copy (mov)</span> +<span id="L332" class="LineNr">332 </span> +<span id="L333" class="LineNr">333 </span><span class="Delimiter">:(scenario copy_imm32_to_r32)</span> +<span id="L334" class="LineNr">334 </span><span class="Comment"># op ModRM SIB displacement immediate</span> +<span id="L335" class="LineNr">335 </span> b8 <span class="PreProc">0</span><span class="Constant">3</span> 0a 0b 0c 0d <span class="Comment"># copy 0x0d0c0b0a to EBX (reg 3)</span> +<span id="L336" class="LineNr">336 </span><span class="traceContains">+run: copy <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b0a to <a href='010core.cc.html#L17'>reg</a> 3</span> +<span id="L337" class="LineNr">337 </span> +<span id="L338" class="LineNr">338 </span><span class="Delimiter">:(before "End Single-Byte Opcodes")</span> +<span id="L339" class="LineNr">339 </span><span class="Normal">case</span> <span class="Constant">0xb8</span>: <span class="Delimiter">{</span> <span class="Comment">// copy imm32 to r32</span> +<span id="L340" class="LineNr">340 </span> <span class="Normal">uint8_t</span> modrm = <a href='010core.cc.html#L214'>next</a><span class="Delimiter">();</span> +<span id="L341" class="LineNr">341 </span> <span class="Normal">int32_t</span> arg2 = <a href='010core.cc.html#L219'>imm32</a><span class="Delimiter">();</span> +<span id="L342" class="LineNr">342 </span> <span class="Normal">uint8_t</span> reg1 = modrm&<span class="Constant">0x7</span><span class="Delimiter">;</span> <span class="Comment">// ignore mod bits</span> +<span id="L343" class="LineNr">343 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"copy <a href='010core.cc.html#L219'>imm32</a> 0x"</span> << <a href='010core.cc.html#L230'>HEXWORD</a> << arg2 << <span class="Constant">" to <a href='010core.cc.html#L17'>reg</a> "</span> << <a href='010core.cc.html#L232'>NUM</a><span class="Delimiter">(</span>reg1<span class="Delimiter">)</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span> +<span id="L344" class="LineNr">344 </span> Reg[reg1]<span class="Delimiter">.</span>i = arg2<span class="Delimiter">;</span> +<span id="L345" class="LineNr">345 </span> <span class="Identifier">break</span><span class="Delimiter">;</span> +<span id="L346" class="LineNr">346 </span><span class="Delimiter">}</span> +<span id="L347" class="LineNr">347 </span> +<span id="L348" class="LineNr">348 </span><span class="Comment">//:</span> +<span id="L349" class="LineNr">349 </span> +<span id="L350" class="LineNr">350 </span><span class="Delimiter">:(scenario copy_imm32_to_mem_at_r32)</span> +<span id="L351" class="LineNr">351 </span><span class="Special">% Reg[3].i = 0x60;</span> +<span id="L352" class="LineNr">352 </span><span class="Comment"># op ModRM SIB displacement immediate</span> +<span id="L353" class="LineNr">353 </span> c7 <span class="PreProc">0</span><span class="Constant">3</span> 0a 0b 0c 0d <span class="Comment"># copy 0x0d0c0b0a to *EBX (reg 3)</span> +<span id="L354" class="LineNr">354 </span><span class="traceContains">+run: copy <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b0a to effective address</span> +<span id="L355" class="LineNr">355 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 3)</span> +<span id="L356" class="LineNr">356 </span> +<span id="L357" class="LineNr">357 </span><span class="Delimiter">:(before "End Single-Byte Opcodes")</span> +<span id="L358" class="LineNr">358 </span><span class="Normal">case</span> <span class="Constant">0xc7</span>: <span class="Delimiter">{</span> <span class="Comment">// copy imm32 to r32</span> +<span id="L359" class="LineNr">359 </span> <span class="Normal">uint8_t</span> modrm = <a href='010core.cc.html#L214'>next</a><span class="Delimiter">();</span> +<span id="L360" class="LineNr">360 </span> <span class="Normal">int32_t</span> arg2 = <a href='010core.cc.html#L219'>imm32</a><span class="Delimiter">();</span> +<span id="L361" class="LineNr">361 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"copy <a href='010core.cc.html#L219'>imm32</a> 0x"</span> << <a href='010core.cc.html#L230'>HEXWORD</a> << arg2 << <span class="Constant">" to effective address"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span> +<span id="L362" class="LineNr">362 </span> <span class="Normal">int32_t</span>* arg1 = <a href='011direct_addressing.cc.html#L26'>effective_address</a><span class="Delimiter">(</span>modrm<span class="Delimiter">);</span> +<span id="L363" class="LineNr">363 </span> *arg1 = arg2<span class="Delimiter">;</span> +<span id="L364" class="LineNr">364 </span> <span class="Identifier">break</span><span class="Delimiter">;</span> +<span id="L365" class="LineNr">365 </span><span class="Delimiter">}</span> +<span id="L366" class="LineNr">366 </span> +<span id="L367" class="LineNr">367 </span><span class="SalientComment">//:: push</span> +<span id="L368" class="LineNr">368 </span> +<span id="L369" class="LineNr">369 </span><span class="Delimiter">:(scenario push_imm32)</span> +<span id="L370" class="LineNr">370 </span><span class="Special">% Reg[ESP].u = 0x14;</span> +<span id="L371" class="LineNr">371 </span><span class="Comment"># op ModRM SIB displacement immediate</span> +<span id="L372" class="LineNr">372 </span> <span class="Constant">68</span> af <span class="PreProc">0</span><span class="Constant">0</span> <span class="PreProc">0</span><span class="Constant">0</span> <span class="PreProc">0</span><span class="Constant">0</span> <span class="Comment"># push *EAX (reg 0) to stack</span> +<span id="L373" class="LineNr">373 </span><span class="traceContains">+run: push <a href='010core.cc.html#L219'>imm32</a> 0x000000af</span> +<span id="L374" class="LineNr">374 </span><span class="traceContains">+run: <a href='010core.cc.html#L11'>ESP</a> is now 0x00000010</span> +<span id="L375" class="LineNr">375 </span><span class="traceContains">+run: <a href='003trace.cc.html#L74'>contents</a> at <a href='010core.cc.html#L11'>ESP</a>: 0x000000af</span> +<span id="L376" class="LineNr">376 </span> +<span id="L377" class="LineNr">377 </span><span class="Delimiter">:(before "End Single-Byte Opcodes")</span> +<span id="L378" class="LineNr">378 </span><span class="Normal">case</span> <span class="Constant">0x68</span>: <span class="Delimiter">{</span> +<span id="L379" class="LineNr">379 </span> <span class="Normal">int32_t</span> val = <a href='010core.cc.html#L219'>imm32</a><span class="Delimiter">();</span> +<span id="L380" class="LineNr">380 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"push <a href='010core.cc.html#L219'>imm32</a> 0x"</span> << <a href='010core.cc.html#L230'>HEXWORD</a> << val << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span> +<span id="L381" class="LineNr">381 </span> Reg[ESP]<span class="Delimiter">.</span>u -= <span class="Constant">4</span><span class="Delimiter">;</span> +<span id="L382" class="LineNr">382 </span> *<span class="Normal">reinterpret_cast</span><<span class="Normal">uint32_t</span>*><span class="Delimiter">(</span>&Mem<span class="Delimiter">.</span>at<span class="Delimiter">(</span>Reg[ESP]<span class="Delimiter">.</span>u<span class="Delimiter">))</span> = val<span class="Delimiter">;</span> +<span id="L383" class="LineNr">383 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"ESP is now 0x"</span> << <a href='010core.cc.html#L230'>HEXWORD</a> << Reg[ESP]<span class="Delimiter">.</span>u << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span> +<span id="L384" class="LineNr">384 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"contents at <a href='010core.cc.html#L11'>ESP</a>: 0x"</span> << <a href='010core.cc.html#L230'>HEXWORD</a> << *<span class="Normal">reinterpret_cast</span><<span class="Normal">uint32_t</span>*><span class="Delimiter">(</span>&Mem<span class="Delimiter">.</span>at<span class="Delimiter">(</span>Reg[ESP]<span class="Delimiter">.</span>u<span class="Delimiter">))</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span> +<span id="L385" class="LineNr">385 </span> <span class="Identifier">break</span><span class="Delimiter">;</span> +<span id="L386" class="LineNr">386 </span><span class="Delimiter">}</span> </pre> </body> </html> diff --git a/subx/013immediate_addressing.cc b/subx/013immediate_addressing.cc index 2e4b459a..14121d42 100644 --- a/subx/013immediate_addressing.cc +++ b/subx/013immediate_addressing.cc @@ -164,7 +164,12 @@ case 0x0d: { // or imm32 with EAX +run: subop or +run: storing 0xddccbbaa -//: +:(before "End Op 81 Subops") +case 1: { + trace(2, "run") << "subop or" << end(); + BINARY_BITWISE_OP(|, *arg1, arg2); + break; +} :(scenario or_imm32_with_r32) % Reg[3].i = 0xd0c0b0a0; @@ -175,13 +180,6 @@ case 0x0d: { // or imm32 with EAX +run: subop or +run: storing 0xddccbbaa -:(before "End Op 81 Subops") -case 1: { - trace(2, "run") << "subop or" << end(); - BINARY_BITWISE_OP(|, *arg1, arg2); - break; -} - //:: xor :(scenario xor_imm32_with_eax) @@ -211,7 +209,12 @@ case 0x35: { // xor imm32 with EAX +run: subop xor +run: storing 0xddccbbaa -//: +:(before "End Op 81 Subops") +case 6: { + trace(2, "run") << "subop xor" << end(); + BINARY_BITWISE_OP(^, *arg1, arg2); + break; +} :(scenario xor_imm32_with_r32) % Reg[3].i = 0xd0c0b0a0; @@ -222,13 +225,6 @@ case 0x35: { // xor imm32 with EAX +run: subop xor +run: storing 0xddccbbaa -:(before "End Op 81 Subops") -case 6: { - trace(2, "run") << "subop xor" << end(); - BINARY_BITWISE_OP(^, *arg1, arg2); - break; -} - //:: compare (cmp) :(scenario compare_imm32_with_eax_greater) |