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-rw-r--r--subx/013immediate_addressing.cc114
1 files changed, 57 insertions, 57 deletions
diff --git a/subx/013immediate_addressing.cc b/subx/013immediate_addressing.cc
index 4773e75f..3021617f 100644
--- a/subx/013immediate_addressing.cc
+++ b/subx/013immediate_addressing.cc
@@ -3,9 +3,9 @@
 :(scenario add_imm32_to_r32)
 % Reg[3].i = 1;
 # op  ModRM   SIB   displacement  immediate
-  81  c3                          0a 0b 0c 0d  # add 0x0d0c0b0a to EBX (reg 3)
+  81  c3                          0a 0b 0c 0d  # add 0x0d0c0b0a to EBX
 +run: combine imm32 0x0d0c0b0a with effective address
-+run: effective address is reg 3
++run: effective address is EBX
 +run: subop add
 +run: storing 0x0d0c0b0b
 
@@ -35,9 +35,9 @@ case 0x81: {  // combine imm32 with r/m32
 % Reg[3].i = 0x60;
 % SET_WORD_IN_MEM(0x60, 1);
 # op  ModR/M  SIB   displacement  immediate
-  81  03                          0a 0b 0c 0d  # add 0x0d0c0b0a to *EBX (reg 3)
+  81  03                          0a 0b 0c 0d  # add 0x0d0c0b0a to *EBX
 +run: combine imm32 0x0d0c0b0a with effective address
-+run: effective address is mem at address 0x60 (reg 3)
++run: effective address is mem at address 0x60 (EBX)
 +run: subop add
 +run: storing 0x0d0c0b0b
 
@@ -46,14 +46,14 @@ case 0x81: {  // combine imm32 with r/m32
 :(scenario subtract_imm32_from_eax)
 % Reg[EAX].i = 0x0d0c0baa;
 # op  ModR/M  SIB   displacement  immediate
-  2d                              0a 0b 0c 0d  # subtract 0x0d0c0b0a from EAX (reg 0)
-+run: subtract imm32 0x0d0c0b0a from reg EAX
+  2d                              0a 0b 0c 0d  # subtract 0x0d0c0b0a from EAX
++run: subtract imm32 0x0d0c0b0a from EAX
 +run: storing 0x000000a0
 
 :(before "End Single-Byte Opcodes")
 case 0x2d: {  // subtract imm32 from EAX
   int32_t arg2 = imm32();
-  trace(2, "run") << "subtract imm32 0x" << HEXWORD << arg2 << " from reg EAX" << end();
+  trace(2, "run") << "subtract imm32 0x" << HEXWORD << arg2 << " from EAX" << end();
   BINARY_ARITHMETIC_OP(-, Reg[EAX].i, arg2);
   break;
 }
@@ -64,9 +64,9 @@ case 0x2d: {  // subtract imm32 from EAX
 % Reg[3].i = 0x60;
 % SET_WORD_IN_MEM(0x60, 10);
 # op  ModRM   SIB   displacement  immediate
-  81  2b                          01 00 00 00  # subtract 1 from *EBX (reg 3)
+  81  2b                          01 00 00 00  # subtract 1 from *EBX
 +run: combine imm32 0x00000001 with effective address
-+run: effective address is mem at address 0x60 (reg 3)
++run: effective address is mem at address 0x60 (EBX)
 +run: subop subtract
 +run: storing 0x00000009
 
@@ -75,9 +75,9 @@ case 0x2d: {  // subtract imm32 from EAX
 :(scenario subtract_imm32_from_r32)
 % Reg[3].i = 10;
 # op  ModRM   SIB   displacement  immediate
-  81  eb                          01 00 00 00  # subtract 1 from EBX (reg 3)
+  81  eb                          01 00 00 00  # subtract 1 from EBX
 +run: combine imm32 0x00000001 with effective address
-+run: effective address is reg 3
++run: effective address is EBX
 +run: subop subtract
 +run: storing 0x00000009
 
@@ -93,14 +93,14 @@ case 5: {
 :(scenario and_imm32_with_eax)
 % Reg[EAX].i = 0xff;
 # op  ModR/M  SIB   displacement  immediate
-  25                              0a 0b 0c 0d  # and 0x0d0c0b0a with EAX (reg 0)
-+run: and imm32 0x0d0c0b0a with reg EAX
+  25                              0a 0b 0c 0d  # and 0x0d0c0b0a with EAX
++run: and imm32 0x0d0c0b0a with EAX
 +run: storing 0x0000000a
 
 :(before "End Single-Byte Opcodes")
 case 0x25: {  // and imm32 with EAX
   int32_t arg2 = imm32();
-  trace(2, "run") << "and imm32 0x" << HEXWORD << arg2 << " with reg EAX" << end();
+  trace(2, "run") << "and imm32 0x" << HEXWORD << arg2 << " with EAX" << end();
   BINARY_BITWISE_OP(&, Reg[EAX].i, arg2);
   break;
 }
@@ -111,9 +111,9 @@ case 0x25: {  // and imm32 with EAX
 % Reg[3].i = 0x60;
 % SET_WORD_IN_MEM(0x60, 0x000000ff);
 # op  ModRM   SIB   displacement  immediate
-  81  23                          0a 0b 0c 0d  # and 0x0d0c0b0a with *EBX (reg 3)
+  81  23                          0a 0b 0c 0d  # and 0x0d0c0b0a with *EBX
 +run: combine imm32 0x0d0c0b0a with effective address
-+run: effective address is mem at address 0x60 (reg 3)
++run: effective address is mem at address 0x60 (EBX)
 +run: subop and
 +run: storing 0x0000000a
 
@@ -122,9 +122,9 @@ case 0x25: {  // and imm32 with EAX
 :(scenario and_imm32_with_r32)
 % Reg[3].i = 0xff;
 # op  ModRM   SIB   displacement  immediate
-  81  e3                          0a 0b 0c 0d  # and 0x0d0c0b0a with EBX (reg 3)
+  81  e3                          0a 0b 0c 0d  # and 0x0d0c0b0a with EBX
 +run: combine imm32 0x0d0c0b0a with effective address
-+run: effective address is reg 3
++run: effective address is EBX
 +run: subop and
 +run: storing 0x0000000a
 
@@ -140,14 +140,14 @@ case 4: {
 :(scenario or_imm32_with_eax)
 % Reg[EAX].i = 0xd0c0b0a0;
 # op  ModR/M  SIB   displacement  immediate
-  0d                              0a 0b 0c 0d  # or 0x0d0c0b0a with EAX (reg 0)
-+run: or imm32 0x0d0c0b0a with reg EAX
+  0d                              0a 0b 0c 0d  # or 0x0d0c0b0a with EAX
++run: or imm32 0x0d0c0b0a with EAX
 +run: storing 0xddccbbaa
 
 :(before "End Single-Byte Opcodes")
 case 0x0d: {  // or imm32 with EAX
   int32_t arg2 = imm32();
-  trace(2, "run") << "or imm32 0x" << HEXWORD << arg2 << " with reg EAX" << end();
+  trace(2, "run") << "or imm32 0x" << HEXWORD << arg2 << " with EAX" << end();
   BINARY_BITWISE_OP(|, Reg[EAX].i, arg2);
   break;
 }
@@ -158,9 +158,9 @@ case 0x0d: {  // or imm32 with EAX
 % Reg[3].i = 0x60;
 % SET_WORD_IN_MEM(0x60, 0xd0c0b0a0);
 # op  ModRM   SIB   displacement  immediate
-  81  0b                          0a 0b 0c 0d  # or 0x0d0c0b0a with *EBX (reg 3)
+  81  0b                          0a 0b 0c 0d  # or 0x0d0c0b0a with *EBX
 +run: combine imm32 0x0d0c0b0a with effective address
-+run: effective address is mem at address 0x60 (reg 3)
++run: effective address is mem at address 0x60 (EBX)
 +run: subop or
 +run: storing 0xddccbbaa
 
@@ -174,9 +174,9 @@ case 1: {
 :(scenario or_imm32_with_r32)
 % Reg[3].i = 0xd0c0b0a0;
 # op  ModRM   SIB   displacement  immediate
-  81  cb                          0a 0b 0c 0d  # or 0x0d0c0b0a with EBX (reg 3)
+  81  cb                          0a 0b 0c 0d  # or 0x0d0c0b0a with EBX
 +run: combine imm32 0x0d0c0b0a with effective address
-+run: effective address is reg 3
++run: effective address is EBX
 +run: subop or
 +run: storing 0xddccbbaa
 
@@ -185,14 +185,14 @@ case 1: {
 :(scenario xor_imm32_with_eax)
 % Reg[EAX].i = 0xddccb0a0;
 # op  ModR/M  SIB   displacement  immediate
-  35                              0a 0b 0c 0d  # xor 0x0d0c0b0a with EAX (reg 0)
-+run: xor imm32 0x0d0c0b0a with reg EAX
+  35                              0a 0b 0c 0d  # xor 0x0d0c0b0a with EAX
++run: xor imm32 0x0d0c0b0a with EAX
 +run: storing 0xd0c0bbaa
 
 :(before "End Single-Byte Opcodes")
 case 0x35: {  // xor imm32 with EAX
   int32_t arg2 = imm32();
-  trace(2, "run") << "xor imm32 0x" << HEXWORD << arg2 << " with reg EAX" << end();
+  trace(2, "run") << "xor imm32 0x" << HEXWORD << arg2 << " with EAX" << end();
   BINARY_BITWISE_OP(^, Reg[EAX].i, arg2);
   break;
 }
@@ -203,9 +203,9 @@ case 0x35: {  // xor imm32 with EAX
 % Reg[3].i = 0x60;
 % SET_WORD_IN_MEM(0x60, 0xd0c0b0a0);
 # op  ModRM   SIB   displacement  immediate
-  81  33                          0a 0b 0c 0d  # xor 0x0d0c0b0a with *EBX (reg 3)
+  81  33                          0a 0b 0c 0d  # xor 0x0d0c0b0a with *EBX
 +run: combine imm32 0x0d0c0b0a with effective address
-+run: effective address is mem at address 0x60 (reg 3)
++run: effective address is mem at address 0x60 (EBX)
 +run: subop xor
 +run: storing 0xddccbbaa
 
@@ -219,9 +219,9 @@ case 6: {
 :(scenario xor_imm32_with_r32)
 % Reg[3].i = 0xd0c0b0a0;
 # op  ModRM   SIB   displacement  immediate
-  81  f3                          0a 0b 0c 0d  # xor 0x0d0c0b0a with EBX (reg 3)
+  81  f3                          0a 0b 0c 0d  # xor 0x0d0c0b0a with EBX
 +run: combine imm32 0x0d0c0b0a with effective address
-+run: effective address is reg 3
++run: effective address is EBX
 +run: subop xor
 +run: storing 0xddccbbaa
 
@@ -230,15 +230,15 @@ case 6: {
 :(scenario compare_imm32_with_eax_greater)
 % Reg[0].i = 0x0d0c0b0a;
 # op  ModRM   SIB   displacement  immediate
-  3d                              07 0b 0c 0d  # compare 0x0d0c0b07 with EAX (reg 0)
-+run: compare reg EAX and imm32 0x0d0c0b07
+  3d                              07 0b 0c 0d  # compare 0x0d0c0b07 with EAX
++run: compare EAX and imm32 0x0d0c0b07
 +run: SF=0; ZF=0; OF=0
 
 :(before "End Single-Byte Opcodes")
 case 0x3d: {  // subtract imm32 from EAX
   int32_t arg1 = Reg[EAX].i;
   int32_t arg2 = imm32();
-  trace(2, "run") << "compare reg EAX and imm32 0x" << HEXWORD << arg2 << end();
+  trace(2, "run") << "compare EAX and imm32 0x" << HEXWORD << arg2 << end();
   int32_t tmp1 = arg1 - arg2;
   SF = (tmp1 < 0);
   ZF = (tmp1 == 0);
@@ -251,15 +251,15 @@ case 0x3d: {  // subtract imm32 from EAX
 :(scenario compare_imm32_with_eax_lesser)
 % Reg[0].i = 0x0d0c0b07;
 # op  ModRM   SIB   displacement  immediate
-  3d                              0a 0b 0c 0d  # compare 0x0d0c0b0a with EAX (reg 0)
-+run: compare reg EAX and imm32 0x0d0c0b0a
+  3d                              0a 0b 0c 0d  # compare 0x0d0c0b0a with EAX
++run: compare EAX and imm32 0x0d0c0b0a
 +run: SF=1; ZF=0; OF=0
 
 :(scenario compare_imm32_with_eax_equal)
 % Reg[0].i = 0x0d0c0b0a;
 # op  ModRM   SIB   displacement  immediate
-  3d                              0a 0b 0c 0d  # compare 0x0d0c0b0a with EAX (reg 0)
-+run: compare reg EAX and imm32 0x0d0c0b0a
+  3d                              0a 0b 0c 0d  # compare 0x0d0c0b0a with EAX
++run: compare EAX and imm32 0x0d0c0b0a
 +run: SF=0; ZF=1; OF=0
 
 //:
@@ -267,9 +267,9 @@ case 0x3d: {  // subtract imm32 from EAX
 :(scenario compare_imm32_with_r32_greater)
 % Reg[3].i = 0x0d0c0b0a;
 # op  ModRM   SIB   displacement  immediate
-  81  fb                          07 0b 0c 0d  # compare 0x0d0c0b07 with EBX (reg 3)
+  81  fb                          07 0b 0c 0d  # compare 0x0d0c0b07 with EBX
 +run: combine imm32 0x0d0c0b07 with effective address
-+run: effective address is reg 3
++run: effective address is EBX
 +run: SF=0; ZF=0; OF=0
 
 :(before "End Op 81 Subops")
@@ -287,35 +287,35 @@ case 7: {
 :(scenario compare_imm32_with_r32_lesser)
 % Reg[3].i = 0x0d0c0b07;
 # op  ModRM   SIB   displacement  immediate
-  81  fb                          0a 0b 0c 0d  # compare 0x0d0c0b0a with EBX (reg 3)
+  81  fb                          0a 0b 0c 0d  # compare 0x0d0c0b0a with EBX
 +run: combine imm32 0x0d0c0b0a with effective address
-+run: effective address is reg 3
++run: effective address is EBX
 +run: SF=1; ZF=0; OF=0
 
 :(scenario compare_imm32_with_r32_equal)
 % Reg[3].i = 0x0d0c0b0a;
 # op  ModRM   SIB   displacement  immediate
-  81  fb                          0a 0b 0c 0d  # compare 0x0d0c0b0a with EBX (reg 3)
+  81  fb                          0a 0b 0c 0d  # compare 0x0d0c0b0a with EBX
 +run: combine imm32 0x0d0c0b0a with effective address
-+run: effective address is reg 3
++run: effective address is EBX
 +run: SF=0; ZF=1; OF=0
 
 :(scenario compare_imm32_with_mem_at_r32_greater)
 % Reg[3].i = 0x60;
 % SET_WORD_IN_MEM(0x60, 0x0d0c0b0a);
 # op  ModRM   SIB   displacement  immediate
-  81  3b                          07 0b 0c 0d  # compare 0x0d0c0b07 with *EBX (reg 3)
+  81  3b                          07 0b 0c 0d  # compare 0x0d0c0b07 with *EBX
 +run: combine imm32 0x0d0c0b07 with effective address
-+run: effective address is mem at address 0x60 (reg 3)
++run: effective address is mem at address 0x60 (EBX)
 +run: SF=0; ZF=0; OF=0
 
 :(scenario compare_imm32_with_mem_at_r32_lesser)
 % Reg[3].i = 0x60;
 % SET_WORD_IN_MEM(0x60, 0x0d0c0b07);
 # op  ModRM   SIB   displacement  immediate
-  81  3b                          0a 0b 0c 0d  # compare 0x0d0c0b0a with *EBX (reg 3)
+  81  3b                          0a 0b 0c 0d  # compare 0x0d0c0b0a with *EBX
 +run: combine imm32 0x0d0c0b0a with effective address
-+run: effective address is mem at address 0x60 (reg 3)
++run: effective address is mem at address 0x60 (EBX)
 +run: SF=1; ZF=0; OF=0
 
 :(scenario compare_imm32_with_mem_at_r32_equal)
@@ -323,17 +323,17 @@ case 7: {
 % Reg[3].i = 0x60;
 % SET_WORD_IN_MEM(0x60, 0x0d0c0b0a);
 # op  ModRM   SIB   displacement  immediate
-  81  3b                          0a 0b 0c 0d  # compare 0x0d0c0b0a with *EBX (reg 3)
+  81  3b                          0a 0b 0c 0d  # compare 0x0d0c0b0a with *EBX
 +run: combine imm32 0x0d0c0b0a with effective address
-+run: effective address is mem at address 0x60 (reg 3)
++run: effective address is mem at address 0x60 (EBX)
 +run: SF=0; ZF=1; OF=0
 
 //:: copy (mov)
 
 :(scenario copy_imm32_to_r32)
 # op  ModRM   SIB   displacement  immediate
-  bb                              0a 0b 0c 0d  # copy 0x0d0c0b0a to EBX (reg 3)
-+run: copy imm32 0x0d0c0b0a to reg 3
+  bb                              0a 0b 0c 0d  # copy 0x0d0c0b0a to EBX
++run: copy imm32 0x0d0c0b0a to EBX
 
 :(before "End Single-Byte Opcodes")
 case 0xb8:
@@ -346,7 +346,7 @@ case 0xbe:
 case 0xbf: {  // copy imm32 to r32
   uint8_t reg1 = op & 0x7;
   int32_t arg2 = imm32();
-  trace(2, "run") << "copy imm32 0x" << HEXWORD << arg2 << " to reg " << NUM(reg1) << end();
+  trace(2, "run") << "copy imm32 0x" << HEXWORD << arg2 << " to " << rname(reg1) << end();
   Reg[reg1].i = arg2;
   break;
 }
@@ -356,9 +356,9 @@ case 0xbf: {  // copy imm32 to r32
 :(scenario copy_imm32_to_mem_at_r32)
 % Reg[3].i = 0x60;
 # op  ModRM   SIB   displacement  immediate
-  c7  03                          0a 0b 0c 0d  # copy 0x0d0c0b0a to *EBX (reg 3)
+  c7  03                          0a 0b 0c 0d  # copy 0x0d0c0b0a to *EBX
 +run: copy imm32 0x0d0c0b0a to effective address
-+run: effective address is mem at address 0x60 (reg 3)
++run: effective address is mem at address 0x60 (EBX)
 
 :(before "End Single-Byte Opcodes")
 case 0xc7: {  // copy imm32 to r32
@@ -375,7 +375,7 @@ case 0xc7: {  // copy imm32 to r32
 :(scenario push_imm32)
 % Reg[ESP].u = 0x14;
 # op  ModRM   SIB   displacement  immediate
-  68                              af 00 00 00  # push *EAX (reg 0) to stack
+  68                              af 00 00 00  # push *EAX to stack
 +run: push imm32 0x000000af
 +run: ESP is now 0x00000010
 +run: contents at ESP: 0x000000af