From 3d053e34b71832b38d77bb777e7acabcb1e63e76 Mon Sep 17 00:00:00 2001 From: Kartik Agaram Date: Thu, 1 Oct 2020 00:46:38 -0700 Subject: 6919 --- html/mu_instructions.html | 104 +++++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 98 insertions(+), 6 deletions(-) diff --git a/html/mu_instructions.html b/html/mu_instructions.html index 0c66bc97..3a2313c5 100644 --- a/html/mu_instructions.html +++ b/html/mu_instructions.html @@ -60,6 +60,7 @@ var/reg <- add var2/reg2 => <- add var2 => "03/add *(ebp+" var2.stack-offset ") " reg "/r32" var/reg <- add *var2/reg2 => "03/add *" reg2 " " reg "/r32" add-to var1, var2/reg => "01/add-to *(ebp+" var1.stack-offset ") " reg "/r32" +add-to *var1/reg1, var2/reg2 => "01/add-to *" reg1 " " reg2 "/r32" var/eax <- add n => "05/add-to-eax " n "/imm32" var/reg <- add n => "81 0/subop/add %" reg " " n "/imm32" add-to var, n => "81 0/subop/add *(ebp+" var.stack-offset ") " n "/imm32" @@ -69,6 +70,7 @@ var/reg <- subtract var2/reg2 => <- subtract var2 => "2b/subtract *(ebp+" var2.stack-offset ") " reg "/r32" var/reg <- subtract *var2/reg2 => "2b/subtract *" reg2 " " reg1 "/r32" subtract-from var1, var2/reg2 => "29/subtract-from *(ebp+" var1.stack-offset ") " reg2 "/r32" +subtract-from *var1/reg1, var2/reg2 => "29/subtract-from *" reg1 " " reg2 "/r32" var/eax <- subtract n => "2d/subtract-from-eax " n "/imm32" var/reg <- subtract n => "81 5/subop/subtract %" reg " " n "/imm32" subtract-from var, n => "81 5/subop/subtract *(ebp+" var.stack-offset ") " n "/imm32" @@ -78,6 +80,7 @@ var/reg <- and var2/reg2 => <- and var2 => "23/and *(ebp+" var2.stack-offset " " reg "/r32" var/reg <- and *var2/reg2 => "23/and *" reg2 " " reg "/r32" and-with var1, var2/reg => "21/and-with *(ebp+" var1.stack-offset ") " reg "/r32" +and-with *var1/reg1, var2/reg2 => "21/and-with *" reg1 " " reg2 "/r32" var/eax <- and n => "25/and-with-eax " n "/imm32" var/reg <- and n => "81 4/subop/and %" reg " " n "/imm32" and-with var, n => "81 4/subop/and *(ebp+" var.stack-offset ") " n "/imm32" @@ -87,6 +90,7 @@ var/reg <- or var2/reg2 => <- or var2 => "0b/or *(ebp+" var2.stack-offset ") " reg "/r32" var/reg <- or *var2/reg2 => "0b/or *" reg2 " " reg "/r32" or-with var1, var2/reg2 => "09/or-with *(ebp+" var1.stack-offset " " reg2 "/r32" +or-with *var1/reg1, var2/reg2 => "09/or-with *" reg1 " " reg2 "/r32" var/eax <- or n => "0d/or-with-eax " n "/imm32" var/reg <- or n => "81 1/subop/or %" reg " " n "/imm32" or-with var, n => "81 1/subop/or *(ebp+" var.stack-offset ") " n "/imm32" @@ -96,17 +100,21 @@ var/reg <- xor var2/reg2 => <- xor var2 => "33/xor *(ebp+" var2.stack-offset ") " reg "/r32" var/reg <- xor *var2/reg2 => "33/xor *" reg2 " " reg "/r32" xor-with var1, var2/reg => "31/xor-with *(ebp+" var1.stack-offset ") " reg "/r32" +xor-with *var1/reg1, var2/reg2 => "31/xor-with *" reg1 " " reg2 "/r32" var/eax <- xor n => "35/xor-with-eax " n "/imm32" var/reg <- xor n => "81 6/subop/xor %" reg " " n "/imm32" xor-with var, n => "81 6/subop/xor *(ebp+" var.stack-offset ") " n "/imm32" xor-with *var/reg, n => "81 6/subop/xor *" reg " " n "/imm32" -var/reg <- shift-left n -var/reg <- shift-right n -var/reg <- shift-right-signed n -shift-left var, n -shift-right var, n -shift-right-signed var, n +var/reg <- shift-left n => "c1/shift 4/subop/left %" reg " " n "/imm32" +var/reg <- shift-right n => "c1/shift 5/subop/right %" reg " " n "/imm32" +var/reg <- shift-right-signed n => "c1/shift 7/subop/right-signed %" reg " " n "/imm32" +shift-left var, n => "c1/shift 4/subop/left *(ebp+" var.stack-offset ") " n "/imm32" +shift-left *var/reg, n => "c1/shift 4/subop/left *" reg " " n "/imm32" +shift-right var, n => "c1/shift 5/subop/right *(ebp+" var.stack-offset ") " n "/imm32" +shift-right *var/reg, n => "c1/shift 5/subop/right *" reg " " n "/imm32" +shift-right-signed var, n => "c1/shift 7/subop/right-signed *(ebp+" var.stack-offset ") " n "/imm32" +shift-right-signed *var/reg, n => "c1/shift 7/subop/right-signed *" reg " " n "/imm32" var/eax <- copy n => "b8/copy-to-eax " n "/imm32" var/ecx <- copy n => "b9/copy-to-ecx " n "/imm32" @@ -116,6 +124,7 @@ var/esi <- cop var/edi <- copy n => "bf/copy-to-edi " n "/imm32" var/reg <- copy var2/reg2 => "89/<- %" reg " " reg2 "/r32" copy-to var1, var2/reg => "89/<- *(ebp+" var1.stack-offset ") " reg "/r32" +copy-to *var1/reg1, var2/reg2 => "89/<- *" reg1 " " reg2 "/r32" var/reg <- copy var2 => "8b/-> *(ebp+" var2.stack-offset ") " reg "/r32" var/reg <- copy *var2/reg2 => "8b/-> *" reg2 " " reg "/r32" var/reg <- copy n => "c7 0/subop/copy %" reg " " n "/imm32" @@ -193,6 +202,12 @@ var/reg <- multiply *var2/reg2 => loop-if-addr>= => "0f 83/jump-if-addr>= loop/disp32" loop-if-addr>= label => "0f 83/jump-if-addr>= " label ":loop/disp32" +Similar float variants like `break-if-loop<` are aliases for the corresponding +`addr` equivalents. The x86 instruction set stupidly has floating-point +operations only update a subset of flags. + +--- + In the following instructions types are provided for clarity even if they must be provided in an earlier 'var' declaration. @@ -278,6 +293,83 @@ read-from-stream s: (addr stream T), out: (addr T) write-to-stream s: (addr stream T), in: (addr T) => "(write-to-stream " s " " in " " size-of(T) ")" +# Floating-point operations + +All the instructions so far use Intel's general-purpose integer registers. +However, some of them translate to different SubX if their arguments are in +floating-point registers. + +var/xreg <- add var2/xreg2 => "f3 0f 58/add 3/mod " xreg2 "/xm32 " xreg1 "/x32" +var/xreg <- add var2 => "f3 0f 58/add *(ebp+" var2.stack-offset ") " xreg "/x32" +var/xreg <- add *var2/reg2 => "f3 0f 58/add *" reg2 " " xreg "/x32" + +var/xreg <- subtract var2/xreg2 => "f3 0f 5c/subtract 3/mod " xreg2 "/xm32 " xreg1 "/x32" +var/xreg <- subtract var2 => "f3 0f 5c/subtract *(ebp+" var2.stack-offset ") " xreg "/x32" +var/xreg <- subtract *var2/reg2 => "f3 0f 5c/subtract *" reg2 " " xreg "/x32" + +var/xreg <- multiply var2/xreg2 => "f3 0f 59/multiply 3/mod " xreg2 "/xm32 " xreg1 "/x32" +var/xreg <- multiply var2 => "f3 0f 59/multiply *(ebp+" var2.stack-offset ") " xreg "/x32" +var/xreg <- multiply *var2/reg2 => "f3 0f 59/multiply *" reg2 " " xreg "/x32" + +var/xreg <- divide var2/xreg2 => "f3 0f 5e/divide 3/mod " xreg2 "/xm32 " xreg1 "/x32" +var/xreg <- divide var2 => "f3 0f 5e/divide *(ebp+" var2.stack-offset ") " xreg "/x32" +var/xreg <- divide *var2/reg2 => "f3 0f 5e/divide *" reg2 " " xreg "/x32" + +There are also some exclusively floating-point instructions: + +var/xreg <- reciprocal var2/xreg2 => "f3 0f 53/reciprocal 3/mod " xreg2 "/xm32 " xreg1 "/x32" +var/xreg <- reciprocal var2 => "f3 0f 53/reciprocal *(ebp+" var2.stack-offset ") " xreg "/x32" +var/xreg <- reciprocal *var2/reg2 => "f3 0f 53/reciprocal *" reg2 " " xreg "/x32" + +var/xreg <- square-root var2/xreg2 => "f3 0f 51/square-root 3/mod " xreg2 "/xm32 " xreg1 "/x32" +var/xreg <- square-root var2 => "f3 0f 51/square-root *(ebp+" var2.stack-offset ") " xreg "/x32" +var/xreg <- square-root *var2/reg2 => "f3 0f 51/square-root *" reg2 " " xreg "/x32" + +var/xreg <- inverse-square-root var2/xreg2 => "f3 0f 52/inverse-square-root 3/mod " xreg2 "/xm32 " xreg1 "/x32" +var/xreg <- inverse-square-root var2 => "f3 0f 52/inverse-square-root *(ebp+" var2.stack-offset ") " xreg "/x32" +var/xreg <- inverse-square-root *var2/reg2 => "f3 0f 52/inverse-square-root *" reg2 " " xreg "/x32" + +var/xreg <- min var2/xreg2 => "f3 0f 5d/min 3/mod " xreg2 "/xm32 " xreg1 "/x32" +var/xreg <- min var2 => "f3 0f 5d/min *(ebp+" var2.stack-offset ") " xreg "/x32" +var/xreg <- min *var2/reg2 => "f3 0f 5d/min *" reg2 " " xreg "/x32" + +var/xreg <- max var2/xreg2 => "f3 0f 5f/max 3/mod " xreg2 "/xm32 " xreg1 "/x32" +var/xreg <- max var2 => "f3 0f 5f/max *(ebp+" var2.stack-offset ") " xreg "/x32" +var/xreg <- max *var2/reg2 => "f3 0f 5f/max *" reg2 " " xreg "/x32" + +Remember, when these instructions use indirect mode, they still use an integer +register. Floating-point registers can't hold addresses. + +Most instructions operate exclusively on integer or floating-point operands. +The only exceptions are the instructions for converting between integers and +floating-point numbers. + +var/xreg <- convert var2/reg2 => "f3 0f 2a/convert-to-float %" reg2 " " xreg "/x32" +var/xreg <- convert var2 => "f3 0f 2a/convert-to-float *(ebp+" var2.stack-offset ") " xreg "/x32" +var/xreg <- convert *var2/reg2 => "f3 0f 2a/convert-to-float *" reg2 " " xreg "/x32" + +var/reg <- convert var2/xreg2 => "f3 0f 2d/convert-to-int 3/mod " xreg2 "/xm32 " reg "/r32" +var/reg <- convert var2 => "f3 0f 2d/convert-to-int *(ebp+" var2.stack-offset ") " reg "/r32" +var/reg <- convert *var2/reg2 => "f3 0f 2d/convert-to-int *" reg2 " " reg "/r32" + +There are no instructions accepting floating-point literals. To obtain integer +literals in floating-point registers, copy them to general-purpose registers +and then convert them to floating-point. + +One pattern you may have noticed above is that the floating-point instructions +above always write to registers. The only exceptions are `copy` instructions, +which can write to memory locations. + +var/xreg <- copy var2/xreg2 => "f3 0f 11/<- 3/mod " xreg "/xm32 " xreg2 "/x32" +copy-to var1, var2/xreg => "f3 0f 11/<- *(ebp+" var1.stack-offset ") " xreg "/x32" +var/xreg <- copy var2 => "f3 0f 10/-> *(ebp+" var2.stack-offset ") " xreg "/x32" +var/xreg <- copy *var2/reg2 => "f3 0f 10/-> *" reg2 " " xreg "/x32" + +Comparisons must always start with a register: + +compare var1/xreg1, var2/xreg2 => "0f 2f/compare 3/mod " xreg2 "/xm32 " xreg1 "/x32" +compare var1/xreg1, var2 => "0f 2f/compare 2/mod *(ebp+" var2.stack-offset ") " xreg1 "/x32" + vim:ft=mu:nowrap:textwidth=0 -- cgit 1.4.1-2-gfad0