From ba2ec7250d4060e8ebf4a54c31f87d03ab9d8e27 Mon Sep 17 00:00:00 2001 From: "Kartik K. Agaram" Date: Fri, 13 Oct 2017 01:27:51 -0700 Subject: 4059 --- html/subx/011direct_addressing.cc.html | 231 +++++++++++++++++++++++---------- 1 file changed, 159 insertions(+), 72 deletions(-) (limited to 'html/subx/011direct_addressing.cc.html') diff --git a/html/subx/011direct_addressing.cc.html b/html/subx/011direct_addressing.cc.html index 42dd9ea1..97745fd0 100644 --- a/html/subx/011direct_addressing.cc.html +++ b/html/subx/011direct_addressing.cc.html @@ -15,19 +15,20 @@ body { font-size: 12pt; font-family: monospace; color: #aaaaaa; background-color a { color:#eeeeee; text-decoration: none; } a:hover { text-decoration: underline; } * { font-size: 12pt; font-size: 1em; } -.Constant { color: #00a0a0; } -.Special { color: #c00000; } -.Conceal { color: #4e4e4e; } .SalientComment { color: #00ffff; } -.Comment { color: #9090ff; } -.Comment a { color:#0000ee; text-decoration:underline; } -.Delimiter { color: #800080; } .LineNr { color: #444444; } -.Identifier { color: #c0a020; } +.Error { color: #ffffff; background-color: #ff6060; padding-bottom: 1px; } +.Delimiter { color: #800080; } .Normal { color: #aaaaaa; background-color: #080808; padding-bottom: 1px; } -.PreProc { color: #800080; } .cSpecial { color: #008000; } +.Conceal { color: #4e4e4e; } +.Comment { color: #9090ff; } +.Comment a { color:#0000ee; text-decoration:underline; } +.Constant { color: #00a0a0; } +.Special { color: #c00000; } +.Identifier { color: #c0a020; } .traceContains { color: #008000; } +.PreProc { color: #800080; } --> @@ -62,70 +63,156 @@ if ('onhashchange' in window) {

- 1 //: operating directly on a register
- 2 
- 3 :(scenario add_r32_to_r32)
- 4 % Reg[0].i = 0x10;
- 5 % Reg[3].i = 1;
- 6 # op  ModR/M  SIB   displacement  immediate
- 7   01  d8                                      # add EBX (reg 3) to EAX (reg 0)
- 8 +run: add reg 3 to effective address
- 9 +run: effective address is reg 0
-10 +run: storing 0x00000011
-11 
-12 :(before "End Single-Byte Opcodes")
-13 case 0x01: {  // add r32 to r/m32
-14   uint8_t modrm = next();
-15   uint8_t arg2 = (modrm>>3)&0x7;
-16   trace(2, "run") << "add reg " << NUM(arg2) << " to effective address" << end();
-17   int32_t* arg1 = effective_address(modrm);
-18   BINARY_ARITHMETIC_OP(+, *arg1, Reg[arg2].i);
-19   break;
-20 }
-21 
-22 :(code)
-23 // Implement tables 2-2 and 2-3 in the Intel manual, Volume 2.
-24 // We return a pointer so that instructions can write to multiple bytes in
-25 // 'Mem' at once.
-26 int32_t* effective_address(uint8_t modrm) {
-27   uint8_t mod = (modrm>>6);
-28   // ignore middle 3 'reg opcode' bits
-29   uint8_t rm = modrm & 0x7;
-30   int32_t* result = 0;
-31   switch (mod) {
-32   case 3:
-33   ¦ // mod 3 is just register direct addressing
-34   ¦ trace(2, "run") << "effective address is reg " << NUM(rm) << end();
-35   ¦ result = &Reg[rm].i;
-36   ¦ break;
-37   // End Mod Special-cases
-38   default:
-39   ¦ cerr << "unrecognized mod bits: " << NUM(mod) << '\n';
-40   ¦ exit(1);
-41   }
-42   return result;
-43 }
-44 
-45 //:: subtract
-46 
-47 :(scenario subtract_r32_from_r32)
-48 % Reg[0].i = 10;
-49 % Reg[3].i = 1;
-50 # op  ModR/M  SIB   displacement  immediate
-51   29  d8                                      # subtract EBX (reg 3) from EAX (reg 0)
-52 +run: subtract reg 3 from effective address
-53 +run: effective address is reg 0
-54 +run: storing 0x00000009
-55 
-56 :(before "End Single-Byte Opcodes")
-57 case 0x29: {  // subtract r32 from r/m32
-58   uint8_t modrm = next();
-59   uint8_t arg2 = (modrm>>3)&0x7;
-60   trace(2, "run") << "subtract reg " << NUM(arg2) << " from effective address" << end();
-61   int32_t* arg1 = effective_address(modrm);
-62   BINARY_ARITHMETIC_OP(-, *arg1, Reg[arg2].i);
-63   break;
-64 }
+  1 //: operating directly on a register
+  2 
+  3 :(scenario add_r32_to_r32)
+  4 % Reg[0].i = 0x10;
+  5 % Reg[3].i = 1;
+  6 # op  ModR/M  SIB   displacement  immediate
+  7   01  d8                                      # add EBX (reg 3) to EAX (reg 0)
+  8 +run: add reg 3 to effective address
+  9 +run: effective address is reg 0
+ 10 +run: storing 0x00000011
+ 11 
+ 12 :(before "End Single-Byte Opcodes")
+ 13 case 0x01: {  // add r32 to r/m32
+ 14   uint8_t modrm = next();
+ 15   uint8_t arg2 = (modrm>>3)&0x7;
+ 16   trace(2, "run") << "add reg " << NUM(arg2) << " to effective address" << end();
+ 17   int32_t* arg1 = effective_address(modrm);
+ 18   BINARY_ARITHMETIC_OP(+, *arg1, Reg[arg2].i);
+ 19   break;
+ 20 }
+ 21 
+ 22 :(code)
+ 23 // Implement tables 2-2 and 2-3 in the Intel manual, Volume 2.
+ 24 // We return a pointer so that instructions can write to multiple bytes in
+ 25 // 'Mem' at once.
+ 26 int32_t* effective_address(uint8_t modrm) {
+ 27   uint8_t mod = (modrm>>6);
+ 28   // ignore middle 3 'reg opcode' bits
+ 29   uint8_t rm = modrm & 0x7;
+ 30   int32_t* result = 0;
+ 31   switch (mod) {
+ 32   case 3:
+ 33   ¦ // mod 3 is just register direct addressing
+ 34   ¦ trace(2, "run") << "effective address is reg " << NUM(rm) << end();
+ 35   ¦ result = &Reg[rm].i;
+ 36   ¦ break;
+ 37   // End Mod Special-cases
+ 38   default:
+ 39   ¦ cerr << "unrecognized mod bits: " << NUM(mod) << '\n';
+ 40   ¦ exit(1);
+ 41   }
+ 42   return result;
+ 43 }
+ 44 
+ 45 //:: subtract
+ 46 
+ 47 :(scenario subtract_r32_from_r32)
+ 48 % Reg[0].i = 10;
+ 49 % Reg[3].i = 1;
+ 50 # op  ModR/M  SIB   displacement  immediate
+ 51   29  d8                                      # subtract EBX (reg 3) from EAX (reg 0)
+ 52 +run: subtract reg 3 from effective address
+ 53 +run: effective address is reg 0
+ 54 +run: storing 0x00000009
+ 55 
+ 56 :(before "End Single-Byte Opcodes")
+ 57 case 0x29: {  // subtract r32 from r/m32
+ 58   uint8_t modrm = next();
+ 59   uint8_t arg2 = (modrm>>3)&0x7;
+ 60   trace(2, "run") << "subtract reg " << NUM(arg2) << " from effective address" << end();
+ 61   int32_t* arg1 = effective_address(modrm);
+ 62   BINARY_ARITHMETIC_OP(-, *arg1, Reg[arg2].i);
+ 63   break;
+ 64 }
+ 65 
+ 66 //:: and
+ 67 
+ 68 :(scenario and_r32_with_r32)
+ 69 % Reg[0].i = 0x0a0b0c0d;
+ 70 % Reg[3].i = 0x000000ff;
+ 71 # op  ModR/M  SIB   displacement  immediate
+ 72   21  d8                                      # and EBX (reg 3) with destination EAX (reg 0)
+ 73 +run: and reg 3 with effective address
+ 74 +run: effective address is reg 0
+ 75 +run: storing 0x0000000d
+ 76 
+ 77 :(before "End Single-Byte Opcodes")
+ 78 case 0x21: {  // and r32 with r/m32
+ 79   uint8_t modrm = next();
+ 80   uint8_t arg2 = (modrm>>3)&0x7;
+ 81   trace(2, "run") << "and reg " << NUM(arg2) << " with effective address" << end();
+ 82   int32_t* arg1 = effective_address(modrm);
+ 83   BINARY_BITWISE_OP(&, *arg1, Reg[arg2].u);
+ 84   break;
+ 85 }
+ 86 
+ 87 //:: or
+ 88 
+ 89 :(scenario or_r32_with_r32)
+ 90 % Reg[0].i = 0x0a0b0c0d;
+ 91 % Reg[3].i = 0xa0b0c0d0;
+ 92 # op  ModR/M  SIB   displacement  immediate
+ 93   09  d8                                      # or EBX (reg 3) with destination EAX (reg 0)
+ 94 +run: or reg 3 with effective address
+ 95 +run: effective address is reg 0
+ 96 +run: storing 0xaabbccdd
+ 97 
+ 98 :(before "End Single-Byte Opcodes")
+ 99 case 0x09: {  // or r32 with r/m32
+100   uint8_t modrm = next();
+101   uint8_t arg2 = (modrm>>3)&0x7;
+102   trace(2, "run") << "or reg " << NUM(arg2) << " with effective address" << end();
+103   int32_t* arg1 = effective_address(modrm);
+104   BINARY_BITWISE_OP(|, *arg1, Reg[arg2].u);
+105   break;
+106 }
+107 
+108 //:: xor
+109 
+110 :(scenario xor_r32_with_r32)
+111 % Reg[0].i = 0x0a0b0c0d;
+112 % Reg[3].i = 0xaabbc0d0;
+113 # op  ModR/M  SIB   displacement  immediate
+114   31  d8                                      # xor EBX (reg 3) with destination EAX (reg 0)
+115 +run: xor reg 3 with effective address
+116 +run: effective address is reg 0
+117 +run: storing 0xa0b0ccdd
+118 
+119 :(before "End Single-Byte Opcodes")
+120 case 0x31: {  // xor r32 with r/m32
+121   uint8_t modrm = next();
+122   uint8_t arg2 = (modrm>>3)&0x7;
+123   trace(2, "run") << "xor reg " << NUM(arg2) << " with effective address" << end();
+124   int32_t* arg1 = effective_address(modrm);
+125   BINARY_BITWISE_OP(^, *arg1, Reg[arg2].u);
+126   break;
+127 }
+128 
+129 //:: not
+130 
+131 :(scenario not_r32)
+132 % Reg[3].i = 0x0f0f00ff;
+133 # op  ModR/M  SIB   displacement  immediate
+134   f7  c3                                      # not EBX (reg 3)
+135 +run: 'not' of effective address
+136 +run: effective address is reg 3
+137 +run: storing 0xf0f0ff00
+138 
+139 :(before "End Single-Byte Opcodes")
+140 case 0xf7: {  // xor r32 with r/m32
+141   uint8_t modrm = next();
+142   trace(2, "run") << "'not' of effective address" << end();
+143   int32_t* arg1 = effective_address(modrm);
+144   *arg1 = ~(*arg1);
+145   trace(2, "run") << "storing 0x" << HEXWORD << *arg1 << end();
+146   SF = (*arg1 >> 31);
+147   ZF = (*arg1 == 0);
+148   OF = false;
+149   break;
+150 }

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