From 104e521c04d1a0cad9c68fb11e250e12ad8917ef Mon Sep 17 00:00:00 2001 From: Kartik Agaram Date: Wed, 17 Oct 2018 07:08:47 -0700 Subject: 4709 --- html/subx/015immediate_addressing.cc.html | 158 +++++++++++++++--------------- 1 file changed, 79 insertions(+), 79 deletions(-) (limited to 'html/subx/015immediate_addressing.cc.html') diff --git a/html/subx/015immediate_addressing.cc.html b/html/subx/015immediate_addressing.cc.html index 83ac6f4f..fd6045d2 100644 --- a/html/subx/015immediate_addressing.cc.html +++ b/html/subx/015immediate_addressing.cc.html @@ -64,8 +64,8 @@ if ('onhashchange' in window) { 
   1 //: instructions that (immediately) contain an argument to act with
   2 
-  3 :(before "End Initialize Op Names(name)")
-  4 put(name, "81", "combine rm32 with imm32 based on subop");
+  3 :(before "End Initialize Op Names")
+  4 put_new(Name, "81", "combine rm32 with imm32 based on subop (add/sub/and/or/xor/cmp)");
   5 
   6 :(scenario add_imm32_to_r32)
   7 % Reg[EBX].i = 1;
@@ -81,20 +81,20 @@ if ('onhashchange' in window) {
  17 
  18 :(before "End Single-Byte Opcodes")
  19 case 0x81: {  // combine imm32 with r/m32
- 20   trace(90, "run") << "combine imm32 with r/m32" << end();
- 21   uint8_t modrm = next();
+ 20   trace(90, "run") << "combine imm32 with r/m32" << end();
+ 21   const uint8_t modrm = next();
  22   int32_t* arg1 = effective_address(modrm);
- 23   int32_t arg2 = next32();
- 24   trace(90, "run") << "imm32 is 0x" << HEXWORD << arg2 << end();
- 25   uint8_t subop = (modrm>>3)&0x7;  // middle 3 'reg opcode' bits
+ 23   const int32_t arg2 = next32();
+ 24   trace(90, "run") << "imm32 is 0x" << HEXWORD << arg2 << end();
+ 25   const uint8_t subop = (modrm>>3)&0x7;  // middle 3 'reg opcode' bits
  26   switch (subop) {
  27   case 0:
- 28     trace(90, "run") << "subop add" << end();
- 29     BINARY_ARITHMETIC_OP(+, *arg1, arg2);
+ 28     trace(90, "run") << "subop add" << end();
+ 29     BINARY_ARITHMETIC_OP(+, *arg1, arg2);
  30     break;
  31   // End Op 81 Subops
  32   default:
- 33     cerr << "unrecognized sub-opcode after 81: " << NUM(subop) << '\n';
+ 33     cerr << "unrecognized sub-opcode after 81: " << NUM(subop) << '\n';
  34     exit(1);
  35   }
  36   break;
@@ -118,8 +118,8 @@ if ('onhashchange' in window) {
  54 
  55 //:: subtract
  56 
- 57 :(before "End Initialize Op Names(name)")
- 58 put(name, "2d", "subtract imm32 from R0 (EAX)");
+ 57 :(before "End Initialize Op Names")
+ 58 put_new(Name, "2d", "subtract imm32 from EAX (sub)");
  59 
  60 :(scenario subtract_imm32_from_eax)
  61 % Reg[EAX].i = 0x0d0c0baa;
@@ -131,9 +131,9 @@ if ('onhashchange' in window) {
  67 
  68 :(before "End Single-Byte Opcodes")
  69 case 0x2d: {  // subtract imm32 from EAX
- 70   int32_t arg2 = next32();
- 71   trace(90, "run") << "subtract imm32 0x" << HEXWORD << arg2 << " from EAX" << end();
- 72   BINARY_ARITHMETIC_OP(-, Reg[EAX].i, arg2);
+ 70   const int32_t arg2 = next32();
+ 71   trace(90, "run") << "subtract imm32 0x" << HEXWORD << arg2 << " from EAX" << end();
+ 72   BINARY_ARITHMETIC_OP(-, Reg[EAX].i, arg2);
  73   break;
  74 }
  75 
@@ -155,8 +155,8 @@ if ('onhashchange' in window) {
  91 
  92 :(before "End Op 81 Subops")
  93 case 5: {
- 94   trace(90, "run") << "subop subtract" << end();
- 95   BINARY_ARITHMETIC_OP(-, *arg1, arg2);
+ 94   trace(90, "run") << "subop subtract" << end();
+ 95   BINARY_ARITHMETIC_OP(-, *arg1, arg2);
  96   break;
  97 }
  98 
@@ -176,8 +176,8 @@ if ('onhashchange' in window) {
 112 
 113 //:: and
 114 
-115 :(before "End Initialize Op Names(name)")
-116 put(name, "25", "R0 = bitwise AND of imm32 with R0 (EAX)");
+115 :(before "End Initialize Op Names")
+116 put_new(Name, "25", "EAX = bitwise AND of imm32 with EAX (and)");
 117 
 118 :(scenario and_imm32_with_eax)
 119 % Reg[EAX].i = 0xff;
@@ -189,9 +189,9 @@ if ('onhashchange' in window) {
 125 
 126 :(before "End Single-Byte Opcodes")
 127 case 0x25: {  // and imm32 with EAX
-128   int32_t arg2 = next32();
-129   trace(90, "run") << "and imm32 0x" << HEXWORD << arg2 << " with EAX" << end();
-130   BINARY_BITWISE_OP(&, Reg[EAX].i, arg2);
+128   const int32_t arg2 = next32();
+129   trace(90, "run") << "and imm32 0x" << HEXWORD << arg2 << " with EAX" << end();
+130   BINARY_BITWISE_OP(&, Reg[EAX].i, arg2);
 131   break;
 132 }
 133 
@@ -213,8 +213,8 @@ if ('onhashchange' in window) {
 149 
 150 :(before "End Op 81 Subops")
 151 case 4: {
-152   trace(90, "run") << "subop and" << end();
-153   BINARY_BITWISE_OP(&, *arg1, arg2);
+152   trace(90, "run") << "subop and" << end();
+153   BINARY_BITWISE_OP(&, *arg1, arg2);
 154   break;
 155 }
 156 
@@ -234,8 +234,8 @@ if ('onhashchange' in window) {
 170 
 171 //:: or
 172 
-173 :(before "End Initialize Op Names(name)")
-174 put(name, "0d", "R0 = bitwise OR of imm32 with R0 (EAX)");
+173 :(before "End Initialize Op Names")
+174 put_new(Name, "0d", "EAX = bitwise OR of imm32 with EAX (or)");
 175 
 176 :(scenario or_imm32_with_eax)
 177 % Reg[EAX].i = 0xd0c0b0a0;
@@ -247,9 +247,9 @@ if ('onhashchange' in window) {
 183 
 184 :(before "End Single-Byte Opcodes")
 185 case 0x0d: {  // or imm32 with EAX
-186   int32_t arg2 = next32();
-187   trace(90, "run") << "or imm32 0x" << HEXWORD << arg2 << " with EAX" << end();
-188   BINARY_BITWISE_OP(|, Reg[EAX].i, arg2);
+186   const int32_t arg2 = next32();
+187   trace(90, "run") << "or imm32 0x" << HEXWORD << arg2 << " with EAX" << end();
+188   BINARY_BITWISE_OP(|, Reg[EAX].i, arg2);
 189   break;
 190 }
 191 
@@ -271,8 +271,8 @@ if ('onhashchange' in window) {
 207 
 208 :(before "End Op 81 Subops")
 209 case 1: {
-210   trace(90, "run") << "subop or" << end();
-211   BINARY_BITWISE_OP(|, *arg1, arg2);
+210   trace(90, "run") << "subop or" << end();
+211   BINARY_BITWISE_OP(|, *arg1, arg2);
 212   break;
 213 }
 214 
@@ -290,8 +290,8 @@ if ('onhashchange' in window) {
 226 
 227 //:: xor
 228 
-229 :(before "End Initialize Op Names(name)")
-230 put(name, "35", "R0 = bitwise XOR of imm32 with R0 (EAX)");
+229 :(before "End Initialize Op Names")
+230 put_new(Name, "35", "EAX = bitwise XOR of imm32 with EAX (xor)");
 231 
 232 :(scenario xor_imm32_with_eax)
 233 % Reg[EAX].i = 0xddccb0a0;
@@ -303,9 +303,9 @@ if ('onhashchange' in window) {
 239 
 240 :(before "End Single-Byte Opcodes")
 241 case 0x35: {  // xor imm32 with EAX
-242   int32_t arg2 = next32();
-243   trace(90, "run") << "xor imm32 0x" << HEXWORD << arg2 << " with EAX" << end();
-244   BINARY_BITWISE_OP(^, Reg[EAX].i, arg2);
+242   const int32_t arg2 = next32();
+243   trace(90, "run") << "xor imm32 0x" << HEXWORD << arg2 << " with EAX" << end();
+244   BINARY_BITWISE_OP(^, Reg[EAX].i, arg2);
 245   break;
 246 }
 247 
@@ -327,8 +327,8 @@ if ('onhashchange' in window) {
 263 
 264 :(before "End Op 81 Subops")
 265 case 6: {
-266   trace(90, "run") << "subop xor" << end();
-267   BINARY_BITWISE_OP(^, *arg1, arg2);
+266   trace(90, "run") << "subop xor" << end();
+267   BINARY_BITWISE_OP(^, *arg1, arg2);
 268   break;
 269 }
 270 
@@ -346,8 +346,8 @@ if ('onhashchange' in window) {
 282 
 283 //:: compare (cmp)
 284 
-285 :(before "End Initialize Op Names(name)")
-286 put(name, "3d", "compare: set SF if R0 < imm32");
+285 :(before "End Initialize Op Names")
+286 put_new(Name, "3d", "compare: set SF if EAX < imm32 (cmp)");
 287 
 288 :(scenario compare_imm32_with_eax_greater)
 289 % Reg[EAX].i = 0x0d0c0b0a;
@@ -359,15 +359,15 @@ if ('onhashchange' in window) {
 295 
 296 :(before "End Single-Byte Opcodes")
 297 case 0x3d: {  // compare EAX with imm32
-298   int32_t arg1 = Reg[EAX].i;
-299   int32_t arg2 = next32();
-300   trace(90, "run") << "compare EAX and imm32 0x" << HEXWORD << arg2 << end();
-301   int32_t tmp1 = arg1 - arg2;
+298   const int32_t arg1 = Reg[EAX].i;
+299   const int32_t arg2 = next32();
+300   trace(90, "run") << "compare EAX and imm32 0x" << HEXWORD << arg2 << end();
+301   const int32_t tmp1 = arg1 - arg2;
 302   SF = (tmp1 < 0);
 303   ZF = (tmp1 == 0);
-304   int64_t tmp2 = arg1 - arg2;
-305   OF = (tmp1 != tmp2);
-306   trace(90, "run") << "SF=" << SF << "; ZF=" << ZF << "; OF=" << OF << end();
+304   const int64_t tmp2 = arg1 - arg2;
+305   OF = (tmp1 != tmp2);
+306   trace(90, "run") << "SF=" << SF << "; ZF=" << ZF << "; OF=" << OF << end();
 307   break;
 308 }
 309 
@@ -402,13 +402,13 @@ if ('onhashchange' in window) {
 338 
 339 :(before "End Op 81 Subops")
 340 case 7: {
-341   trace(90, "run") << "subop compare" << end();
-342   int32_t tmp1 = *arg1 - arg2;
+341   trace(90, "run") << "subop compare" << end();
+342   const int32_t tmp1 = *arg1 - arg2;
 343   SF = (tmp1 < 0);
 344   ZF = (tmp1 == 0);
-345   int64_t tmp2 = *arg1 - arg2;
-346   OF = (tmp1 != tmp2);
-347   trace(90, "run") << "SF=" << SF << "; ZF=" << ZF << "; OF=" << OF << end();
+345   const int64_t tmp2 = *arg1 - arg2;
+346   OF = (tmp1 != tmp2);
+347   trace(90, "run") << "SF=" << SF << "; ZF=" << ZF << "; OF=" << OF << end();
 348   break;
 349 }
 350 
@@ -476,15 +476,15 @@ if ('onhashchange' in window) {
 412 
 413 //:: copy (mov)
 414 
-415 :(before "End Initialize Op Names(name)")
-416 put(name, "b8", "copy imm32 to R0 (EAX)");
-417 put(name, "b9", "copy imm32 to R1 (ECX)");
-418 put(name, "ba", "copy imm32 to R2 (EDX)");
-419 put(name, "bb", "copy imm32 to R3 (EBX)");
-420 put(name, "bc", "copy imm32 to R4 (ESP)");
-421 put(name, "bd", "copy imm32 to R5 (EBP)");
-422 put(name, "be", "copy imm32 to R6 (ESI)");
-423 put(name, "bf", "copy imm32 to R7 (EDI)");
+415 :(before "End Initialize Op Names")
+416 put_new(Name, "b8", "copy imm32 to EAX (mov)");
+417 put_new(Name, "b9", "copy imm32 to ECX (mov)");
+418 put_new(Name, "ba", "copy imm32 to EDX (mov)");
+419 put_new(Name, "bb", "copy imm32 to EBX (mov)");
+420 put_new(Name, "bc", "copy imm32 to ESP (mov)");
+421 put_new(Name, "bd", "copy imm32 to EBP (mov)");
+422 put_new(Name, "be", "copy imm32 to ESI (mov)");
+423 put_new(Name, "bf", "copy imm32 to EDI (mov)");
 424 
 425 :(scenario copy_imm32_to_r32)
 426 == 0x1
@@ -501,17 +501,17 @@ if ('onhashchange' in window) {
 437 case 0xbd:
 438 case 0xbe:
 439 case 0xbf: {  // copy imm32 to r32
-440   uint8_t reg1 = op & 0x7;
-441   int32_t arg2 = next32();
-442   trace(90, "run") << "copy imm32 0x" << HEXWORD << arg2 << " to " << rname(reg1) << end();
-443   Reg[reg1].i = arg2;
+440   const uint8_t rdest = op & 0x7;
+441   const int32_t src = next32();
+442   trace(90, "run") << "copy imm32 0x" << HEXWORD << src << " to " << rname(rdest) << end();
+443   Reg[rdest].i = src;
 444   break;
 445 }
 446 
 447 //:
 448 
-449 :(before "End Initialize Op Names(name)")
-450 put(name, "c7", "copy imm32 to rm32");
+449 :(before "End Initialize Op Names")
+450 put_new(Name, "c7", "copy imm32 to rm32 (mov)");
 451 
 452 :(scenario copy_imm32_to_mem_at_r32)
 453 % Reg[EBX].i = 0x60;
@@ -525,19 +525,19 @@ if ('onhashchange' in window) {
 461 
 462 :(before "End Single-Byte Opcodes")
 463 case 0xc7: {  // copy imm32 to r32
-464   uint8_t modrm = next();
-465   trace(90, "run") << "copy imm32 to r/m32" << end();
-466   int32_t* arg1 = effective_address(modrm);
-467   int32_t arg2 = next32();
-468   trace(90, "run") << "imm32 is 0x" << HEXWORD << arg2 << end();
-469   *arg1 = arg2;
+464   const uint8_t modrm = next();
+465   trace(90, "run") << "copy imm32 to r/m32" << end();
+466   int32_t* dest = effective_address(modrm);
+467   const int32_t src = next32();
+468   trace(90, "run") << "imm32 is 0x" << HEXWORD << src << end();
+469   *dest = src;
 470   break;
 471 }
 472 
 473 //:: push
 474 
-475 :(before "End Initialize Op Names(name)")
-476 put(name, "68", "push imm32 to stack");
+475 :(before "End Initialize Op Names")
+476 put_new(Name, "68", "push imm32 to stack (push)");
 477 
 478 :(scenario push_imm32)
 479 % Reg[ESP].u = 0x14;
@@ -550,12 +550,12 @@ if ('onhashchange' in window) {
 486 
 487 :(before "End Single-Byte Opcodes")
 488 case 0x68: {
-489   uint32_t val = static_cast<uint32_t>(next32());
-490   trace(90, "run") << "push imm32 0x" << HEXWORD << val << end();
+489   const uint32_t val = static_cast<uint32_t>(next32());
+490   trace(90, "run") << "push imm32 0x" << HEXWORD << val << end();
 491 //?   cerr << "push: " << val << " => " << Reg[ESP].u << '\n';
 492   push(val);
-493   trace(90, "run") << "ESP is now 0x" << HEXWORD << Reg[ESP].u << end();
-494   trace(90, "run") << "contents at ESP: 0x" << HEXWORD << read_mem_u32(Reg[ESP].u) << end();
+493   trace(90, "run") << "ESP is now 0x" << HEXWORD << Reg[ESP].u << end();
+494   trace(90, "run") << "contents at ESP: 0x" << HEXWORD << read_mem_u32(Reg[ESP].u) << end();
 495   break;
 496 }
-- cgit 1.4.1-2-gfad0