Mu - subx/031check

From 7328af20a1921d9258a60803ee5367da97a6082e Mon Sep 17 00:00:00 2001 From: Kartik Agaram Date: Mon, 13 Aug 2018 21:25:22 -0700 Subject: 4521 --- html/subx/031check_operands.cc.html | 588 ++++++++++++++++++++++++++++++++++++ 1 file changed, 588 insertions(+) create mode 100644 html/subx/031check_operands.cc.html (limited to 'html/subx/031check_operands.cc.html') diff --git a/html/subx/031check_operands.cc.html b/html/subx/031check_operands.cc.html new file mode 100644 index 00000000..09f55a7c --- /dev/null +++ b/html/subx/031check_operands.cc.html @@ -0,0 +1,588 @@ + + + + +Mu - subx/031check_operands.cc + + + + + + + + + + +
+  1 //: Since we're tagging operands with their types, let's start checking these
+  2 //: operand types for each instruction.
+  3 
+  4 :(scenario check_missing_imm8_operand)
+  5 % Hide_errors = true;
+  6 == 0x1
+  7 # instruction                     effective address                                                   operand     displacement    immediate
+  8 # op          subop               mod             rm32          base        index         scale       r32
+  9 # 1-3 bytes   3 bits              2 bits          3 bits        3 bits      3 bits        2 bits      2 bits      0/1/2/4 bytes   0/1/2/4 bytes
+ 10   cd                                                                                                                                                # int ??
+ 11 +error: 'cd' (software interrupt): missing imm8 operand
+ 12 
+ 13 :(before "Pack Operands(segment code)")
+ 14 check_operands(code);
+ 15 if (trace_contains_errors()) return;
+ 16 
+ 17 :(code)
+ 18 void check_operands(const segment& code) {
+ 19   trace(99, "transform") << "-- check operands" << end();
+ 20   for (int i = 0;  i < SIZE(code.lines);  ++i) {
+ 21     check_operands(code.lines.at(i));
+ 22     if (trace_contains_errors()) return;  // stop at the first mal-formed instruction
+ 23   }
+ 24 }
+ 25 
+ 26 void check_operands(const line& inst) {
+ 27   word op = preprocess_op(inst.words.at(0));
+ 28   if (op.data == "0f") {
+ 29     check_operands_0f(inst);
+ 30     return;
+ 31   }
+ 32   if (op.data == "f3") {
+ 33     check_operands_f3(inst);
+ 34     return;
+ 35   }
+ 36   check_operands(inst, op);
+ 37 }
+ 38 
+ 39 word preprocess_op(word/*copy*/ op) {
+ 40   op.data = tolower(op.data.c_str());
+ 41   // opcodes can't be negative
+ 42   if (starts_with(op.data, "0x"))
+ 43     op.data = op.data.substr(2);
+ 44   if (SIZE(op.data) == 1)
+ 45     op.data = string("0")+op.data;
+ 46   return op;
+ 47 }
+ 48 
+ 49 void test_preprocess_op() {
+ 50   word w1;  w1.data = "0xf";
+ 51   word w2;  w2.data = "0f";
+ 52   CHECK_EQ(preprocess_op(w1).data, preprocess_op(w2).data);
+ 53 }
+ 54 
+ 55 //: To check the operands for an opcode, we'll track the permitted operands
+ 56 //: for each supported opcode in a bitvector. That way we can often compute the
+ 57 //: bitvector for each instruction's operands and compare it with the expected.
+ 58 
+ 59 :(before "End Types")
+ 60 enum operand_type {
+ 61   // start from the least significant bit
+ 62   MODRM,  // more complex, may also involve disp8 or disp32
+ 63   SUBOP,
+ 64   DISP8,
+ 65   DISP16,
+ 66   DISP32,
+ 67   IMM8,
+ 68   IMM32,
+ 69   NUM_OPERAND_TYPES
+ 70 };
+ 71 :(before "End Globals")
+ 72 vector<string> Operand_type_name;
+ 73 map<string, operand_type> Operand_type;
+ 74 :(before "End One-time Setup")
+ 75 init_op_types();
+ 76 :(code)
+ 77 void init_op_types() {
+ 78   assert(NUM_OPERAND_TYPES <= /*bits in a uint8_t*/8);
+ 79   Operand_type_name.resize(NUM_OPERAND_TYPES);
+ 80   #define DEF(type) Operand_type_name.at(type) = tolower(#type), put(Operand_type, tolower(#type), type);
+ 81   DEF(MODRM);
+ 82   DEF(SUBOP);
+ 83   DEF(DISP8);
+ 84   DEF(DISP16);
+ 85   DEF(DISP32);
+ 86   DEF(IMM8);
+ 87   DEF(IMM32);
+ 88   #undef DEF
+ 89 }
+ 90 
+ 91 :(before "End Globals")
+ 92 map</*op*/string, /*bitvector*/uint8_t> Permitted_operands;
+ 93 const uint8_t INVALID_OPERANDS = 0xff;  // no instruction uses all the operand types
+ 94 :(before "End One-time Setup")
+ 95 init_permitted_operands();
+ 96 :(code)
+ 97 void init_permitted_operands() {
+ 98   //// Class A: just op, no operands
+ 99   // halt
+100   put(Permitted_operands, "f4", 0x00);
+101   // push
+102   put(Permitted_operands, "50", 0x00);
+103   put(Permitted_operands, "51", 0x00);
+104   put(Permitted_operands, "52", 0x00);
+105   put(Permitted_operands, "53", 0x00);
+106   put(Permitted_operands, "54", 0x00);
+107   put(Permitted_operands, "55", 0x00);
+108   put(Permitted_operands, "56", 0x00);
+109   put(Permitted_operands, "57", 0x00);
+110   // pop
+111   put(Permitted_operands, "58", 0x00);
+112   put(Permitted_operands, "59", 0x00);
+113   put(Permitted_operands, "5a", 0x00);
+114   put(Permitted_operands, "5b", 0x00);
+115   put(Permitted_operands, "5c", 0x00);
+116   put(Permitted_operands, "5d", 0x00);
+117   put(Permitted_operands, "5e", 0x00);
+118   put(Permitted_operands, "5f", 0x00);
+119   // return
+120   put(Permitted_operands, "c3", 0x00);
+121 
+122   //// Class B: just op and disp8
+123   //  imm32 imm8  disp32 |disp16  disp8 subop modrm
+124   //  0     0     0      |0       1     0     0
+125 
+126   // jump
+127   put(Permitted_operands, "eb", 0x04);
+128   put(Permitted_operands, "74", 0x04);
+129   put(Permitted_operands, "75", 0x04);
+130   put(Permitted_operands, "7c", 0x04);
+131   put(Permitted_operands, "7d", 0x04);
+132   put(Permitted_operands, "7e", 0x04);
+133   put(Permitted_operands, "7f", 0x04);
+134 
+135   //// Class C: just op and disp16
+136   //  imm32 imm8  disp32 |disp16  disp8 subop modrm
+137   //  0     0     0      |1       0     0     0
+138   put(Permitted_operands, "e9", 0x08);  // jump
+139 
+140   //// Class D: just op and disp32
+141   //  imm32 imm8  disp32 |disp16  disp8 subop modrm
+142   //  0     0     1      |0       0     0     0
+143   put(Permitted_operands, "e8", 0x10);  // call
+144 
+145   //// Class E: just op and imm8
+146   //  imm32 imm8  disp32 |disp16  disp8 subop modrm
+147   //  0     1     0      |0       0     0     0
+148   put(Permitted_operands, "cd", 0x20);  // software interrupt
+149 
+150   //// Class F: just op and imm32
+151   //  imm32 imm8  disp32 |disp16  disp8 subop modrm
+152   //  1     0     0      |0       0     0     0
+153   put(Permitted_operands, "05", 0x40);  // add
+154   put(Permitted_operands, "2d", 0x40);  // subtract
+155   put(Permitted_operands, "25", 0x40);  // and
+156   put(Permitted_operands, "0d", 0x40);  // or
+157   put(Permitted_operands, "35", 0x40);  // xor
+158   put(Permitted_operands, "3d", 0x40);  // compare
+159   put(Permitted_operands, "68", 0x40);  // push
+160   // copy
+161   put(Permitted_operands, "b8", 0x40);
+162   put(Permitted_operands, "b9", 0x40);
+163   put(Permitted_operands, "ba", 0x40);
+164   put(Permitted_operands, "bb", 0x40);
+165   put(Permitted_operands, "bc", 0x40);
+166   put(Permitted_operands, "bd", 0x40);
+167   put(Permitted_operands, "be", 0x40);
+168   put(Permitted_operands, "bf", 0x40);
+169 
+170   //// Class M: using ModR/M byte
+171   //  imm32 imm8  disp32 |disp16  disp8 subop modrm
+172   //  0     0     0      |0       0     0     1
+173 
+174   // add
+175   put(Permitted_operands, "01", 0x01);
+176   put(Permitted_operands, "03", 0x01);
+177   // subtract
+178   put(Permitted_operands, "29", 0x01);
+179   put(Permitted_operands, "2b", 0x01);
+180   // and
+181   put(Permitted_operands, "21", 0x01);
+182   put(Permitted_operands, "23", 0x01);
+183   // or
+184   put(Permitted_operands, "09", 0x01);
+185   put(Permitted_operands, "0b", 0x01);
+186   // complement
+187   put(Permitted_operands, "f7", 0x01);
+188   // xor
+189   put(Permitted_operands, "31", 0x01);
+190   put(Permitted_operands, "33", 0x01);
+191   // compare
+192   put(Permitted_operands, "39", 0x01);
+193   put(Permitted_operands, "3b", 0x01);
+194   // copy
+195   put(Permitted_operands, "89", 0x01);
+196   put(Permitted_operands, "8b", 0x01);
+197   // swap
+198   put(Permitted_operands, "87", 0x01);
+199   // pop
+200   put(Permitted_operands, "8f", 0x01);
+201 
+202   //// Class O: op, ModR/M and subop (not r32)
+203   //  imm32 imm8  disp32 |disp16  disp8 subop modrm
+204   //  0     0     0      |0       0     1     1
+205   put(Permitted_operands, "ff", 0x03);  // jump/push/call
+206 
+207   //// Class N: op, ModR/M and imm32
+208   //  imm32 imm8  disp32 |disp16  disp8 subop modrm
+209   //  1     0     0      |0       0     0     1
+210   put(Permitted_operands, "c7", 0x41);  // copy
+211 
+212   //// Class P: op, ModR/M, subop (not r32) and imm32
+213   //  imm32 imm8  disp32 |disp16  disp8 subop modrm
+214   //  1     0     0      |0       0     1     1
+215   put(Permitted_operands, "81", 0x43);  // combine
+216 
+217   // End Init Permitted Operands
+218 }
+219 
+220 :(code)
+221 #define HAS(bitvector, bit)  ((bitvector) & (1 << (bit)))
+222 #define SET(bitvector, bit)  ((bitvector) | (1 << (bit)))
+223 #define CLEAR(bitvector, bit)  ((bitvector) & (~(1 << (bit))))
+224 
+225 void check_operands(const line& inst, const word& op) {
+226   if (!is_hex_byte(op)) return;
+227   uint8_t expected_bitvector = get(Permitted_operands, op.data);
+228   if (HAS(expected_bitvector, MODRM)) {
+229     check_operands_modrm(inst, op);
+230     compare_bitvector_modrm(inst, expected_bitvector, op);
+231   }
+232   else {
+233     compare_bitvector(inst, expected_bitvector, op);
+234   }
+235 }
+236 
+237 //: Many instructions can be checked just by comparing bitvectors.
+238 
+239 void compare_bitvector(const line& inst, uint8_t expected, const word& op) {
+240   if (all_hex_bytes(inst) && has_operands(inst)) return;  // deliberately programming in raw hex; we'll raise a warning elsewhere
+241   uint8_t bitvector = compute_operand_bitvector(inst);
+242   if (trace_contains_errors()) return;  // duplicate operand type
+243   if (bitvector == expected) return;  // all good with this instruction
+244   for (int i = 0;  i < NUM_OPERAND_TYPES;  ++i, bitvector >>= 1, expected >>= 1) {
+245 //?     cerr << "comparing " << HEXBYTE << NUM(bitvector) << " with " << NUM(expected) << '\n';
+246     if ((bitvector & 0x1) == (expected & 0x1)) continue;  // all good with this operand
+247     const string& optype = Operand_type_name.at(i);
+248     if ((bitvector & 0x1) > (expected & 0x1))
+249       raise << "'" << to_string(inst) << "'" << maybe_name(op) << ": unexpected " << optype << " operand\n" << end();
+250     else
+251       raise << "'" << to_string(inst) << "'" << maybe_name(op) << ": missing " << optype << " operand\n" << end();
+252     // continue giving all errors for a single instruction
+253   }
+254   // ignore settings in any unused bits
+255 }
+256 
+257 string maybe_name(const word& op) {
+258   if (!is_hex_byte(op)) return "";
+259   if (!contains_key(name, op.data)) return "";
+260   return " ("+get(name, op.data)+')';
+261 }
+262 
+263 uint32_t compute_operand_bitvector(const line& inst) {
+264   uint32_t bitvector = 0;
+265   for (int i = /*skip op*/1;  i < SIZE(inst.words);  ++i) {
+266     bitvector = bitvector | bitvector_for_operand(inst.words.at(i));
+267     if (trace_contains_errors()) return INVALID_OPERANDS;  // duplicate operand type
+268   }
+269   return bitvector;
+270 }
+271 
+272 bool has_operands(const line& inst) {
+273   return SIZE(inst.words) > first_operand(inst);
+274 }
+275 
+276 int first_operand(const line& inst) {
+277   if (inst.words.at(0).data == "0f") return 2;
+278   if (inst.words.at(0).data == "f2" || inst.words.at(0).data == "f3") {
+279     if (inst.words.at(1).data == "0f")
+280       return 3;
+281     else
+282       return 2;
+283   }
+284   return 1;
+285 }
+286 
+287 // Scan the metadata of 'w' and return the bit corresponding to any operand type.
+288 // Also raise an error if metadata contains multiple operand types.
+289 uint32_t bitvector_for_operand(const word& w) {
+290   uint32_t bv = 0;
+291   bool found = false;
+292   for (int i = 0;  i < SIZE(w.metadata);  ++i) {
+293     const string& curr = w.metadata.at(i);
+294     if (!contains_key(Operand_type, curr)) continue;  // ignore unrecognized metadata
+295     if (found) {
+296       raise << "'" << w.original << "' has conflicting operand types; it should have only one\n" << end();
+297       return INVALID_OPERANDS;
+298     }
+299     bv = (1 << get(Operand_type, curr));
+300     found = true;
+301   }
+302   return bv;
+303 }
+304 
+305 :(scenario conflicting_operand_type)
+306 % Hide_errors = true;
+307 == 0x1
+308 cd/software-interrupt 80/imm8/imm32
+309 +error: '80/imm8/imm32' has conflicting operand types; it should have only one
+310 
+311 //: Instructions computing effective addresses have more complex rules, so
+312 //: we'll hard-code a common set of instruction-decoding rules.
+313 
+314 :(scenario check_missing_mod_operand)
+315 % Hide_errors = true;
+316 == 0x1
+317 81 0/add/subop       3/rm32/ebx 1/imm32
+318 +error: '81 0/add/subop 3/rm32/ebx 1/imm32' (combine rm32 with imm32 based on subop): missing mod operand
+319 
+320 :(code)
+321 void check_operands_modrm(const line& inst, const word& op) {
+322   if (all_hex_bytes(inst)) return;  // deliberately programming in raw hex; we'll raise a warning elsewhere
+323   check_metadata_present(inst, "mod", op);
+324   check_metadata_present(inst, "rm32", op);
+325   // no check for r32; some instructions don't use it; just assume it's 0 if missing
+326   if (op.data == "81" || op.data == "8f" || op.data == "ff") {  // keep sync'd with 'help subop'
+327     check_metadata_present(inst, "subop", op);
+328     check_metadata_absent(inst, "r32", op, "should be replaced by subop");
+329   }
+330   if (trace_contains_errors()) return;
+331   if (metadata(inst, "rm32").data != "4") return;
+332   // SIB byte checks
+333   uint8_t mod = hex_byte(metadata(inst, "mod").data);
+334   if (mod != /*direct*/3) {
+335     check_metadata_present(inst, "base", op);
+336     check_metadata_present(inst, "index", op);  // otherwise why go to SIB?
+337   }
+338   else {
+339     check_metadata_absent(inst, "base", op, "direct mode");
+340     check_metadata_absent(inst, "index", op, "direct mode");
+341   }
+342   // no check for scale; 0 (2**0 = 1) by default
+343 }
+344 
+345 // same as compare_bitvector, with a couple of exceptions for modrm-based instructions
+346 //   exception 1: ignore modrm bit since we already checked it above
+347 //   exception 2: modrm instructions can use a displacement on occasion
+348 void compare_bitvector_modrm(const line& inst, uint8_t expected, const word& op) {
+349   if (all_hex_bytes(inst) && has_operands(inst)) return;  // deliberately programming in raw hex; we'll raise a warning elsewhere
+350   uint8_t bitvector = compute_operand_bitvector(inst);
+351   if (trace_contains_errors()) return;  // duplicate operand type
+352   expected = CLEAR(expected, MODRM);  // exception 1
+353   if (bitvector == expected) return;  // all good with this instruction
+354   for (int i = 0;  i < NUM_OPERAND_TYPES;  ++i, bitvector >>= 1, expected >>= 1) {
+355 //?     cerr << "comparing for modrm " << HEXBYTE << NUM(bitvector) << " with " << NUM(expected) << '\n';
+356     if ((bitvector & 0x1) == (expected & 0x1)) continue;  // all good with this operand
+357     if (i == DISP8 || i == DISP32) continue;  // exception 2
+358     const string& optype = Operand_type_name.at(i);
+359     if ((bitvector & 0x1) > (expected & 0x1))
+360       raise << "'" << to_string(inst) << "'" << maybe_name(op) << ": unexpected " << optype << " operand\n" << end();
+361     else
+362       raise << "'" << to_string(inst) << "'" << maybe_name(op) << ": missing " << optype << " operand\n" << end();
+363     // continue giving all errors for a single instruction
+364   }
+365   // ignore settings in any unused bits
+366 }
+367 
+368 void check_metadata_present(const line& inst, const string& type, const word& op) {
+369   if (!has_metadata(inst, type))
+370     raise << "'" << to_string(inst) << "' (" << get(name, op.data) << "): missing " << type << " operand\n" << end();
+371 }
+372 
+373 void check_metadata_absent(const line& inst, const string& type, const word& op, const string& msg) {
+374   if (has_metadata(inst, type))
+375     raise << "'" << to_string(inst) << "' (" << get(name, op.data) << "): unexpected " << type << " operand (" << msg << ")\n" << end();
+376 }
+377 
+378 :(scenarios transform)
+379 :(scenario modrm_with_displacement)
+380 % Reg[EAX].u = 0x1;
+381 == 0x1
+382 # just avoid null pointer
+383 8b/copy 1/mod/lookup+disp8 0/rm32/EAX 2/r32/EDX 4/disp8  # copy *(EAX+4) to EDX
+384 $error: 0
+385 :(scenarios run)
+386 
+387 :(scenario conflicting_operands_in_modrm_instruction)
+388 % Hide_errors = true;
+389 == 0x1
+390 01/add 0/mod 3/mod
+391 +error: '01/add 0/mod 3/mod' has conflicting mod operands
+392 
+393 :(scenario conflicting_operand_type_modrm)
+394 % Hide_errors = true;
+395 == 0x1
+396 01/add 0/mod 3/rm32/r32
+397 +error: '3/rm32/r32' has conflicting operand types; it should have only one
+398 
+399 :(scenario check_missing_rm32_operand)
+400 % Hide_errors = true;
+401 == 0x1
+402 81 0/add/subop 0/mod            1/imm32
+403 +error: '81 0/add/subop 0/mod 1/imm32' (combine rm32 with imm32 based on subop): missing rm32 operand
+404 
+405 :(scenario check_missing_subop_operand)
+406 % Hide_errors = true;
+407 == 0x1
+408 81             0/mod 3/rm32/ebx 1/imm32
+409 +error: '81 0/mod 3/rm32/ebx 1/imm32' (combine rm32 with imm32 based on subop): missing subop operand
+410 
+411 :(scenario check_missing_base_operand)
+412 % Hide_errors = true;
+413 == 0x1
+414 81 0/add/subop 0/mod/indirect 4/rm32/use-sib 1/imm32
+415 +error: '81 0/add/subop 0/mod/indirect 4/rm32/use-sib 1/imm32' (combine rm32 with imm32 based on subop): missing base operand
+416 
+417 :(scenario check_missing_index_operand)
+418 % Hide_errors = true;
+419 == 0x1
+420 81 0/add/subop 0/mod/indirect 4/rm32/use-sib 0/base 1/imm32
+421 +error: '81 0/add/subop 0/mod/indirect 4/rm32/use-sib 0/base 1/imm32' (combine rm32 with imm32 based on subop): missing index operand
+422 
+423 :(scenario check_missing_base_operand_2)
+424 % Hide_errors = true;
+425 == 0x1
+426 81 0/add/subop 0/mod/indirect 4/rm32/use-sib 2/index 3/scale 1/imm32
+427 +error: '81 0/add/subop 0/mod/indirect 4/rm32/use-sib 2/index 3/scale 1/imm32' (combine rm32 with imm32 based on subop): missing base operand
+428 
+429 :(scenario check_base_operand_not_needed_in_direct_mode)
+430 == 0x1
+431 81 0/add/subop 3/mod/indirect 4/rm32/use-sib 1/imm32
+432 $error: 0
+433 
+434 //:: similarly handle multi-byte opcodes
+435 
+436 :(code)
+437 void check_operands_0f(const line& inst) {
+438   assert(inst.words.at(0).data == "0f");
+439   if (SIZE(inst.words) == 1) {
+440     raise << "opcode '0f' requires a second opcode\n" << end();
+441     return;
+442   }
+443   word op = preprocess_op(inst.words.at(1));
+444   if (!contains_key(name_0f, op.data)) {
+445     raise << "unknown 2-byte opcode '0f " << op.data << "'\n" << end();
+446     return;
+447   }
+448   check_operands_0f(inst, op);
+449 }
+450 
+451 void check_operands_f3(const line& /*unused*/) {
+452   raise << "no supported opcodes starting with f3\n" << end();
+453 }
+454 
+455 :(scenario check_missing_disp16_operand)
+456 % Hide_errors = true;
+457 == 0x1
+458 # instruction                     effective address                                                   operand     displacement    immediate
+459 # op          subop               mod             rm32          base        index         scale       r32
+460 # 1-3 bytes   3 bits              2 bits          3 bits        3 bits      3 bits        2 bits      2 bits      0/1/2/4 bytes   0/1/2/4 bytes
+461   0f 84                                                                                                                                             # jmp if ZF to ??
+462 +error: '0f 84' (jump disp16 bytes away if ZF is set): missing disp16 operand
+463 
+464 :(before "End Globals")
+465 map</*op*/string, /*bitvector*/uint8_t> Permitted_operands_0f;
+466 :(before "End Init Permitted Operands")
+467 //// Class C: just op and disp16
+468 //  imm32 imm8  disp32 |disp16  disp8 subop modrm
+469 //  0     0     0      |1       0     0     0
+470 put(Permitted_operands_0f, "84", 0x08);
+471 put(Permitted_operands_0f, "85", 0x08);
+472 put(Permitted_operands_0f, "8c", 0x08);
+473 put(Permitted_operands_0f, "8d", 0x08);
+474 put(Permitted_operands_0f, "8e", 0x08);
+475 put(Permitted_operands_0f, "8f", 0x08);
+476 
+477 //// Class M: using ModR/M byte
+478 //  imm32 imm8  disp32 |disp16  disp8 subop modrm
+479 //  0     0     0      |0       0     0     1
+480 put(Permitted_operands_0f, "af", 0x01);
+481 
+482 :(code)
+483 void check_operands_0f(const line& inst, const word& op) {
+484   uint8_t expected_bitvector = get(Permitted_operands_0f, op.data);
+485   if (HAS(expected_bitvector, MODRM))
+486     check_operands_modrm(inst, op);
+487   compare_bitvector_0f(inst, CLEAR(expected_bitvector, MODRM), op);
+488 }
+489 
+490 void compare_bitvector_0f(const line& inst, uint8_t expected, const word& op) {
+491   if (all_hex_bytes(inst) && has_operands(inst)) return;  // deliberately programming in raw hex; we'll raise a warning elsewhere
+492   uint8_t bitvector = compute_operand_bitvector(inst);
+493   if (trace_contains_errors()) return;  // duplicate operand type
+494   if (bitvector == expected) return;  // all good with this instruction
+495   for (int i = 0;  i < NUM_OPERAND_TYPES;  ++i, bitvector >>= 1, expected >>= 1) {
+496 //?     cerr << "comparing " << HEXBYTE << NUM(bitvector) << " with " << NUM(expected) << '\n';
+497     if ((bitvector & 0x1) == (expected & 0x1)) continue;  // all good with this operand
+498     const string& optype = Operand_type_name.at(i);
+499     if ((bitvector & 0x1) > (expected & 0x1))
+500       raise << "'" << to_string(inst) << "' (" << get(name_0f, op.data) << "): unexpected " << optype << " operand\n" << end();
+501     else
+502       raise << "'" << to_string(inst) << "' (" << get(name_0f, op.data) << "): missing " << optype << " operand\n" << end();
+503     // continue giving all errors for a single instruction
+504   }
+505   // ignore settings in any unused bits
+506 }
+507 
+508 string tolower(const char* s) {
+509   ostringstream out;
+510   for (/*nada*/;  *s;  ++s)
+511     out << static_cast<char>(tolower(*s));
+512   return out.str();
+513 }
+514 
+515 #undef HAS
+516 #undef SET
+517 #undef CLEAR
+518 
+519 :(before "End Includes")
+520 #include<cctype>
+
+ + + -- cgit 1.4.1-2-gfad0