1
2
3 :(scenario add_r32_to_mem_at_r32)
4 % Reg[3].i = 0x10;
5 % Reg[0].i = 0x60;
6
7 % Mem.at(0x60) = 1;
8
9 01 18
10 +run: add reg 3 to effective address
11 +run: effective address is mem at address 0x60 (reg 0)
12 +run: storing 0x00000011
13
14 :(before "End Mod Special-cases")
15 case 0:
16
17 switch (rm) {
18 default:
19 ¦ trace(2, "run") << "effective address is mem at address 0x" << std::hex << Reg[rm].u << " (reg " << NUM(rm) << ")" << end();
20 ¦ assert(Reg[rm].u + sizeof(int32_t) <= Mem.size());
21 ¦ result = reinterpret_cast<int32_t*>(&Mem.at(Reg[rm].u));
22 ¦ break;
23
24 }
25 break;
26
27
28
29 :(scenario add_mem_at_r32_to_r32)
30 % Reg[0].i = 0x60;
31 % Reg[3].i = 0x10;
32 % Mem.at(0x60) = 1;
33
34 03 18
35 +run: add effective address to reg 3
36 +run: effective address is mem at address 0x60 (reg 0)
37 +run: storing 0x00000011
38
39 :(before "End Single-Byte Opcodes")
40 case 0x03: {
41 uint8_t modrm = next();
42 uint8_t arg1 = (modrm>>3)&0x7;
43 trace(2, "run") << "add effective address to reg " << NUM(arg1) << end();
44 const int32_t* arg2 = effective_address(modrm);
45 BINARY_ARITHMETIC_OP(+, Reg[arg1].i, *arg2);
46 break;
47 }
48
49
50
51 :(scenario subtract_r32_from_mem_at_r32)
52 % Reg[0].i = 0x60;
53 % Mem.at(0x60) = 10;
54 % Reg[3].i = 1;
55
56 29 18
57 +run: subtract reg 3 from effective address
58 +run: effective address is mem at address 0x60 (reg 0)
59 +run: storing 0x00000009
60
61
62
63 :(scenario subtract_mem_at_r32_from_r32)
64 % Reg[0].i = 0x60;
65 % Mem.at(0x60) = 1;
66 % Reg[3].i = 10;
67
68 2b 18
69 +run: subtract effective address from reg 3
70 +run: effective address is mem at address 0x60 (reg 0)
71 +run: storing 0x00000009
72
73 :(before "End Single-Byte Opcodes")
74 case 0x2b: {
75 uint8_t modrm = next();
76 uint8_t arg1 = (modrm>>3)&0x7;
77 trace(2, "run") << "subtract effective address from reg " << NUM(arg1) << end();
78 const int32_t* arg2 = effective_address(modrm);
79 BINARY_ARITHMETIC_OP(-, Reg[arg1].i, *arg2);
80 break;
81 }
82
83
84
85 :(scenario and_r32_with_mem_at_r32)
86 % Reg[0].i = 0x60;
87 % Mem.at(0x60) = 0x0d;
88 % Mem.at(0x61) = 0x0c;
89 % Mem.at(0x62) = 0x0b;
90 % Mem.at(0x63) = 0x0a;
91 % Reg[3].i = 0xff;
92
93 21 18
94 +run: and reg 3 with effective address
95 +run: effective address is mem at address 0x60 (reg 0)
96 +run: storing 0x0000000d
97
98
99
100 :(scenario and_mem_at_r32_with_r32)
101 % Reg[0].i = 0x60;
102 % Mem.at(0x60) = 0xff;
103 % Reg[3].i = 0x0a0b0c0d;
104
105 23 18
106 +run: and effective address with reg 3
107 +run: effective address is mem at address 0x60 (reg 0)
108 +run: storing 0x0000000d
109
110 :(before "End Single-Byte Opcodes")
111 case 0x23: {
112 uint8_t modrm = next();
113 uint8_t arg1 = (modrm>>3)&0x7;
114 trace(2, "run") << "and effective address with reg " << NUM(arg1) << end();
115 const int32_t* arg2 = effective_address(modrm);
116 BINARY_BITWISE_OP(&, Reg[arg1].u, *arg2);
117 break;
118 }
119
120
121
122 :(scenario or_r32_with_mem_at_r32)
123 % Reg[0].i = 0x60;
124 % Mem.at(0x60) = 0x0d;
125 % Mem.at(0x61) = 0x0c;
126 % Mem.at(0x62) = 0x0b;
127 % Mem.at(0x63) = 0x0a;
128 % Reg[3].i = 0xa0b0c0d0;
129
130 09 18
131 +run: or reg 3 with effective address
132 +run: effective address is mem at address 0x60 (reg 0)
133 +run: storing 0xaabbccdd
134
135
136
137 :(scenario or_mem_at_r32_with_r32)
138 % Reg[0].i = 0x60;
139 % Mem.at(0x60) = 0x0d;
140 % Mem.at(0x61) = 0x0c;
141 % Mem.at(0x62) = 0x0b;
142 % Mem.at(0x63) = 0x0a;
143 % Reg[3].i = 0xa0b0c0d0;
144
145 0b 18
146 +run: or effective address with reg 3
147 +run: effective address is mem at address 0x60 (reg 0)
148 +run: storing 0xaabbccdd
149
150 :(before "End Single-Byte Opcodes")
151 case 0x0b: {
152 uint8_t modrm = next();
153 uint8_t arg1 = (modrm>>3)&0x7;
154 trace(2, "run") << "or effective address with reg " << NUM(arg1) << end();
155 const int32_t* arg2 = effective_address(modrm);
156 BINARY_BITWISE_OP(|, Reg[arg1].u, *arg2);
157 break;
158 }
159
160
161
162 :(scenario xor_r32_with_mem_at_r32)
163 % Reg[0].i = 0x60;
164 % Mem.at(0x60) = 0x0d;
165 % Mem.at(0x61) = 0x0c;
166 % Mem.at(0x62) = 0xbb;
167 % Mem.at(0x63) = 0xaa;
168 % Reg[3].i = 0xa0b0c0d0;
169
170 31 18
171 +run: xor reg 3 with effective address
172 +run: effective address is mem at address 0x60 (reg 0)
173 +run: storing 0x0a0bccdd
174
175
176
177 :(scenario xor_mem_at_r32_with_r32)
178 % Reg[0].i = 0x60;
179 % Mem.at(0x60) = 0x0d;
180 % Mem.at(0x61) = 0x0c;
181 % Mem.at(0x62) = 0x0b;
182 % Mem.at(0x63) = 0x0a;
183 % Reg[3].i = 0xa0b0c0d0;
184
185 33 18
186 +run: xor effective address with reg 3
187 +run: effective address is mem at address 0x60 (reg 0)
188 +run: storing 0xaabbccdd
189
190 :(before "End Single-Byte Opcodes")
191 case 0x33: {
192 uint8_t modrm = next();
193 uint8_t arg1 = (modrm>>3)&0x7;
194 trace(2, "run") << "xor effective address with reg " << NUM(arg1) << end();
195 const int32_t* arg2 = effective_address(modrm);
196 BINARY_BITWISE_OP(|, Reg[arg1].u, *arg2);
197 break;
198 }
199
200
201
202 :(scenario not_r32_with_mem_at_r32)
203 % Reg[3].i = 0x60;
204
205 % Mem.at(0x60) = 0xff;
206 % Mem.at(0x61) = 0x00;
207 % Mem.at(0x62) = 0x0f;
208 % Mem.at(0x63) = 0x0f;
209
210 f7 03
211 +run: 'not' of effective address
212 +run: effective address is mem at address 0x60 (reg 3)
213 +run: storing 0xf0f0ff00