1
2
3
4 :(scenario add_r32_to_mem_at_r32)
5 % Reg[EBX].i = 0x10;
6 % Reg[EAX].i = 0x60;
7 == 0x1
8
9 01 18
10
11 == 0x60
12 01 00 00 00
13 +run: add EBX to r/m32
14 +run: effective address is 0x60 (EAX)
15 +run: storing 0x00000011
16
17 :(before "End Mod Special-cases(addr)")
18 case 0:
19 switch (rm) {
20 default:
21 trace(90, "run") << "effective address is 0x" << std::hex << Reg[rm].u << " (" << rname(rm) << ")" << end();
22 addr = Reg[rm].u;
23 break;
24
25 }
26 break;
27
28
29
30 :(before "End Initialize Op Names(name)")
31 put(name, "03", "add rm32 to r32");
32
33 :(scenario add_mem_at_r32_to_r32)
34 % Reg[EAX].i = 0x60;
35 % Reg[EBX].i = 0x10;
36 == 0x1
37
38 03 18
39
40 == 0x60
41 01 00 00 00
42 +run: add r/m32 to EBX
43 +run: effective address is 0x60 (EAX)
44 +run: storing 0x00000011
45
46 :(before "End Single-Byte Opcodes")
47 case 0x03: {
48 uint8_t modrm = next();
49 uint8_t arg1 = (modrm>>3)&0x7;
50 trace(90, "run") << "add r/m32 to " << rname(arg1) << end();
51 const int32_t* arg2 = effective_address(modrm);
52 BINARY_ARITHMETIC_OP(+, Reg[arg1].i, *arg2);
53 break;
54 }
55
56
57
58 :(scenario subtract_r32_from_mem_at_r32)
59 % Reg[EAX].i = 0x60;
60 % Reg[EBX].i = 1;
61 == 0x1
62
63 29 18
64
65 == 0x60
66 0a 00 00 00
67 +run: subtract EBX from r/m32
68 +run: effective address is 0x60 (EAX)
69 +run: storing 0x00000009
70
71
72
73 :(before "End Initialize Op Names(name)")
74 put(name, "2b", "subtract rm32 from r32");
75
76 :(scenario subtract_mem_at_r32_from_r32)
77 % Reg[EAX].i = 0x60;
78 % Reg[EBX].i = 10;
79 == 0x1
80
81 2b 18
82
83 == 0x60
84 01 00 00 00
85 +run: subtract r/m32 from EBX
86 +run: effective address is 0x60 (EAX)
87 +run: storing 0x00000009
88
89 :(before "End Single-Byte Opcodes")
90 case 0x2b: {
91 uint8_t modrm = next();
92 uint8_t arg1 = (modrm>>3)&0x7;
93 trace(90, "run") << "subtract r/m32 from " << rname(arg1) << end();
94 const int32_t* arg2 = effective_address(modrm);
95 BINARY_ARITHMETIC_OP(-, Reg[arg1].i, *arg2);
96 break;
97 }
98
99
100
101 :(scenario and_r32_with_mem_at_r32)
102 % Reg[EAX].i = 0x60;
103 % Reg[EBX].i = 0xff;
104 == 0x1
105
106 21 18
107
108 == 0x60
109 0d 0c 0b 0a
110 +run: and EBX with r/m32
111 +run: effective address is 0x60 (EAX)
112 +run: storing 0x0000000d
113
114
115
116 :(before "End Initialize Op Names(name)")
117 put(name, "23", "r32 = bitwise AND of r32 with rm32");
118
119 :(scenario and_mem_at_r32_with_r32)
120 % Reg[EAX].i = 0x60;
121 % Reg[EBX].i = 0x0a0b0c0d;
122 == 0x1
123
124 23 18
125
126 == 0x60
127 ff 00 00 00
128 +run: and r/m32 with EBX
129 +run: effective address is 0x60 (EAX)
130 +run: storing 0x0000000d
131
132 :(before "End Single-Byte Opcodes")
133 case 0x23: {
134 uint8_t modrm = next();
135 uint8_t arg1 = (modrm>>3)&0x7;
136 trace(90, "run") << "and r/m32 with " << rname(arg1) << end();
137 const int32_t* arg2 = effective_address(modrm);
138 BINARY_BITWISE_OP(&, Reg[arg1].u, *arg2);
139 break;
140 }
141
142
143
144 :(scenario or_r32_with_mem_at_r32)
145 % Reg[EAX].i = 0x60;
146 % Reg[EBX].i = 0xa0b0c0d0;
147 == 0x1
148
149 09 18
150
151 == 0x60
152 0d 0c 0b 0a
153 +run: or EBX with r/m32
154 +run: effective address is 0x60 (EAX)
155 +run: storing 0xaabbccdd
156
157
158
159 :(before "End Initialize Op Names(name)")
160 put(name, "0b", "r32 = bitwise OR of r32 with rm32");
161
162 :(scenario or_mem_at_r32_with_r32)
163 % Reg[EAX].i = 0x60;
164 % Reg[EBX].i = 0xa0b0c0d0;
165 == 0x1
166
167 0b 18
168
169 == 0x60
170 0d 0c 0b 0a
171 +run: or r/m32 with EBX
172 +run: effective address is 0x60 (EAX)
173 +run: storing 0xaabbccdd
174
175 :(before "End Single-Byte Opcodes")
176 case 0x0b: {
177 uint8_t modrm = next();
178 uint8_t arg1 = (modrm>>3)&0x7;
179 trace(90, "run") << "or r/m32 with " << rname(arg1) << end();
180 const int32_t* arg2 = effective_address(modrm);
181 BINARY_BITWISE_OP(|, Reg[arg1].u, *arg2);
182 break;
183 }
184
185
186
187 :(scenario xor_r32_with_mem_at_r32)
188 % Reg[EAX].i = 0x60;
189 % Reg[EBX].i = 0xa0b0c0d0;
190 == 0x1
191
192 31 18
193
194 == 0x60
195 0d 0c bb aa
196 +run: xor EBX with r/m32
197 +run: effective address is 0x60 (EAX)
198 +run: storing 0x0a0bccdd
199
200
201
202 :(before "End Initialize Op Names(name)")
203 put(name, "33", "r32 = bitwise XOR of r32 with rm32");
204
205 :(scenario xor_mem_at_r32_with_r32)
206 % Reg[EAX].i = 0x60;
207 % Reg[EBX].i = 0xa0b0c0d0;
208 == 0x1
209
210 33 18
211
212 == 0x60
213 0d 0c 0b 0a
214 +run: xor r/m32 with EBX
215 +run: effective address is 0x60 (EAX)
216 +run: storing 0xaabbccdd
217
218 :(before "End Single-Byte Opcodes")
219 case 0x33: {
220 uint8_t modrm = next();
221 uint8_t arg1 = (modrm>>3)&0x7;
222 trace(90, "run") << "xor r/m32 with " << rname(arg1) << end();
223 const int32_t* arg2 = effective_address(modrm);
224 BINARY_BITWISE_OP(|, Reg[arg1].u, *arg2);
225 break;
226 }
227
228
229
230 :(scenario not_of_mem_at_r32)
231 % Reg[EBX].i = 0x60;
232 == 0x1
233
234 f7 13
235
236 == 0x60
237 ff 00 0f 0f
238 +run: operate on r/m32
239 +run: effective address is 0x60 (EBX)
240 +run: subop: not
241 +run: storing 0xf0f0ff00
242
243
244
245 :(scenario compare_mem_at_r32_with_r32_greater)
246 % Reg[EAX].i = 0x60;
247 % Reg[EBX].i = 0x0a0b0c07;
248 == 0x1
249
250 39 18
251
252 == 0x60
253 0d 0c 0b 0a
254 +run: compare EBX with r/m32
255 +run: effective address is 0x60 (EAX)
256 +run: SF=0; ZF=0; OF=0
257
258 :(scenario compare_mem_at_r32_with_r32_lesser)
259 % Reg[EAX].i = 0x60;
260 % Reg[EBX].i = 0x0a0b0c0d;
261 == 0x1
262
263 39 18
264
265 == 0x60
266 07 0c 0b 0a
267 +run: compare EBX with r/m32
268 +run: effective address is 0x60 (EAX)
269 +run: SF=1; ZF=0; OF=0
270
271 :(scenario compare_mem_at_r32_with_r32_equal)
272 % Reg[EAX].i = 0x60;
273 % Reg[EBX].i = 0x0a0b0c0d;
274 == 0x1
275
276 39 18
277
278 == 0x60
279 0d 0c 0b 0a
280 +run: compare EBX with r/m32
281 +run: effective address is 0x60 (EAX)
282 +run: SF=0; ZF=1; OF=0
283
284
285
286 :(before "End Initialize Op Names(name)")
287 put(name, "3b", "set SF if rm32 > r32");
288
289 :(scenario compare_r32_with_mem_at_r32_greater)
290 % Reg[EAX].i = 0x60;
291 % Reg[EBX].i = 0x0a0b0c0d;
292 == 0x1
293
294 3b 18
295
296 == 0x60
297 07 0c 0b 0a
298 +run: compare r/m32 with EBX
299 +run: effective address is 0x60 (EAX)
300 +run: SF=0; ZF=0; OF=0
301
302 :(before "End Single-Byte Opcodes")
303 case 0x3b: {
304 uint8_t modrm = next();
305 uint8_t reg1 = (modrm>>3)&0x7;
306 trace(90, "run") << "compare r/m32 with " << rname(reg1) << end();
307 int32_t arg1 = Reg[reg1].i;
308 int32_t* arg2 = effective_address(modrm);
309 int32_t tmp1 = arg1 - *arg2;
310 SF = (tmp1 < 0);
311 ZF = (tmp1 == 0);
312 int64_t tmp2 = arg1 - *arg2;
313 OF = (tmp1 != tmp2);
314 trace(90, "run") << "SF=" << SF << "; ZF=" << ZF << "; OF=" << OF << end();
315 break;
316 }
317
318 :(scenario compare_r32_with_mem_at_r32_lesser)
319 % Reg[EAX].i = 0x60;
320 % Reg[EBX].i = 0x0a0b0c07;
321 == 0x1
322
323 3b 18
324
325 == 0x60
326 0d 0c 0b 0a
327 +run: compare r/m32 with EBX
328 +run: effective address is 0x60 (EAX)
329 +run: SF=1; ZF=0; OF=0
330
331 :(scenario compare_r32_with_mem_at_r32_equal)
332 % Reg[EAX].i = 0x60;
333 % Reg[EBX].i = 0x0a0b0c0d;
334 == 0x1
335
336 3b 18
337
338 == 0x60
339 0d 0c 0b 0a
340 +run: compare r/m32 with EBX
341 +run: effective address is 0x60 (EAX)
342 +run: SF=0; ZF=1; OF=0
343
344
345
346 :(scenario copy_r32_to_mem_at_r32)
347 % Reg[EBX].i = 0xaf;
348 % Reg[EAX].i = 0x60;
349 == 0x1
350
351 89 18
352
353 +run: copy EBX to r/m32
354 +run: effective address is 0x60 (EAX)
355 +run: storing 0x000000af
356
357
358
359 :(before "End Initialize Op Names(name)")
360 put(name, "8b", "copy rm32 to r32");
361
362 :(scenario copy_mem_at_r32_to_r32)
363 % Reg[EAX].i = 0x60;
364 == 0x1
365
366 8b 18
367
368 == 0x60
369 af 00 00 00
370 +run: copy r/m32 to EBX
371 +run: effective address is 0x60 (EAX)
372 +run: storing 0x000000af
373
374 :(before "End Single-Byte Opcodes")
375 case 0x8b: {
376 uint8_t modrm = next();
377 uint8_t reg1 = (modrm>>3)&0x7;
378 trace(90, "run") << "copy r/m32 to " << rname(reg1) << end();
379 int32_t* arg2 = effective_address(modrm);
380 Reg[reg1].i = *arg2;
381 trace(90, "run") << "storing 0x" << HEXWORD << *arg2 << end();
382 break;
383 }
384
385
386
387 :(before "End Initialize Op Names(name)")
388 put(name, "88", "copy r8 (lowermost byte of r32) to r8/m8-at-r32");
389
390 :(scenario copy_r8_to_mem_at_r32)
391 % Reg[EBX].i = 0xafafafaf;
392 % Reg[EAX].i = 0x60;
393 == 0x1
394
395 88 18
396
397 +run: copy lowermost byte of EBX to r8/m8-at-r32
398 +run: effective address is 0x60 (EAX)
399 +run: storing 0xaf
400 % CHECK_EQ(0x000000af, read_mem_u32(0x60));
401
402 :(before "End Single-Byte Opcodes")
403 case 0x88: {
404 uint8_t modrm = next();
405 uint8_t reg2 = (modrm>>3)&0x7;
406 trace(90, "run") << "copy lowermost byte of " << rname(reg2) << " to r8/m8-at-r32" << end();
407
408 uint8_t* arg1 = reinterpret_cast<uint8_t*>(effective_address(modrm));
409 *arg1 = Reg[reg2].u;
410 trace(90, "run") << "storing 0x" << HEXBYTE << NUM(*arg1) << end();
411 break;
412 }
413
414
415
416 :(before "End Initialize Op Names(name)")
417 put(name, "8a", "copy r8/m8-at-r32 to r8 (lowermost byte of r32)");
418
419 :(scenario copy_mem_at_r32_to_r8)
420 % Reg[EBX].i = 0xaf;
421 % Reg[EAX].i = 0x60;
422 == 0x1
423
424 8a 18
425
426 == 0x60
427 af ff ff ff
428 +run: copy r8/m8-at-r32 to lowermost byte of EBX
429 +run: effective address is 0x60 (EAX)
430 +run: storing 0xaf
431
432 :(before "End Single-Byte Opcodes")
433 case 0x8a: {
434 uint8_t modrm = next();
435 uint8_t reg1 = (modrm>>3)&0x7;
436 trace(90, "run") << "copy r8/m8-at-r32 to lowermost byte of " << rname(reg1) << end();
437
438 uint8_t* arg2 = reinterpret_cast<uint8_t*>(effective_address(modrm));
439 Reg[reg1].u = static_cast<uint32_t>(*arg2);
440 trace(90, "run") << "storing 0x" << HEXBYTE << NUM(*arg2) << end();
441 break;
442 }
443
444
445
446 :(before "End Initialize Op Names(name)")
447 put(name, "ff", "jump/push/call rm32 based on subop");
448
449 :(scenario jump_mem_at_r32)
450 % Reg[EAX].i = 0x60;
451 == 0x1
452
453 ff 20
454
455 05 00 00 00 01
456 05 00 00 00 02
457 == 0x60
458 08 00 00 00
459 +run: inst: 0x00000001
460 +run: jump to r/m32
461 +run: effective address is 0x60 (EAX)
462 +run: jumping to 0x00000008
463 +run: inst: 0x00000008
464 -run: inst: 0x00000003
465
466 :(before "End Single-Byte Opcodes")
467 case 0xff: {
468 uint8_t modrm = next();
469 uint8_t subop = (modrm>>3)&0x7;
470 switch (subop) {
471 case 4: {
472 trace(90, "run") << "jump to r/m32" << end();
473 int32_t* arg2 = effective_address(modrm);
474 EIP = *arg2;
475 trace(90, "run") << "jumping to 0x" << HEXWORD << EIP << end();
476 break;
477 }
478
479 }
480 break;
481 }
482
483
484
485 :(scenario push_mem_at_r32)
486 % Reg[EAX].i = 0x60;
487 % Reg[ESP].u = 0x14;
488 == 0x1
489
490 ff 30
491
492 == 0x60
493 af 00 00 00
494 +run: push r/m32
495 +run: effective address is 0x60 (EAX)
496 +run: decrementing ESP to 0x00000010
497 +run: pushing value 0x000000af
498
499 :(before "End Op ff Subops")
500 case 6: {
501 trace(90, "run") << "push r/m32" << end();
502 const int32_t* val = effective_address(modrm);
503 push(*val);
504 break;
505 }
506
507
508
509 :(before "End Initialize Op Names(name)")
510 put(name, "8f", "pop top of stack to rm32");
511
512 :(scenario pop_mem_at_r32)
513 % Reg[EAX].i = 0x60;
514 % Reg[ESP].u = 0x10;
515 == 0x1
516
517 8f 00
518
519 == 0x10
520 30 00 00 00
521 +run: pop into r/m32
522 +run: effective address is 0x60 (EAX)
523 +run: popping value 0x00000030
524 +run: incrementing ESP to 0x00000014
525
526 :(before "End Single-Byte Opcodes")
527 case 0x8f: {
528 uint8_t modrm = next();
529 uint8_t subop = (modrm>>3)&0x7;
530 switch (subop) {
531 case 0: {
532 trace(90, "run") << "pop into r/m32" << end();
533 int32_t* dest = effective_address(modrm);
534 *dest = pop();
535 break;
536 }
537 }
538 break;
539 }
540
541
542
543 :(scenario add_r32_to_mem_at_displacement)
544 % Reg[EBX].i = 0x10; // source
545 == 0x1
546
547 01 1d 60 00 00 00
548
549 == 0x60
550 01 00 00 00
551 +run: add EBX to r/m32
552 +run: effective address is 0x60 (disp32)
553 +run: storing 0x00000011
554
555 :(before "End Mod 0 Special-cases(addr)")
556 case 5:
557 addr = next32();
558 trace(90, "run") << "effective address is 0x" << std::hex << addr << " (disp32)" << end();
559 break;
560
561
562
563 :(scenario add_r32_to_mem_at_r32_plus_disp8)
564 % Reg[EBX].i = 0x10; // source
565 % Reg[EAX].i = 0x5e; // dest
566 == 0x1
567
568 01 58 02
569
570 == 0x60
571 01 00 00 00
572 +run: add EBX to r/m32
573 +run: effective address is initially 0x5e (EAX)
574 +run: effective address is 0x60 (after adding disp8)
575 +run: storing 0x00000011
576
577 :(before "End Mod Special-cases(addr)")
578 case 1:
579 switch (rm) {
580 default:
581 addr = Reg[rm].u;
582 trace(90, "run") << "effective address is initially 0x" << std::hex << addr << " (" << rname(rm) << ")" << end();
583 break;
584
585 }
586 if (addr > 0) {
587 addr += static_cast<int8_t>(next());
588 trace(90, "run") << "effective address is 0x" << std::hex << addr << " (after adding disp8)" << end();
589 }
590 break;
591
592 :(scenario add_r32_to_mem_at_r32_plus_negative_disp8)
593 % Reg[EBX].i = 0x10; // source
594 % Reg[EAX].i = 0x61; // dest
595 == 0x1
596
597 01 58 ff
598
599 == 0x60
600 01 00 00 00
601 +run: add EBX to r/m32
602 +run: effective address is initially 0x61 (EAX)
603 +run: effective address is 0x60 (after adding disp8)
604 +run: storing 0x00000011
605
606
607
608 :(scenario add_r32_to_mem_at_r32_plus_disp32)
609 % Reg[EBX].i = 0x10; // source
610 % Reg[EAX].i = 0x5e; // dest
611 == 0x1
612
613 01 98 02 00 00 00
614
615 == 0x60
616 01 00 00 00
617 +run: add EBX to r/m32
618 +run: effective address is initially 0x5e (EAX)
619 +run: effective address is 0x60 (after adding disp32)
620 +run: storing 0x00000011
621
622 :(before "End Mod Special-cases(addr)")
623 case 2:
624 switch (rm) {
625 default:
626 addr = Reg[rm].u;
627 trace(90, "run") << "effective address is initially 0x" << std::hex << addr << " (" << rname(rm) << ")" << end();
628 break;
629
630 }
631 if (addr > 0) {
632 addr += next32();
633 trace(90, "run") << "effective address is 0x" << std::hex << addr << " (after adding disp32)" << end();
634 }
635 break;
636
637 :(scenario add_r32_to_mem_at_r32_plus_negative_disp32)
638 % Reg[EBX].i = 0x10; // source
639 % Reg[EAX].i = 0x61; // dest
640 == 0x1
641
642 01 98 ff ff ff ff
643
644 == 0x60
645 01 00 00 00
646 +run: add EBX to r/m32
647 +run: effective address is initially 0x61 (EAX)
648 +run: effective address is 0x60 (after adding disp32)
649 +run: storing 0x00000011