1
2
3
4 :(scenario add_r32_to_mem_at_r32)
5 % Reg[EBX].i = 0x10;
6 % Reg[EAX].i = 0x2000;
7 == 0x1
8
9 01 18
10
11 == 0x2000
12 01 00 00 00
13 +run: add EBX to r/m32
14 +run: effective address is 0x00002000 (EAX)
15 +run: storing 0x00000011
16
17 :(before "End Mod Special-cases(addr)")
18 case 0:
19 switch (rm) {
20 default:
21 trace(90, "run") << "effective address is 0x" << HEXWORD << Reg[rm].u << " (" << rname(rm) << ")" << end();
22 addr = Reg[rm].u;
23 break;
24
25 }
26 break;
27
28
29
30 :(before "End Initialize Op Names")
31 put_new(Name, "03", "add rm32 to r32 (add)");
32
33 :(scenario add_mem_at_r32_to_r32)
34 % Reg[EAX].i = 0x2000;
35 % Reg[EBX].i = 0x10;
36 == 0x1
37
38 03 18
39
40 == 0x2000
41 01 00 00 00
42 +run: add r/m32 to EBX
43 +run: effective address is 0x00002000 (EAX)
44 +run: storing 0x00000011
45
46 :(before "End Single-Byte Opcodes")
47 case 0x03: {
48 const uint8_t modrm = next();
49 const uint8_t arg1 = (modrm>>3)&0x7;
50 trace(90, "run") << "add r/m32 to " << rname(arg1) << end();
51 const int32_t* arg2 = effective_address(modrm);
52 BINARY_ARITHMETIC_OP(+, Reg[arg1].i, *arg2);
53 break;
54 }
55
56
57
58 :(scenario subtract_r32_from_mem_at_r32)
59 % Reg[EAX].i = 0x2000;
60 % Reg[EBX].i = 1;
61 == 0x1
62
63 29 18
64
65 == 0x2000
66 0a 00 00 00
67 +run: subtract EBX from r/m32
68 +run: effective address is 0x00002000 (EAX)
69 +run: storing 0x00000009
70
71
72
73 :(before "End Initialize Op Names")
74 put_new(Name, "2b", "subtract rm32 from r32 (sub)");
75
76 :(scenario subtract_mem_at_r32_from_r32)
77 % Reg[EAX].i = 0x2000;
78 % Reg[EBX].i = 10;
79 == 0x1
80
81 2b 18
82
83 == 0x2000
84 01 00 00 00
85 +run: subtract r/m32 from EBX
86 +run: effective address is 0x00002000 (EAX)
87 +run: storing 0x00000009
88
89 :(before "End Single-Byte Opcodes")
90 case 0x2b: {
91 const uint8_t modrm = next();
92 const uint8_t arg1 = (modrm>>3)&0x7;
93 trace(90, "run") << "subtract r/m32 from " << rname(arg1) << end();
94 const int32_t* arg2 = effective_address(modrm);
95 BINARY_ARITHMETIC_OP(-, Reg[arg1].i, *arg2);
96 break;
97 }
98
99
100
101 :(scenario and_r32_with_mem_at_r32)
102 % Reg[EAX].i = 0x2000;
103 % Reg[EBX].i = 0xff;
104 == 0x1
105
106 21 18
107
108 == 0x2000
109 0d 0c 0b 0a
110 +run: and EBX with r/m32
111 +run: effective address is 0x00002000 (EAX)
112 +run: storing 0x0000000d
113
114
115
116 :(before "End Initialize Op Names")
117 put_new(Name, "23", "r32 = bitwise AND of r32 with rm32 (and)");
118
119 :(scenario and_mem_at_r32_with_r32)
120 % Reg[EAX].i = 0x2000;
121 % Reg[EBX].i = 0x0a0b0c0d;
122 == 0x1
123
124 23 18
125
126 == 0x2000
127 ff 00 00 00
128 +run: and r/m32 with EBX
129 +run: effective address is 0x00002000 (EAX)
130 +run: storing 0x0000000d
131
132 :(before "End Single-Byte Opcodes")
133 case 0x23: {
134 const uint8_t modrm = next();
135 const uint8_t arg1 = (modrm>>3)&0x7;
136 trace(90, "run") << "and r/m32 with " << rname(arg1) << end();
137 const int32_t* arg2 = effective_address(modrm);
138 BINARY_BITWISE_OP(&, Reg[arg1].u, *arg2);
139 break;
140 }
141
142
143
144 :(scenario or_r32_with_mem_at_r32)
145 % Reg[EAX].i = 0x2000;
146 % Reg[EBX].i = 0xa0b0c0d0;
147 == 0x1
148
149 09 18
150
151 == 0x2000
152 0d 0c 0b 0a
153 +run: or EBX with r/m32
154 +run: effective address is 0x00002000 (EAX)
155 +run: storing 0xaabbccdd
156
157
158
159 :(before "End Initialize Op Names")
160 put_new(Name, "0b", "r32 = bitwise OR of r32 with rm32 (or)");
161
162 :(scenario or_mem_at_r32_with_r32)
163 % Reg[EAX].i = 0x2000;
164 % Reg[EBX].i = 0xa0b0c0d0;
165 == 0x1
166
167 0b 18
168
169 == 0x2000
170 0d 0c 0b 0a
171 +run: or r/m32 with EBX
172 +run: effective address is 0x00002000 (EAX)
173 +run: storing 0xaabbccdd
174
175 :(before "End Single-Byte Opcodes")
176 case 0x0b: {
177 const uint8_t modrm = next();
178 const uint8_t arg1 = (modrm>>3)&0x7;
179 trace(90, "run") << "or r/m32 with " << rname(arg1) << end();
180 const int32_t* arg2 = effective_address(modrm);
181 BINARY_BITWISE_OP(|, Reg[arg1].u, *arg2);
182 break;
183 }
184
185
186
187 :(scenario xor_r32_with_mem_at_r32)
188 % Reg[EAX].i = 0x2000;
189 % Reg[EBX].i = 0xa0b0c0d0;
190 == 0x1
191
192 31 18
193
194 == 0x2000
195 0d 0c bb aa
196 +run: xor EBX with r/m32
197 +run: effective address is 0x00002000 (EAX)
198 +run: storing 0x0a0bccdd
199
200
201
202 :(before "End Initialize Op Names")
203 put_new(Name, "33", "r32 = bitwise XOR of r32 with rm32 (xor)");
204
205 :(scenario xor_mem_at_r32_with_r32)
206 % Reg[EAX].i = 0x2000;
207 % Reg[EBX].i = 0xa0b0c0d0;
208 == 0x1
209
210 33 18
211
212 == 0x2000
213 0d 0c 0b 0a
214 +run: xor r/m32 with EBX
215 +run: effective address is 0x00002000 (EAX)
216 +run: storing 0xaabbccdd
217
218 :(before "End Single-Byte Opcodes")
219 case 0x33: {
220 const uint8_t modrm = next();
221 const uint8_t arg1 = (modrm>>3)&0x7;
222 trace(90, "run") << "xor r/m32 with " << rname(arg1) << end();
223 const int32_t* arg2 = effective_address(modrm);
224 BINARY_BITWISE_OP(|, Reg[arg1].u, *arg2);
225 break;
226 }
227
228
229
230 :(scenario not_of_mem_at_r32)
231 % Reg[EBX].i = 0x2000;
232 == 0x1
233
234 f7 13
235
236 == 0x2000
237 ff 00 0f 0f
238 +run: operate on r/m32
239 +run: effective address is 0x00002000 (EBX)
240 +run: subop: not
241 +run: storing 0xf0f0ff00
242
243
244
245 :(scenario compare_mem_at_r32_with_r32_greater)
246 % Reg[EAX].i = 0x2000;
247 % Reg[EBX].i = 0x0a0b0c07;
248 == 0x1
249
250 39 18
251
252 == 0x2000
253 0d 0c 0b 0a
254 +run: compare EBX with r/m32
255 +run: effective address is 0x00002000 (EAX)
256 +run: SF=0; ZF=0; OF=0
257
258 :(scenario compare_mem_at_r32_with_r32_lesser)
259 % Reg[EAX].i = 0x2000;
260 % Reg[EBX].i = 0x0a0b0c0d;
261 == 0x1
262
263 39 18
264
265 == 0x2000
266 07 0c 0b 0a
267 +run: compare EBX with r/m32
268 +run: effective address is 0x00002000 (EAX)
269 +run: SF=1; ZF=0; OF=0
270
271 :(scenario compare_mem_at_r32_with_r32_equal)
272 % Reg[EAX].i = 0x2000;
273 % Reg[EBX].i = 0x0a0b0c0d;
274 == 0x1
275
276 39 18
277
278 == 0x2000
279 0d 0c 0b 0a
280 +run: compare EBX with r/m32
281 +run: effective address is 0x00002000 (EAX)
282 +run: SF=0; ZF=1; OF=0
283
284
285
286 :(before "End Initialize Op Names")
287 put_new(Name, "3b", "compare: set SF if r32 < rm32 (cmp)");
288
289 :(scenario compare_r32_with_mem_at_r32_greater)
290 % Reg[EAX].i = 0x2000;
291 % Reg[EBX].i = 0x0a0b0c0d;
292 == 0x1
293
294 3b 18
295
296 == 0x2000
297 07 0c 0b 0a
298 +run: compare r/m32 with EBX
299 +run: effective address is 0x00002000 (EAX)
300 +run: SF=0; ZF=0; OF=0
301
302 :(before "End Single-Byte Opcodes")
303 case 0x3b: {
304 const uint8_t modrm = next();
305 const uint8_t reg1 = (modrm>>3)&0x7;
306 trace(90, "run") << "compare r/m32 with " << rname(reg1) << end();
307 const int32_t arg1 = Reg[reg1].i;
308 const int32_t* arg2 = effective_address(modrm);
309 const int32_t tmp1 = arg1 - *arg2;
310 SF = (tmp1 < 0);
311 ZF = (tmp1 == 0);
312 int64_t tmp2 = arg1 - *arg2;
313 OF = (tmp1 != tmp2);
314 trace(90, "run") << "SF=" << SF << "; ZF=" << ZF << "; OF=" << OF << end();
315 break;
316 }
317
318 :(scenario compare_r32_with_mem_at_r32_lesser)
319 % Reg[EAX].i = 0x2000;
320 % Reg[EBX].i = 0x0a0b0c07;
321 == 0x1
322
323 3b 18
324
325 == 0x2000
326 0d 0c 0b 0a
327 +run: compare r/m32 with EBX
328 +run: effective address is 0x00002000 (EAX)
329 +run: SF=1; ZF=0; OF=0
330
331 :(scenario compare_r32_with_mem_at_r32_equal)
332 % Reg[EAX].i = 0x2000;
333 % Reg[EBX].i = 0x0a0b0c0d;
334 == 0x1
335
336 3b 18
337
338 == 0x2000
339 0d 0c 0b 0a
340 +run: compare r/m32 with EBX
341 +run: effective address is 0x00002000 (EAX)
342 +run: SF=0; ZF=1; OF=0
343
344
345
346 :(scenario copy_r32_to_mem_at_r32)
347 % Reg[EBX].i = 0xaf;
348 % Reg[EAX].i = 0x60;
349 == 0x1
350
351 89 18
352
353 +run: copy EBX to r/m32
354 +run: effective address is 0x00000060 (EAX)
355 +run: storing 0x000000af
356
357
358
359 :(before "End Initialize Op Names")
360 put_new(Name, "8b", "copy rm32 to r32 (mov)");
361
362 :(scenario copy_mem_at_r32_to_r32)
363 % Reg[EAX].i = 0x2000;
364 == 0x1
365
366 8b 18
367
368 == 0x2000
369 af 00 00 00
370 +run: copy r/m32 to EBX
371 +run: effective address is 0x00002000 (EAX)
372 +run: storing 0x000000af
373
374 :(before "End Single-Byte Opcodes")
375 case 0x8b: {
376 const uint8_t modrm = next();
377 const uint8_t rdest = (modrm>>3)&0x7;
378 trace(90, "run") << "copy r/m32 to " << rname(rdest) << end();
379 const int32_t* src = effective_address(modrm);
380 Reg[rdest].i = *src;
381 trace(90, "run") << "storing 0x" << HEXWORD << *src << end();
382 break;
383 }
384
385
386
387 :(scenario jump_mem_at_r32)
388 % Reg[EAX].i = 0x2000;
389 == 0x1
390
391 ff 20
392
393 05 00 00 00 01
394 05 00 00 00 02
395 == 0x2000
396 08 00 00 00
397 +run: inst: 0x00000001
398 +run: jump to r/m32
399 +run: effective address is 0x00002000 (EAX)
400 +run: jumping to 0x00000008
401 +run: inst: 0x00000008
402 -run: inst: 0x00000003
403
404 :(before "End Op ff Subops")
405 case 4: {
406 trace(90, "run") << "jump to r/m32" << end();
407 const int32_t* arg2 = effective_address(modrm);
408 EIP = *arg2;
409 trace(90, "run") << "jumping to 0x" << HEXWORD << EIP << end();
410 break;
411 }
412
413
414
415 :(scenario push_mem_at_r32)
416 % Reg[EAX].i = 0x2000;
417 % Reg[ESP].u = 0x14;
418 == 0x1
419
420 ff 30
421
422 == 0x2000
423 af 00 00 00
424 +run: push r/m32
425 +run: effective address is 0x00002000 (EAX)
426 +run: decrementing ESP to 0x00000010
427 +run: pushing value 0x000000af
428
429 :(before "End Op ff Subops")
430 case 6: {
431 trace(90, "run") << "push r/m32" << end();
432 const int32_t* val = effective_address(modrm);
433 push(*val);
434 break;
435 }
436
437
438
439 :(before "End Initialize Op Names")
440 put_new(Name, "8f", "pop top of stack to rm32 (pop)");
441
442 :(scenario pop_mem_at_r32)
443 % Reg[EAX].i = 0x60;
444 % Reg[ESP].u = 0x2000;
445 == 0x1
446
447 8f 00
448
449 == 0x2000
450 30 00 00 00
451 +run: pop into r/m32
452 +run: effective address is 0x00000060 (EAX)
453 +run: popping value 0x00000030
454 +run: incrementing ESP to 0x00002004
455
456 :(before "End Single-Byte Opcodes")
457 case 0x8f: {
458 const uint8_t modrm = next();
459 const uint8_t subop = (modrm>>3)&0x7;
460 switch (subop) {
461 case 0: {
462 trace(90, "run") << "pop into r/m32" << end();
463 int32_t* dest = effective_address(modrm);
464 *dest = pop();
465 break;
466 }
467 }
468 break;
469 }
470
471
472
473 :(scenario add_r32_to_mem_at_displacement)
474 % Reg[EBX].i = 0x10; // source
475 == 0x1
476
477 01 1d 00 20 00 00
478
479 == 0x2000
480 01 00 00 00
481 +run: add EBX to r/m32
482 +run: effective address is 0x00002000 (disp32)
483 +run: storing 0x00000011
484
485 :(before "End Mod 0 Special-cases(addr)")
486 case 5:
487 addr = next32();
488 trace(90, "run") << "effective address is 0x" << HEXWORD << addr << " (disp32)" << end();
489 break;
490
491
492
493 :(scenario add_r32_to_mem_at_r32_plus_disp8)
494 % Reg[EBX].i = 0x10; // source
495 % Reg[EAX].i = 0x1ffe; // dest
496 == 0x1
497
498 01 58 02
499
500 == 0x2000
501 01 00 00 00
502 +run: add EBX to r/m32
503 +run: effective address is initially 0x00001ffe (EAX)
504 +run: effective address is 0x00002000 (after adding disp8)
505 +run: storing 0x00000011
506
507 :(before "End Mod Special-cases(addr)")
508 case 1:
509 switch (rm) {
510 default:
511 addr = Reg[rm].u;
512 trace(90, "run") << "effective address is initially 0x" << HEXWORD << addr << " (" << rname(rm) << ")" << end();
513 break;
514
515 }
516 if (addr > 0) {
517 addr += static_cast<int8_t>(next());
518 trace(90, "run") << "effective address is 0x" << HEXWORD << addr << " (after adding disp8)" << end();
519 }
520 break;
521
522 :(scenario add_r32_to_mem_at_r32_plus_negative_disp8)
523 % Reg[EBX].i = 0x10; // source
524 % Reg[EAX].i = 0x2001; // dest
525 == 0x1
526
527 01 58 ff
528
529 == 0x2000
530 01 00 00 00
531 +run: add EBX to r/m32
532 +run: effective address is initially 0x00002001 (EAX)
533 +run: effective address is 0x00002000 (after adding disp8)
534 +run: storing 0x00000011
535
536
537
538 :(scenario add_r32_to_mem_at_r32_plus_disp32)
539 % Reg[EBX].i = 0x10; // source
540 % Reg[EAX].i = 0x1ffe; // dest
541 == 0x1
542
543 01 98 02 00 00 00
544
545 == 0x2000
546 01 00 00 00
547 +run: add EBX to r/m32
548 +run: effective address is initially 0x00001ffe (EAX)
549 +run: effective address is 0x00002000 (after adding disp32)
550 +run: storing 0x00000011
551
552 :(before "End Mod Special-cases(addr)")
553 case 2:
554 switch (rm) {
555 default:
556 addr = Reg[rm].u;
557 trace(90, "run") << "effective address is initially 0x" << HEXWORD << addr << " (" << rname(rm) << ")" << end();
558 break;
559
560 }
561 if (addr > 0) {
562 addr += next32();
563 trace(90, "run") << "effective address is 0x" << HEXWORD << addr << " (after adding disp32)" << end();
564 }
565 break;
566
567 :(scenario add_r32_to_mem_at_r32_plus_negative_disp32)
568 % Reg[EBX].i = 0x10; // source
569 % Reg[EAX].i = 0x2001; // dest
570 == 0x1
571
572 01 98 ff ff ff ff
573
574 == 0x2000
575 01 00 00 00
576 +run: add EBX to r/m32
577 +run: effective address is initially 0x00002001 (EAX)
578 +run: effective address is 0x00002000 (after adding disp32)
579 +run: storing 0x00000011
580
581
582
583 :(before "End Initialize Op Names")
584 put_new(Name, "8d", "copy address in rm32 into r32 (lea)");
585
586 :(scenario copy_address)
587 % Reg[EAX].u = 0x2000;
588 == 0x1
589
590 8d 18
591
592 +run: copy address into EBX
593 +run: effective address is 0x00002000 (EAX)
594
595 :(before "End Single-Byte Opcodes")
596 case 0x8d: {
597 const uint8_t modrm = next();
598 const uint8_t arg1 = (modrm>>3)&0x7;
599 trace(90, "run") << "copy address into " << rname(arg1) << end();
600 Reg[arg1].u = effective_address_number(modrm);
601 break;
602 }