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| author | Andreas Rumpf <rumpf_a@web.de> | 2017-09-15 21:12:59 +0200 |
|---|---|---|
| committer | Andreas Rumpf <rumpf_a@web.de> | 2017-09-15 21:12:59 +0200 |
| commit | ecf1424456bd95167ac0e1e721307032e22d172f (patch) | |
| tree | 61781a1a7f4a037cfe88afc0988555e0b17d9782 /compiler/vmdef.nim | |
| parent | 0fe2a83dda25d682f04f7af0f73a50c45362c79f (diff) | |
| parent | 8ea78b1bc9dc0b4d883b4f0750ee84e93605b82a (diff) | |
| download | Nim-ecf1424456bd95167ac0e1e721307032e22d172f.tar.gz | |
Merge branch 'devel' into araq
Diffstat (limited to 'compiler/vmdef.nim')
| -rw-r--r-- | compiler/vmdef.nim | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/compiler/vmdef.nim b/compiler/vmdef.nim index 7e1309e0a..5395d4bad 100644 --- a/compiler/vmdef.nim +++ b/compiler/vmdef.nim @@ -234,6 +234,9 @@ const slotSomeTemp* = slotTempUnknown relativeJumps* = {opcTJmp, opcFJmp, opcJmp, opcJmpBack} +# flag is used to signal opcSeqLen if node is NimNode. +const nimNodeFlag* = 16 + template opcode*(x: TInstr): TOpcode = TOpcode(x.uint32 and 0xff'u32) template regA*(x: TInstr): TRegister = TRegister(x.uint32 shr 8'u32 and 0xff'u32) template regB*(x: TInstr): TRegister = TRegister(x.uint32 shr 16'u32 and 0xff'u32) |