diff options
| -rw-r--r-- | compiler/vmgen.nim | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/compiler/vmgen.nim b/compiler/vmgen.nim index eae600f76..0dc55862c 100644 --- a/compiler/vmgen.nim +++ b/compiler/vmgen.nim @@ -231,6 +231,12 @@ proc getTemp(cc: PCtx; tt: PType): TRegister = # for e.g. mNAdd[Multiple]: let k = if typ.isNil: slotTempComplex else: typ.getSlotKind result = getFreeRegister(cc, k, start = 0) + when false: + # enable this to find "register" leaks: + if result == 4: + echo "begin ---------------" + writeStackTrace() + echo "end ----------------" proc freeTemp(c: PCtx; r: TRegister) = let c = c.prc @@ -1703,6 +1709,7 @@ proc genCheckedObjAccessAux(c: PCtx; n: PNode; dest: var TDest; flags: TGenFlags let setLit = c.genx(checkExpr[1]) var rs = c.getTemp(getSysType(c.graph, n.info, tyBool)) c.gABC(n, opcContainsSet, rs, setLit, discVal) + c.freeTemp(discVal) c.freeTemp(setLit) # If the check fails let the user know let lab1 = c.xjmp(n, if negCheck: opcFJmp else: opcTJmp, rs) |