summary refs log tree commit diff stats
path: root/lib/system/widestrs.nim
Commit message (Expand)AuthorAgeFilesLines
* GC'ed wide strings for windowsAraq2013-05-201-235/+124
* win64 is a supported target; bugfix: nimrod c -r on windows; stdlib uses wid...Araq2012-03-041-0/+260
'n30' href='#n30'>30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666
//: operating on memory at the address provided by some register
//: we'll now start providing data in a separate segment

:(scenario add_r32_to_mem_at_r32)
% Reg[EBX].i = 0x10;
% Reg[EAX].i = 0x2000;
== 0x1  # code segment
# op  ModR/M  SIB   displacement  immediate
  01  18                                     # add EBX to *EAX
# ModR/M in binary: 00 (indirect mode) 011 (src EAX) 000 (dest EAX)
== 0x2000  # data segment
01 00 00 00  # 1
+run: add EBX to r/m32
+run: effective address is 0x2000 (EAX)
+run: storing 0x00000011

:(before "End Mod Special-cases(addr)")
case 0:  // indirect addressing
  switch (rm) {
  default:  // address in register
    trace(90, "run") << "effective address is 0x" << std::hex << Reg[rm].u << " (" << rname(rm) << ")" << end();
    addr = Reg[rm].u;
    break;
  // End Mod 0 Special-cases(addr)
  }
  break;

//:

:(before "End Initialize Op Names(name)")
put(name, "03", "add rm32 to r32");

:(scenario add_mem_at_r32_to_r32)
% Reg[EAX].i = 0x2000;
% Reg[EBX].i = 0x10;
== 0x1  # code segment
# op  ModR/M  SIB   displacement  immediate
  03  18                                      # add *EAX to EBX
# ModR/M in binary: 00 (indirect mode) 011 (src EAX) 000 (dest EAX)
== 0x2000  # data segment
01 00 00 00  # 1
+run: add r/m32 to EBX
+run: effective address is 0x2000 (EAX)
+run: storing 0x00000011

:(before "End Single-Byte Opcodes")
case 0x03: {  // add r/m32 to r32
  uint8_t modrm = next();
  uint8_t arg1 = (modrm>>3)&0x7;
  trace(90, "run") << "add r/m32 to " << rname(arg1) << end();
  const int32_t* arg2 = effective_address(modrm);
  BINARY_ARITHMETIC_OP(+, Reg[arg1].i, *arg2);
  break;
}

//:: subtract

:(scenario subtract_r32_from_mem_at_r32)
% Reg[EAX].i = 0x2000;
% Reg[EBX].i = 1;
== 0x1  # code segment
# op  ModR/M  SIB   displacement  immediate
  29  18                                      # subtract EBX from *EAX
# ModR/M in binary: 00 (indirect mode) 011 (src EAX) 000 (dest EAX)
== 0x2000  # data segment
0a 00 00 00  # 10
+run: subtract EBX from r/m32
+run: effective address is 0x2000 (EAX)
+run: storing 0x00000009

//:

:(before "End Initialize Op Names(name)")
put(name, "2b", "subtract rm32 from r32");

:(scenario subtract_mem_at_r32_from_r32)
% Reg[EAX].i = 0x2000;
% Reg[EBX].i = 10;
== 0x1  # code segment
# op  ModR/M  SIB   displacement  immediate
  2b  18                                      # subtract *EAX from EBX
# ModR/M in binary: 00 (indirect mode) 011 (src EAX) 000 (dest EAX)
== 0x2000  # data segment
01 00 00 00  # 1
+run: subtract r/m32 from EBX
+run: effective address is 0x2000 (EAX)
+run: storing 0x00000009

:(before "End Single-Byte Opcodes")
case 0x2b: {  // subtract r/m32 from r32
  uint8_t modrm = next();
  uint8_t arg1 = (modrm>>3)&0x7;
  trace(90, "run") << "subtract r/m32 from " << rname(arg1) << end();
  const int32_t* arg2 = effective_address(modrm);
  BINARY_ARITHMETIC_OP(-, Reg[arg1].i, *arg2);
  break;
}

//:: and

:(scenario and_r32_with_mem_at_r32)
% Reg[EAX].i = 0x2000;
% Reg[EBX].i = 0xff;
== 0x1  # code segment
# op  ModR/M  SIB   displacement  immediate
  21  18                                      # and EBX with *EAX
# ModR/M in binary: 00 (indirect mode) 011 (src EAX) 000 (dest EAX)
== 0x2000  # data segment
0d 0c 0b 0a  # 0x0a0b0c0d
+run: and EBX with r/m32
+run: effective address is 0x2000 (EAX)
+run: storing 0x0000000d

//:

:(before "End Initialize Op Names(name)")
put(name, "23", "r32 = bitwise AND of r32 with rm32");

:(scenario and_mem_at_r32_with_r32)
% Reg[EAX].i = 0x2000;
% Reg[EBX].i = 0x0a0b0c0d;
== 0x1  # code segment
# op  ModR/M  SIB   displacement  immediate
  23  18                                      # and *EAX with EBX
# ModR/M in binary: 00 (indirect mode) 011 (src EAX) 000 (dest EAX)
== 0x2000  # data segment
ff 00 00 00  # 0xff
+run: and r/m32 with EBX
+run: effective address is 0x2000 (EAX)
+run: storing 0x0000000d

:(before "End Single-Byte Opcodes")
case 0x23: {  // and r/m32 with r32
  uint8_t modrm = next();
  uint8_t arg1 = (modrm>>3)&0x7;
  trace(90, "run") << "and r/m32 with " << rname(arg1) << end();
  const int32_t* arg2 = effective_address(modrm);
  BINARY_BITWISE_OP(&, Reg[arg1].u, *arg2);
  break;
}

//:: or

:(scenario or_r32_with_mem_at_r32)
% Reg[EAX].i = 0x2000;
% Reg[EBX].i = 0xa0b0c0d0;
== 0x1  # code segment
# op  ModR/M  SIB   displacement  immediate
  09  18                                      # or EBX with *EAX
# ModR/M in binary: 00 (indirect mode) 011 (src EAX) 000 (dest EAX)
== 0x2000  # data segment
0d 0c 0b 0a  # 0x0a0b0c0d
+run: or EBX with r/m32
+run: effective address is 0x2000 (EAX)
+run: storing 0xaabbccdd

//:

:(before "End Initialize Op Names(name)")
put(name, "0b", "r32 = bitwise OR of r32 with rm32");

:(scenario or_mem_at_r32_with_r32)
% Reg[EAX].i = 0x2000;
% Reg[EBX].i = 0xa0b0c0d0;
== 0x1  # code segment
# op  ModR/M  SIB   displacement  immediate
  0b  18                                      # or *EAX with EBX
# ModR/M in binary: 00 (indirect mode) 011 (src EAX) 000 (dest EAX)
== 0x2000  # data segment
0d 0c 0b 0a  # 0x0a0b0c0d
+run: or r/m32 with EBX
+run: effective address is 0x2000 (EAX)
+run: storing 0xaabbccdd

:(before "End Single-Byte Opcodes")
case 0x0b: {  // or r/m32 with r32
  uint8_t modrm = next();
  uint8_t arg1 = (modrm>>3)&0x7;
  trace(90, "run") << "or r/m32 with " << rname(arg1) << end();
  const int32_t* arg2 = effective_address(modrm);
  BINARY_BITWISE_OP(|, Reg[arg1].u, *arg2);
  break;
}

//:: xor

:(scenario xor_r32_with_mem_at_r32)
% Reg[EAX].i = 0x2000;
% Reg[EBX].i = 0xa0b0c0d0;
== 0x1  # code segment
# op  ModR/M  SIB   displacement  immediate
  31  18                                      # xor EBX with *EAX
# ModR/M in binary: 00 (indirect mode) 011 (src EAX) 000 (dest EAX)
== 0x2000  # data segment
0d 0c bb aa  # 0xaabb0c0d
+run: xor EBX with r/m32
+run: effective address is 0x2000 (EAX)
+run: storing 0x0a0bccdd

//:

:(before "End Initialize Op Names(name)")
put(name, "33", "r32 = bitwise XOR of r32 with rm32");

:(scenario xor_mem_at_r32_with_r32)
% Reg[EAX].i = 0x2000;
% Reg[EBX].i = 0xa0b0c0d0;
== 0x1  # code segment
# op  ModR/M  SIB   displacement  immediate
  33  18                                      # xor *EAX with EBX
# ModR/M in binary: 00 (indirect mode) 011 (src EAX) 000 (dest EAX)
== 0x2000  # data segment
0d 0c 0b 0a  # 0x0a0b0c0d
+run: xor r/m32 with EBX
+run: effective address is 0x2000 (EAX)
+run: storing 0xaabbccdd

:(before "End Single-Byte Opcodes")
case 0x33: {  // xor r/m32 with r32
  uint8_t modrm = next();
  uint8_t arg1 = (modrm>>3)&0x7;
  trace(90, "run") << "xor r/m32 with " << rname(arg1) << end();
  const int32_t* arg2 = effective_address(modrm);
  BINARY_BITWISE_OP(|, Reg[arg1].u, *arg2);
  break;
}

//:: not

:(scenario not_of_mem_at_r32)
% Reg[EBX].i = 0x2000;
== 0x1  # code segment
# op  ModR/M  SIB   displacement  immediate
  f7  13                                      # negate *EBX
# ModR/M in binary: 00 (indirect mode) 010 (subop not) 011 (dest EBX)
== 0x2000  # data segment
ff 00 0f 0f  # 0x0f0f00ff
+run: operate on r/m32
+run: effective address is 0x2000 (EBX)
+run: subop: not
+run: storing 0xf0f0ff00

//:: compare (cmp)

:(scenario compare_mem_at_r32_with_r32_greater)
% Reg[EAX].i = 0x2000;
% Reg[EBX].i = 0x0a0b0c07;
== 0x1  # code segment
# op  ModR/M  SIB   displacement  immediate
  39  18                                      # compare EBX with *EAX
# ModR/M in binary: 00 (indirect mode) 011 (src EAX) 000 (dest EAX)
== 0x2000  # data segment
0d 0c 0b 0a  # 0x0a0b0c0d
+run: compare EBX with r/m32
+run: effective address is 0x2000 (EAX)
+run: SF=0; ZF=0; OF=0

:(scenario compare_mem_at_r32_with_r32_lesser)
% Reg[EAX].i = 0x2000;
% Reg[EBX].i = 0x0a0b0c0d;
== 0x1  # code segment
# op  ModR/M  SIB   displacement  immediate
  39  18                                      # compare EBX with *EAX
# ModR/M in binary: 00 (indirect mode) 011 (src EAX) 000 (dest EAX)
== 0x2000  # data segment
07 0c 0b 0a  # 0x0a0b0c0d
+run: compare EBX with r/m32
+run: effective address is 0x2000 (EAX)
+run: SF=1; ZF=0; OF=0

:(scenario compare_mem_at_r32_with_r32_equal)
% Reg[EAX].i = 0x2000;
% Reg[EBX].i = 0x0a0b0c0d;
== 0x1  # code segment
# op  ModR/M  SIB   displacement  immediate
  39  18                                      # compare EBX with *EAX
# ModR/M in binary: 00 (indirect mode) 011 (src EAX) 000 (dest EAX)
== 0x2000  # data segment
0d 0c 0b 0a  # 0x0a0b0c0d
+run: compare EBX with r/m32
+run: effective address is 0x2000 (EAX)
+run: SF=0; ZF=1; OF=0

//:

:(before "End Initialize Op Names(name)")
put(name, "3b", "compare: set SF if r32 < rm32");

:(scenario compare_r32_with_mem_at_r32_greater)
% Reg[EAX].i = 0x2000;
% Reg[EBX].i = 0x0a0b0c0d;
== 0x1  # code segment
# op  ModR/M  SIB   displacement  immediate
  3b  18                                      # compare *EAX with EBX
# ModR/M in binary: 00 (indirect mode) 011 (src EAX) 000 (dest EAX)
== 0x2000  # data segment
07 0c 0b 0a  # 0x0a0b0c0d
+run: compare r/m32 with EBX
+run: effective address is 0x2000 (EAX)
+run: SF=0; ZF=0; OF=0

:(before "End Single-Byte Opcodes")
case 0x3b: {  // set SF if r32 < r/m32
  uint8_t modrm = next();
  uint8_t reg1 = (modrm>>3)&0x7;
  trace(90, "run") << "compare r/m32 with " << rname(reg1) << end();
  int32_t arg1 = Reg[reg1].i;
  int32_t* arg2 = effective_address(modrm);
  int32_t tmp1 = arg1 - *arg2;
  SF = (tmp1 < 0);
  ZF = (tmp1 == 0);
  int64_t tmp2 = arg1 - *arg2;
  OF = (tmp1 != tmp2);
  trace(90, "run") << "SF=" << SF << "; ZF=" << ZF << "; OF=" << OF << end();
  break;
}

:(scenario compare_r32_with_mem_at_r32_lesser)
% Reg[EAX].i = 0x2000;
% Reg[EBX].i = 0x0a0b0c07;
== 0x1  # code segment
# op  ModR/M  SIB   displacement  immediate
  3b  18                                      # compare *EAX with EBX
# ModR/M in binary: 00 (indirect mode) 011 (src EAX) 000 (dest EAX)
== 0x2000  # data segment
0d 0c 0b 0a  # 0x0a0b0c0d
+run: compare r/m32 with EBX
+run: effective address is 0x2000 (EAX)
+run: SF=1; ZF=0; OF=0

:(scenario compare_r32_with_mem_at_r32_equal)
% Reg[EAX].i = 0x2000;
% Reg[EBX].i = 0x0a0b0c0d;
== 0x1  # code segment
# op  ModR/M  SIB   displacement  immediate
  3b  18                                      # compare *EAX with EBX
# ModR/M in binary: 00 (indirect mode) 011 (src EAX) 000 (dest EAX)
== 0x2000  # data segment
0d 0c 0b 0a  # 0x0a0b0c0d
+run: compare r/m32 with EBX
+run: effective address is 0x2000 (EAX)
+run: SF=0; ZF=1; OF=0

//:: copy (mov)

:(scenario copy_r32_to_mem_at_r32)
% Reg[EBX].i = 0xaf;
% Reg[EAX].i = 0x60;
== 0x1
# op  ModR/M  SIB   displacement  immediate
  89  18                                      # copy EBX to *EAX
# ModR/M in binary: 00 (indirect mode) 011 (src EAX) 000 (dest EAX)
+run: copy EBX to r/m32
+run: effective address is 0x60 (EAX)
+run: storing 0x000000af

//:

:(before "End Initialize Op Names(name)")
put(name, "8b", "copy rm32 to r32");

:(scenario copy_mem_at_r32_to_r32)
% Reg[EAX].i = 0x2000;
== 0x1  # code segment
# op  ModR/M  SIB   displacement  immediate
  8b  18                                      # copy *EAX to EBX
# ModR/M in binary: 00 (indirect mode) 011 (src EBX) 000 (dest EAX)
== 0x2000  # data segment
af 00 00 00  # 0xaf
+run: copy r/m32 to EBX
+run: effective address is 0x2000 (EAX)
+run: storing 0x000000af

:(before "End Single-Byte Opcodes")
case 0x8b: {  // copy r32 to r/m32
  uint8_t modrm = next();
  uint8_t reg1 = (modrm>>3)&0x7;
  trace(90, "run") << "copy r/m32 to " << rname(reg1) << end();
  int32_t* arg2 = effective_address(modrm);
  Reg[reg1].i = *arg2;
  trace(90, "run") << "storing 0x" << HEXWORD << *arg2 << end();
  break;
}

//:

:(before "End Initialize Op Names(name)")
put(name, "88", "copy r8 (lowermost byte of r32) to r8/m8-at-r32");

:(scenario copy_r8_to_mem_at_r32)
% Reg[EBX].i = 0x224488ab;
% Reg[EAX].i = 0x2000;
== 0x1
# op  ModR/M  SIB   displacement  immediate
  88  18                                      # copy just the lowermost byte of EBX to the byte at *EAX
# ModR/M in binary: 00 (indirect mode) 011 (src EBX) 000 (dest EAX)
== 0x2000
f0 cc bb aa  # 0xf0 with more data in following bytes
+run: copy lowermost byte of EBX to r8/m8-at-r32
+run: effective address is 0x2000 (EAX)
+run: storing 0xab
% CHECK_EQ(0xaabbccab, read_mem_u32(0x2000));

:(before "End Single-Byte Opcodes")
case 0x88: {  // copy r/m8 to r8
  uint8_t modrm = next();
  uint8_t reg2 = (modrm>>3)&0x7;
  trace(90, "run") << "copy lowermost byte of " << rname(reg2) << " to r8/m8-at-r32" << end();
  // use unsigned to zero-extend 8-bit value to 32 bits
  uint8_t* arg1 = reinterpret_cast<uint8_t*>(effective_address(modrm));
  *arg1 = Reg[reg2].u;
  trace(90, "run") << "storing 0x" << HEXBYTE << NUM(*arg1) << end();
  break;
}

//:

:(before "End Initialize Op Names(name)")
put(name, "8a", "copy r8/m8-at-r32 to r8 (lowermost byte of r32)");

:(scenario copy_mem_at_r32_to_r8)
% Reg[EBX].i = 0xaabbcc0f;  // one nibble each of lowest byte set to all 0s and all 1s, to maximize value of this test
% Reg[EAX].i = 0x2000;
== 0x1
# op  ModR/M  SIB   displacement  immediate
  8a  18                                      # copy just the byte at *EAX to lowermost byte of EBX (clearing remaining bytes)
# ModR/M in binary: 00 (indirect mode) 011 (dest EBX) 000 (src EAX)
== 0x2000  # data segment
ab ff ff ff  # 0xab with more data in following bytes
+run: copy r8/m8-at-r32 to lowermost byte of EBX
+run: effective address is 0x2000 (EAX)
+run: storing 0xab
# remaining bytes of EBX are *not* cleared
+run: EBX now contains 0xaabbccab

:(before "End Single-Byte Opcodes")
case 0x8a: {  // copy r/m8 to r8
  uint8_t modrm = next();
  uint8_t reg1 = (modrm>>3)&0x7;
  trace(90, "run") << "copy r8/m8-at-r32 to lowermost byte of " << rname(reg1) << end();
  // use unsigned to zero-extend 8-bit value to 32 bits
  uint8_t* arg2 = reinterpret_cast<uint8_t*>(effective_address(modrm));
  trace(90, "run") << "storing 0x" << HEXBYTE << NUM(*arg2) << end();
  *reinterpret_cast<uint8_t*>(&Reg[reg1].u) = *arg2;  // assumes host is little-endian
  trace(90, "run") << rname(reg1) << " now contains 0x" << HEXWORD << Reg[reg1].u << end();
  break;
}

//:: jump

:(scenario jump_mem_at_r32)
% Reg[EAX].i = 0x2000;
== 0x1  # code segment
# op  ModR/M  SIB   displacement  immediate
  ff  20                                      # jump to *EAX
# ModR/M in binary: 00 (indirect mode) 100 (jump to r/m32) 000 (src EAX)
  05                              00 00 00 01
  05                              00 00 00 02
== 0x2000  # data segment
08 00 00 00  # 8
+run: inst: 0x00000001
+run: jump to r/m32
+run: effective address is 0x2000 (EAX)
+run: jumping to 0x00000008
+run: inst: 0x00000008
-run: inst: 0x00000003

:(before "End Op ff Subops")
case 4: {  // jump to r/m32
  trace(90, "run") << "jump to r/m32" << end();
  int32_t* arg2 = effective_address(modrm);
  EIP = *arg2;
  trace(90, "run") << "jumping to 0x" << HEXWORD << EIP << end();
  break;
}

//:: push

:(scenario push_mem_at_r32)
% Reg[EAX].i = 0x2000;
% Reg[ESP].u = 0x14;
== 0x1  # code segment
# op  ModR/M  SIB   displacement  immediate
  ff  30                                      # push *EAX to stack
# ModR/M in binary: 00 (indirect mode) 110 (push r/m32) 000 (src EAX)
== 0x2000  # data segment
af 00 00 00  # 0xaf
+run: push r/m32
+run: effective address is 0x2000 (EAX)
+run: decrementing ESP to 0x00000010
+run: pushing value 0x000000af

:(before "End Op ff Subops")
case 6: {  // push r/m32 to stack
  trace(90, "run") << "push r/m32" << end();
  const int32_t* val = effective_address(modrm);
  push(*val);
  break;
}

//:: pop

:(before "End Initialize Op Names(name)")
put(name, "8f", "pop top of stack to rm32");

:(scenario pop_mem_at_r32)
% Reg[EAX].i = 0x60;
% Reg[ESP].u = 0x2000;
== 0x1  # code segment
# op  ModR/M  SIB   displacement  immediate
  8f  00                                      # pop stack into *EAX
# ModR/M in binary: 00 (indirect mode) 000 (pop r/m32) 000 (dest EAX)
== 0x2000  # data segment
30 00 00 00  # 0x30
+run: pop into r/m32
+run: effective address is 0x60 (EAX)
+run: popping value 0x00000030
+run: incrementing ESP to 0x00002004

:(before "End Single-Byte Opcodes")
case 0x8f: {  // pop stack into r/m32
  uint8_t modrm = next();
  uint8_t subop = (modrm>>3)&0x7;
  switch (subop) {
    case 0: {
      trace(90, "run") << "pop into r/m32" << end();
      int32_t* dest = effective_address(modrm);
      *dest = pop();
      break;
    }
  }
  break;
}

//:: special-case for loading address from disp32 rather than register

:(scenario add_r32_to_mem_at_displacement)
% Reg[EBX].i = 0x10;  // source
== 0x1  # code segment
# op  ModR/M  SIB   displacement  immediate
  01  1d            00 20 00 00              # add EBX to *0x2000
# ModR/M in binary: 00 (indirect mode) 011 (src EBX) 101 (dest in disp32)
== 0x2000  # data segment
01 00 00 00  # 1
+run: add EBX to r/m32
+run: effective address is 0x2000 (disp32)
+run: storing 0x00000011

:(before "End Mod 0 Special-cases(addr)")
case 5:  // exception: mod 0b00 rm 0b101 => incoming disp32
  addr = next32();
  trace(90, "run") << "effective address is 0x" << std::hex << addr << " (disp32)" << end();
  break;

//:

:(scenario add_r32_to_mem_at_r32_plus_disp8)
% Reg[EBX].i = 0x10;  // source
% Reg[EAX].i = 0x1ffe;  // dest
== 0x1  # code segment
# op  ModR/M  SIB   displacement  immediate
  01  58            02                       # add EBX to *(EAX+2)
# ModR/M in binary: 01 (indirect+disp8 mode) 011 (src EBX) 000 (dest EAX)
== 0x2000  # data segment
01 00 00 00  # 1
+run: add EBX to r/m32
+run: effective address is initially 0x1ffe (EAX)
+run: effective address is 0x2000 (after adding disp8)
+run: storing 0x00000011

:(before "End Mod Special-cases(addr)")
case 1:  // indirect + disp8 addressing
  switch (rm) {
  default:
    addr = Reg[rm].u;
    trace(90, "run") << "effective address is initially 0x" << std::hex << addr << " (" << rname(rm) << ")" << end();
    break;
  // End Mod 1 Special-cases(addr)
  }
  if (addr > 0) {
    addr += static_cast<int8_t>(next());
    trace(90, "run") << "effective address is 0x" << std::hex << addr << " (after adding disp8)" << end();
  }
  break;

:(scenario add_r32_to_mem_at_r32_plus_negative_disp8)
% Reg[EBX].i = 0x10;  // source
% Reg[EAX].i = 0x2001;  // dest
== 0x1  # code segment
# op  ModR/M  SIB   displacement  immediate
  01  58            ff                       # add EBX to *(EAX-1)
# ModR/M in binary: 01 (indirect+disp8 mode) 011 (src EBX) 000 (dest EAX)
== 0x2000  # data segment
01 00 00 00  # 1
+run: add EBX to r/m32
+run: effective address is initially 0x2001 (EAX)
+run: effective address is 0x2000 (after adding disp8)
+run: storing 0x00000011

//:

:(scenario add_r32_to_mem_at_r32_plus_disp32)
% Reg[EBX].i = 0x10;  // source
% Reg[EAX].i = 0x1ffe;  // dest
== 0x1  # code segment
# op  ModR/M  SIB   displacement  immediate
  01  98            02 00 00 00              # add EBX to *(EAX+2)
# ModR/M in binary: 10 (indirect+disp32 mode) 011 (src EBX) 000 (dest EAX)
== 0x2000  # data segment
01 00 00 00  # 1
+run: add EBX to r/m32
+run: effective address is initially 0x1ffe (EAX)
+run: effective address is 0x2000 (after adding disp32)
+run: storing 0x00000011

:(before "End Mod Special-cases(addr)")
case 2:  // indirect + disp32 addressing
  switch (rm) {
  default:
    addr = Reg[rm].u;
    trace(90, "run") << "effective address is initially 0x" << std::hex << addr << " (" << rname(rm) << ")" << end();
    break;
  // End Mod 2 Special-cases(addr)
  }
  if (addr > 0) {
    addr += next32();
    trace(90, "run") << "effective address is 0x" << std::hex << addr << " (after adding disp32)" << end();
  }
  break;

:(scenario add_r32_to_mem_at_r32_plus_negative_disp32)
% Reg[EBX].i = 0x10;  // source
% Reg[EAX].i = 0x2001;  // dest
== 0x1  # code segment
# op  ModR/M  SIB   displacement  immediate
  01  98            ff ff ff ff              # add EBX to *(EAX-1)
# ModR/M in binary: 10 (indirect+disp32 mode) 011 (src EBX) 000 (dest EAX)
== 0x2000  # data segment
01 00 00 00  # 1
+run: add EBX to r/m32
+run: effective address is initially 0x2001 (EAX)
+run: effective address is 0x2000 (after adding disp32)
+run: storing 0x00000011

//:: lea

:(before "End Initialize Op Names(name)")
put(name, "8d", "load effective address of memory in rm32 into r32");

:(scenario lea)
% Reg[EAX].u = 0x2000;
== 0x1
# op  ModR/M  SIB   displacement  immediate
  8d  18
# ModR/M in binary: 00 (indirect mode) 011 (dest EBX) 000 (src EAX)
+run: lea into EBX
+run: effective address is 0x2000 (EAX)

:(before "End Single-Byte Opcodes")
case 0x8d: {  // lea m32 to r32
  uint8_t modrm = next();
  uint8_t arg1 = (modrm>>3)&0x7;
  trace(90, "run") << "lea into " << rname(arg1) << end();
  Reg[arg1].u = effective_address_number(modrm);
  break;
}