010-sandbox-trace.mu « edit - mu - Soul of a tiny new machine. More thorough tests → More comprehensible and rewrite-friendly software → More resilient society.

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generated by cgit-pink 1.4.1-2-gfad0 (git 2.36.2.497.gbbea4dcf42) at 2024-11-20 00:44:21 +0000

o">="LineNr">148 # op ModR/M SIB displacement immediate 149 0d 0a 0b 0c 0d # or 0x0d0c0b0a with EAX 150 +run: or <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b0a with <a href='010core.cc.html#L7'>EAX</a> 151 +run: storing 0xddccbbaa 152 153 :(before "End Single-Byte Opcodes") 154 case 0x0d: { // or imm32 with EAX 155 int32_t arg2 = <a href='010core.cc.html#L219'>imm32</a>(); 156 <a href='003trace.cc.html#L160'>trace</a>(2, "run") << "or <a href='010core.cc.html#L219'>imm32</a> 0x" << <a href='010core.cc.html#L244'>HEXWORD</a> << arg2 << " with EAX" << <a href='003trace.cc.html#L184'>end</a>(); 157 <a href='010core.cc.html#L55'>BINARY_BITWISE_OP</a>(|, Reg[EAX].i, arg2); 158 break; 159 } 160 161 //: 162 163 :(scenario or_imm32_with_mem_at_r32) 164 % Reg[3].i = 0x60; 165 % SET_WORD_IN_MEM(0x60, 0xd0c0b0a0); 166 # op ModR/M SIB displacement immediate 167 81 0b 0a 0b 0c 0d # or 0x0d0c0b0a with *EBX 168 # ModR/M in binary: 00 (indirect mode) 001 (or imm32) 011 (dest EBX) 169 +run: combine <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b0a with r/m32 170 +run: effective address is 0x60 (EBX) 171 +run: subop or 172 +run: storing 0xddccbbaa 173 174 :(before "End Op 81 Subops") 175 case 1: { 176 <a href='003trace.cc.html#L160'>trace</a>(2, "run") << "subop or" << <a href='003trace.cc.html#L184'>end</a>(); 177 <a href='010core.cc.html#L55'>BINARY_BITWISE_OP</a>(|, *arg1, arg2); 178 break; 179 } 180 181 :(scenario or_imm32_with_r32) 182 % Reg[3].i = 0xd0c0b0a0; 183 # op ModR/M SIB displacement immediate 184 81 cb 0a 0b 0c 0d # or 0x0d0c0b0a with EBX 185 # ModR/M in binary: 11 (direct mode) 001 (or imm32) 011 (dest EBX) 186 +run: combine <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b0a with r/m32 187 +run: r/m32 is <a href='010core.cc.html#L10'>EBX</a> 188 +run: subop or 189 +run: storing 0xddccbbaa 190 191 //:: xor 192 193 :(scenario xor_imm32_with_eax) 194 % Reg[EAX].i = 0xddccb0a0; 195 # op ModR/M SIB displacement immediate 196 35 0a 0b 0c 0d # xor 0x0d0c0b0a with EAX 197 +run: xor <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b0a with <a href='010core.cc.html#L7'>EAX</a> 198 +run: storing 0xd0c0bbaa 199 200 :(before "End Single-Byte Opcodes") 201 case 0x35: { // xor imm32 with EAX 202 int32_t arg2 = <a href='010core.cc.html#L219'>imm32</a>(); 203 <a href='003trace.cc.html#L160'>trace</a>(2, "run") << "xor <a href='010core.cc.html#L219'>imm32</a> 0x" << <a href='010core.cc.html#L244'>HEXWORD</a> << arg2 << " with EAX" << <a href='003trace.cc.html#L184'>end</a>(); 204 <a href='010core.cc.html#L55'>BINARY_BITWISE_OP</a>(^, Reg[EAX].i, arg2); 205 break; 206 } 207 208 //: 209 210 :(scenario xor_imm32_with_mem_at_r32) 211 % Reg[3].i = 0x60; 212 % SET_WORD_IN_MEM(0x60, 0xd0c0b0a0); 213 # op ModR/M SIB displacement immediate 214 81 33 0a 0b 0c 0d # xor 0x0d0c0b0a with *EBX 215 # ModR/M in binary: 00 (indirect mode) 110 (xor imm32) 011 (dest EBX) 216 +run: combine <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b0a with r/m32 217 +run: effective address is 0x60 (EBX) 218 +run: subop xor 219 +run: storing 0xddccbbaa 220 221 :(before "End Op 81 Subops") 222 case 6: { 223 <a href='003trace.cc.html#L160'>trace</a>(2, "run") << "subop xor" << <a href='003trace.cc.html#L184'>end</a>(); 224 <a href='010core.cc.html#L55'>BINARY_BITWISE_OP</a>(^, *arg1, arg2); 225 break; 226 } 227 228 :(scenario xor_imm32_with_r32) 229 % Reg[3].i = 0xd0c0b0a0; 230 # op ModR/M SIB displacement immediate 231 81 f3 0a 0b 0c 0d # xor 0x0d0c0b0a with EBX 232 # ModR/M in binary: 11 (direct mode) 110 (xor imm32) 011 (dest EBX) 233 +run: combine <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b0a with r/m32 234 +run: r/m32 is <a href='010core.cc.html#L10'>EBX</a> 235 +run: subop xor 236 +run: storing 0xddccbbaa 237 238 //:: compare (cmp) 239 240 :(scenario compare_imm32_with_eax_greater) 241 % Reg[0].i = 0x0d0c0b0a; 242 # op ModR/M SIB displacement immediate 243 3d 07 0b 0c 0d # compare 0x0d0c0b07 with EAX 244 +run: compare <a href='010core.cc.html#L7'>EAX</a> and <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b07 245 +run: SF=0; ZF=0; OF=0 246 247 :(before "End Single-Byte Opcodes") 248 case 0x3d: { // subtract imm32 from EAX 249 int32_t arg1 = Reg[EAX].i; 250 int32_t arg2 = <a href='010core.cc.html#L219'>imm32</a>(); 251 <a href='003trace.cc.html#L160'>trace</a>(2, "run") << "compare <a href='010core.cc.html#L7'>EAX</a> and <a href='010core.cc.html#L219'>imm32</a> 0x" << <a href='010core.cc.html#L244'>HEXWORD</a> << arg2 << <a href='003trace.cc.html#L184'>end</a>(); 252 int32_t tmp1 = arg1 - arg2; 253 SF = (tmp1 < 0); 254 ZF = (tmp1 == 0); 255 int64_t tmp2 = arg1 - arg2; 256 <a href='010core.cc.html#L33'>OF</a> = (tmp1 != tmp2); 257 <a href='003trace.cc.html#L160'>trace</a>(2, "run") << "SF=" << SF << "; ZF=" << ZF << "; OF=" << <a href='010core.cc.html#L33'>OF</a> << <a href='003trace.cc.html#L184'>end</a>(); 258 break; 259 } 260 261 :(scenario compare_imm32_with_eax_lesser) 262 % Reg[0].i = 0x0d0c0b07; 263 # op ModR/M SIB displacement immediate 264 3d 0a 0b 0c 0d # compare 0x0d0c0b0a with EAX 265 +run: compare <a href='010core.cc.html#L7'>EAX</a> and <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b0a 266 +run: SF=1; ZF=0; OF=0 267 268 :(scenario compare_imm32_with_eax_equal) 269 % Reg[0].i = 0x0d0c0b0a; 270 # op ModR/M SIB displacement immediate 271 3d 0a 0b 0c 0d # compare 0x0d0c0b0a with EAX 272 +run: compare <a href='010core.cc.html#L7'>EAX</a> and <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b0a 273 +run: SF=0; ZF=1; OF=0 274 275 //: 276 277 :(scenario compare_imm32_with_r32_greater) 278 % Reg[3].i = 0x0d0c0b0a; 279 # op ModR/M SIB displacement immediate 280 81 fb 07 0b 0c 0d # compare 0x0d0c0b07 with EBX 281 # ModR/M in binary: 11 (direct mode) 111 (compare imm32) 011 (dest EBX) 282 +run: combine <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b07 with r/m32 283 +run: r/m32 is <a href='010core.cc.html#L10'>EBX</a> 284 +run: SF=0; ZF=0; OF=0 285 286 :(before "End Op 81 Subops") 287 case 7: { 288 <a href='003trace.cc.html#L160'>trace</a>(2, "run") << "subop compare" << <a href='003trace.cc.html#L184'>end</a>(); 289 int32_t tmp1 = *arg1 - arg2; 290 SF = (tmp1 < 0); 291 ZF = (tmp1 == 0); 292 int64_t tmp2 = *arg1 - arg2; 293 <a href='010core.cc.html#L33'>OF</a> = (tmp1 != tmp2); 294 <a href='003trace.cc.html#L160'>trace</a>(2, "run") << "SF=" << SF << "; ZF=" << ZF << "; OF=" << <a href='010core.cc.html#L33'>OF</a> << <a href='003trace.cc.html#L184'>end</a>(); 295 break; 296 } 297 298 :(scenario compare_imm32_with_r32_lesser) 299 % Reg[3].i = 0x0d0c0b07; 300 # op ModR/M SIB displacement immediate 301 81 fb 0a 0b 0c 0d # compare 0x0d0c0b0a with EBX 302 # ModR/M in binary: 11 (direct mode) 111 (compare imm32) 011 (dest EBX) 303 +run: combine <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b0a with r/m32 304 +run: r/m32 is <a href='010core.cc.html#L10'>EBX</a> 305 +run: SF=1; ZF=0; OF=0 306 307 :(scenario compare_imm32_with_r32_equal) 308 % Reg[3].i = 0x0d0c0b0a; 309 # op ModR/M SIB displacement immediate 310 81 fb 0a 0b 0c 0d # compare 0x0d0c0b0a with EBX 311 # ModR/M in binary: 11 (direct mode) 111 (compare imm32) 011 (dest EBX) 312 +run: combine <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b0a with r/m32 313 +run: r/m32 is <a href='010core.cc.html#L10'>EBX</a> 314 +run: SF=0; ZF=1; OF=0 315 316 :(scenario compare_imm32_with_mem_at_r32_greater) 317 % Reg[3].i = 0x60; 318 % SET_WORD_IN_MEM(0x60, 0x0d0c0b0a); 319 # op ModR/M SIB displacement immediate 320 81 3b 07 0b 0c 0d # compare 0x0d0c0b07 with *EBX 321 # ModR/M in binary: 00 (indirect mode) 111 (compare imm32) 011 (dest EBX) 322 +run: combine <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b07 with r/m32 323 +run: effective address is 0x60 (EBX) 324 +run: SF=0; ZF=0; OF=0 325 326 :(scenario compare_imm32_with_mem_at_r32_lesser) 327 % Reg[3].i = 0x60; 328 % SET_WORD_IN_MEM(0x60, 0x0d0c0b07); 329 # op ModR/M SIB displacement immediate 330 81 3b 0a 0b 0c 0d # compare 0x0d0c0b0a with *EBX 331 # ModR/M in binary: 00 (indirect mode) 111 (compare imm32) 011 (dest EBX) 332 +run: combine <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b0a with r/m32 333 +run: effective address is 0x60 (EBX) 334 +run: SF=1; ZF=0; OF=0 335 336 :(scenario compare_imm32_with_mem_at_r32_equal) 337 % Reg[3].i = 0x0d0c0b0a; 338 % Reg[3].i = 0x60; 339 % SET_WORD_IN_MEM(0x60, 0x0d0c0b0a); 340 # op ModR/M SIB displacement immediate 341 81 3b 0a 0b 0c 0d # compare 0x0d0c0b0a with *EBX 342 # ModR/M in binary: 00 (indirect mode) 111 (compare imm32) 011 (dest EBX) 343 +run: combine <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b0a with r/m32 344 +run: effective address is 0x60 (EBX) 345 +run: SF=0; ZF=1; OF=0 346 347 //:: copy (mov) 348 349 :(scenario copy_imm32_to_r32) 350 # op ModR/M SIB displacement immediate 351 bb 0a 0b 0c 0d # copy 0x0d0c0b0a to EBX 352 +run: copy <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b0a to <a href='010core.cc.html#L10'>EBX</a> 353 354 :(before "End Single-Byte Opcodes") 355 case 0xb8: 356 case 0xb9: 357 case 0xba: 358 case 0xbb: 359 case 0xbc: 360 case 0xbd: 361 case 0xbe: 362 case 0xbf: { // copy imm32 to r32 363 uint8_t reg1 = op & 0x7; 364 int32_t arg2 = <a href='010core.cc.html#L219'>imm32</a>(); 365 <a href='003trace.cc.html#L160'>trace</a>(2, "run") << "copy <a href='010core.cc.html#L219'>imm32</a> 0x" << <a href='010core.cc.html#L244'>HEXWORD</a> << arg2 << " to " << <a href='010core.cc.html#L227'>rname</a>(reg1) << <a href='003trace.cc.html#L184'>end</a>(); 366 Reg[reg1].i = arg2; 367 break; 368 } 369 370 //: 371 372 :(scenario copy_imm32_to_mem_at_r32) 373 % Reg[3].i = 0x60; 374 # op ModR/M SIB displacement immediate 375 c7 03 0a 0b 0c 0d # copy 0x0d0c0b0a to *EBX 376 # ModR/M in binary: 00 (indirect mode) 000 (unused) 011 (dest EBX) 377 +run: copy <a href='010core.cc.html#L219'>imm32</a> 0x0d0c0b0a to r/m32 378 +run: effective address is 0x60 (EBX) 379 380 :(before "End Single-Byte Opcodes") 381 case 0xc7: { // copy imm32 to r32 382 uint8_t modrm = <a href='010core.cc.html#L214'>next</a>(); 383 int32_t arg2 = <a href='010core.cc.html#L219'>imm32</a>(); 384 <a href='003trace.cc.html#L160'>trace</a>(2, "run") << "copy <a href='010core.cc.html#L219'>imm32</a> 0x" << <a href='010core.cc.html#L244'>HEXWORD</a> << arg2 << " to r/m32" << <a href='003trace.cc.html#L184'>end</a>(); 385 int32_t* arg1 = <a href='011direct_addressing.cc.html#L27'>effective_address</a>(modrm); 386 *arg1 = arg2; 387 break; 388 } 389 390 //:: push 391 392 :(scenario push_imm32) 393 % Reg[ESP].u = 0x14; 394 # op ModR/M SIB displacement immediate 395 68 af 00 00 00 # push *EAX to stack 396 +run: <a href='011direct_addressing.cc.html#L283'>push</a> <a href='010core.cc.html#L219'>imm32</a> 0x000000af 397 +run: <a href='010core.cc.html#L11'>ESP</a> is now 0x00000010 398 +run: <a href='003trace.cc.html#L74'>contents</a> at <a href='010core.cc.html#L11'>ESP</a>: 0x000000af 399 400 :(before "End Single-Byte Opcodes") 401 case 0x68: { 402 int32_t val = <a href='010core.cc.html#L219'>imm32</a>(); 403 <a href='003trace.cc.html#L160'>trace</a>(2, "run") << "push <a href='010core.cc.html#L219'>imm32</a> 0x" << <a href='010core.cc.html#L244'>HEXWORD</a> << val << <a href='003trace.cc.html#L184'>end</a>(); 404 Reg[ESP].u -= 4; 405 *reinterpret_cast<uint32_t*>(&Mem.at(Reg[ESP].u)) = val; 406 <a href='003trace.cc.html#L160'>trace</a>(2, "run") << "ESP is now 0x" << <a href='010core.cc.html#L244'>HEXWORD</a> << Reg[ESP].u << <a href='003trace.cc.html#L184'>end</a>(); 407 <a href='003trace.cc.html#L160'>trace</a>(2, "run") << "contents at <a href='010core.cc.html#L11'>ESP</a>: 0x" << <a href='010core.cc.html#L244'>HEXWORD</a> << *reinterpret_cast<uint32_t*>(&Mem.at(Reg[ESP].u)) << <a href='003trace.cc.html#L184'>end</a>(); 408 break; 409 } </pre> </body> </html>