diff options
author | Kartik Agaram <vc@akkartik.com> | 2019-07-27 16:01:55 -0700 |
---|---|---|
committer | Kartik Agaram <vc@akkartik.com> | 2019-07-27 17:47:59 -0700 |
commit | 6e1eeeebfb453fa7c871869c19375ce60fbd7413 (patch) | |
tree | 539c4a3fdf1756ae79770d5c4aaf6366f1d1525e /018jump_disp32.cc | |
parent | 8846a7f85cc04b77b2fe8a67b6d317723437b00c (diff) | |
download | mu-6e1eeeebfb453fa7c871869c19375ce60fbd7413.tar.gz |
5485 - promote SubX to top-level
Diffstat (limited to '018jump_disp32.cc')
-rw-r--r-- | 018jump_disp32.cc | 407 |
1 files changed, 407 insertions, 0 deletions
diff --git a/018jump_disp32.cc b/018jump_disp32.cc new file mode 100644 index 00000000..86e06e9f --- /dev/null +++ b/018jump_disp32.cc @@ -0,0 +1,407 @@ +//: jump to 32-bit offset + +//:: jump + +:(before "End Initialize Op Names") +put_new(Name, "e9", "jump disp32 bytes away (jmp)"); + +:(code) +void test_jump_disp32() { + run( + "== code 0x1\n" + // op ModR/M SIB displacement immediate + " e9 05 00 00 00 \n" // skip 1 instruction + " 05 00 00 00 01 \n" + " 05 00 00 00 02 \n" + ); + CHECK_TRACE_CONTENTS( + "run: 0x00000001 opcode: e9\n" + "run: jump 5\n" + "run: 0x0000000b opcode: 05\n" + ); + CHECK_TRACE_DOESNT_CONTAIN("run: 0x00000006 opcode: 05"); +} + +:(before "End Single-Byte Opcodes") +case 0xe9: { // jump disp32 + const int32_t offset = next32(); + trace(Callstack_depth+1, "run") << "jump " << offset << end(); + EIP += offset; + break; +} + +//:: jump if equal/zero + +:(before "End Initialize Op Names") +put_new(Name_0f, "84", "jump disp32 bytes away if equal, if ZF is set (jcc/jz/je)"); + +:(code) +void test_je_disp32_success() { + ZF = true; + run( + "== code 0x1\n" + // op ModR/M SIB displacement immediate + " 0f 84 05 00 00 00 \n" // skip 1 instruction + " 05 00 00 00 01 \n" + " 05 00 00 00 02 \n" + ); + CHECK_TRACE_CONTENTS( + "run: 0x00000001 opcode: 0f\n" + "run: jump 5\n" + "run: 0x0000000c opcode: 05\n" + ); + CHECK_TRACE_DOESNT_CONTAIN("run: 0x00000007 opcode: 05"); +} + +:(before "End Two-Byte Opcodes Starting With 0f") +case 0x84: { // jump disp32 if ZF + const int32_t offset = next32(); + if (ZF) { + trace(Callstack_depth+1, "run") << "jump " << offset << end(); + EIP += offset; + } + break; +} + +:(code) +void test_je_disp32_fail() { + ZF = false; + run( + "== code 0x1\n" + // op ModR/M SIB displacement immediate + " 0f 84 05 00 00 00 \n" // skip 1 instruction + " 05 00 00 00 01 \n" + " 05 00 00 00 02 \n" + ); + CHECK_TRACE_CONTENTS( + "run: 0x00000001 opcode: 0f\n" + "run: 0x00000007 opcode: 05\n" + "run: 0x0000000c opcode: 05\n" + ); + CHECK_TRACE_DOESNT_CONTAIN("run: jump 5"); +} + +//:: jump if not equal/not zero + +:(before "End Initialize Op Names") +put_new(Name_0f, "85", "jump disp32 bytes away if not equal, if ZF is not set (jcc/jnz/jne)"); + +:(code) +void test_jne_disp32_success() { + ZF = false; + run( + "== code 0x1\n" + // op ModR/M SIB displacement immediate + " 0f 85 05 00 00 00 \n" // skip 1 instruction + " 05 00 00 00 01 \n" + " 05 00 00 00 02 \n" + ); + CHECK_TRACE_CONTENTS( + "run: 0x00000001 opcode: 0f\n" + "run: jump 5\n" + "run: 0x0000000c opcode: 05\n" + ); + CHECK_TRACE_DOESNT_CONTAIN("run: 0x00000007 opcode: 05"); +} + +:(before "End Two-Byte Opcodes Starting With 0f") +case 0x85: { // jump disp32 unless ZF + const int32_t offset = next32(); + if (!ZF) { + trace(Callstack_depth+1, "run") << "jump " << offset << end(); + EIP += offset; + } + break; +} + +:(code) +void test_jne_disp32_fail() { + ZF = true; + run( + "== code 0x1\n" + // op ModR/M SIB displacement immediate + " 0f 85 05 00 00 00 \n" // skip 1 instruction + " 05 00 00 00 01 \n" + " 05 00 00 00 02 \n" + ); + CHECK_TRACE_CONTENTS( + "run: 0x00000001 opcode: 0f\n" + "run: 0x00000007 opcode: 05\n" + "run: 0x0000000c opcode: 05\n" + ); + CHECK_TRACE_DOESNT_CONTAIN("run: jump 5"); +} + +//:: jump if greater + +:(before "End Initialize Op Names") +put_new(Name_0f, "8f", "jump disp32 bytes away if greater (signed), if ZF is unset and SF == OF (jcc/jg/jnle)"); +put_new(Name_0f, "87", "jump disp32 bytes away if greater (unsigned), if ZF is unset and CF is unset (jcc/ja/jnbe)"); + +:(code) +void test_jg_disp32_success() { + ZF = false; + SF = false; + OF = false; + run( + "== code 0x1\n" + // op ModR/M SIB displacement immediate + " 0f 8f 05 00 00 00 \n" // skip 1 instruction + " 05 00 00 00 01 \n" + " 05 00 00 00 02 \n" + ); + CHECK_TRACE_CONTENTS( + "run: 0x00000001 opcode: 0f\n" + "run: jump 5\n" + "run: 0x0000000c opcode: 05\n" + ); + CHECK_TRACE_DOESNT_CONTAIN("run: 0x00000007 opcode: 05"); +} + +:(before "End Two-Byte Opcodes Starting With 0f") +case 0x8f: { // jump disp32 if !SF and !ZF + const int32_t offset = next32(); + if (!ZF && SF == OF) { + trace(Callstack_depth+1, "run") << "jump " << offset << end(); + EIP += offset; + } + break; +} +case 0x87: { // jump disp32 if !CF and !ZF + const int32_t offset = next(); + if (!CF && !ZF) { + trace(Callstack_depth+1, "run") << "jump " << offset << end(); + EIP += offset; + } + break; +} + +:(code) +void test_jg_disp32_fail() { + ZF = false; + SF = true; + OF = false; + run( + "== code 0x1\n" + // op ModR/M SIB displacement immediate + " 0f 8f 05 00 00 00 \n" // skip 1 instruction + " 05 00 00 00 01 \n" + " 05 00 00 00 02 \n" + ); + CHECK_TRACE_CONTENTS( + "run: 0x00000001 opcode: 0f\n" + "run: 0x00000007 opcode: 05\n" + "run: 0x0000000c opcode: 05\n" + ); + CHECK_TRACE_DOESNT_CONTAIN("run: jump 5"); +} + +//:: jump if greater or equal + +:(before "End Initialize Op Names") +put_new(Name_0f, "8d", "jump disp32 bytes away if greater or equal (signed), if SF == OF (jcc/jge/jnl)"); +put_new(Name_0f, "83", "jump disp32 bytes away if greater or equal (unsigned), if CF is unset (jcc/jae/jnb)"); + +:(code) +void test_jge_disp32_success() { + SF = false; + OF = false; + run( + "== code 0x1\n" + // op ModR/M SIB displacement immediate + " 0f 8d 05 00 00 00 \n" // skip 1 instruction + " 05 00 00 00 01 \n" + " 05 00 00 00 02 \n" + ); + CHECK_TRACE_CONTENTS( + "run: 0x00000001 opcode: 0f\n" + "run: jump 5\n" + "run: 0x0000000c opcode: 05\n" + ); + CHECK_TRACE_DOESNT_CONTAIN("run: 0x00000007 opcode: 05"); +} + +:(before "End Two-Byte Opcodes Starting With 0f") +case 0x8d: { // jump disp32 if !SF + const int32_t offset = next32(); + if (SF == OF) { + trace(Callstack_depth+1, "run") << "jump " << offset << end(); + EIP += offset; + } + break; +} +case 0x83: { // jump disp32 if !CF + const int32_t offset = next32(); + if (!CF) { + trace(Callstack_depth+1, "run") << "jump " << offset << end(); + EIP += offset; + } + break; +} + +:(code) +void test_jge_disp32_fail() { + SF = true; + OF = false; + run( + "== code 0x1\n" + // op ModR/M SIB displacement immediate + " 0f 8d 05 00 00 00 \n" // skip 1 instruction + " 05 00 00 00 01 \n" + " 05 00 00 00 02 \n" + ); + CHECK_TRACE_CONTENTS( + "run: 0x00000001 opcode: 0f\n" + "run: 0x00000007 opcode: 05\n" + "run: 0x0000000c opcode: 05\n" + ); + CHECK_TRACE_DOESNT_CONTAIN("run: jump 5"); +} + +//:: jump if lesser + +:(before "End Initialize Op Names") +put_new(Name_0f, "8c", "jump disp32 bytes away if lesser (signed), if SF != OF (jcc/jl/jnge)"); +put_new(Name_0f, "82", "jump disp32 bytes away if lesser (unsigned), if CF is set (jcc/jb/jnae)"); + +:(code) +void test_jl_disp32_success() { + ZF = false; + SF = true; + OF = false; + run( + "== code 0x1\n" + // op ModR/M SIB displacement immediate + " 0f 8c 05 00 00 00 \n" // skip 1 instruction + " 05 00 00 00 01 \n" + " 05 00 00 00 02 \n" + ); + CHECK_TRACE_CONTENTS( + "run: 0x00000001 opcode: 0f\n" + "run: jump 5\n" + "run: 0x0000000c opcode: 05\n" + ); + CHECK_TRACE_DOESNT_CONTAIN("run: 0x00000007 opcode: 05"); +} + +:(before "End Two-Byte Opcodes Starting With 0f") +case 0x8c: { // jump disp32 if SF and !ZF + const int32_t offset = next32(); + if (SF != OF) { + trace(Callstack_depth+1, "run") << "jump " << offset << end(); + EIP += offset; + } + break; +} +case 0x72: { // jump disp32 if CF + const int32_t offset = next32(); + if (CF) { + trace(Callstack_depth+1, "run") << "jump " << offset << end(); + EIP += offset; + } + break; +} + +:(code) +void test_jl_disp32_fail() { + ZF = false; + SF = false; + OF = false; + run( + "== code 0x1\n" + // op ModR/M SIB displacement immediate + " 0f 8c 05 00 00 00 \n" // skip 1 instruction + " 05 00 00 00 01 \n" + " 05 00 00 00 02 \n" + ); + CHECK_TRACE_CONTENTS( + "run: 0x00000001 opcode: 0f\n" + "run: 0x00000007 opcode: 05\n" + "run: 0x0000000c opcode: 05\n" + ); + CHECK_TRACE_DOESNT_CONTAIN("run: jump 5"); +} + +//:: jump if lesser or equal + +:(before "End Initialize Op Names") +put_new(Name_0f, "8e", "jump disp32 bytes away if lesser or equal (signed), if ZF is set or SF != OF (jcc/jle/jng)"); +put_new(Name_0f, "86", "jump disp8 bytes away if lesser or equal (unsigned), if ZF is set or CF is set (jcc/jbe/jna)"); + +:(code) +void test_jle_disp32_equal() { + ZF = true; + SF = false; + OF = false; + run( + "== code 0x1\n" + // op ModR/M SIB displacement immediate + " 0f 8e 05 00 00 00 \n" // skip 1 instruction + " 05 00 00 00 01 \n" + " 05 00 00 00 02 \n" + ); + CHECK_TRACE_CONTENTS( + "run: 0x00000001 opcode: 0f\n" + "run: jump 5\n" + "run: 0x0000000c opcode: 05\n" + ); + CHECK_TRACE_DOESNT_CONTAIN("run: 0x00000007 opcode: 05"); +} + +:(code) +void test_jle_disp32_lesser() { + ZF = false; + SF = true; + OF = false; + run( + "== code 0x1\n" + // op ModR/M SIB displacement immediate + " 0f 8e 05 00 00 00 \n" // skip 1 instruction + " 05 00 00 00 01 \n" + " 05 00 00 00 02 \n" + ); + CHECK_TRACE_CONTENTS( + "run: 0x00000001 opcode: 0f\n" + "run: jump 5\n" + "run: 0x0000000c opcode: 05\n" + ); + CHECK_TRACE_DOESNT_CONTAIN("run: 0x00000007 opcode: 05"); +} + +:(before "End Two-Byte Opcodes Starting With 0f") +case 0x8e: { // jump disp32 if SF or ZF + const int32_t offset = next32(); + if (ZF || SF != OF) { + trace(Callstack_depth+1, "run") << "jump " << offset << end(); + EIP += offset; + } + break; +} +case 0x86: { // jump disp32 if ZF or CF + const int32_t offset = next32(); + if (ZF || CF) { + trace(Callstack_depth+1, "run") << "jump " << offset << end(); + EIP += offset; + } + break; +} + +:(code) +void test_jle_disp32_greater() { + ZF = false; + SF = false; + OF = false; + run( + "== code 0x1\n" + // op ModR/M SIB displacement immediate + " 0f 8e 05 00 00 00 \n" // skip 1 instruction + " 05 00 00 00 01 \n" + " 05 00 00 00 02 \n" + ); + CHECK_TRACE_CONTENTS( + "run: 0x00000001 opcode: 0f\n" + "run: 0x00000007 opcode: 05\n" + "run: 0x0000000c opcode: 05\n" + ); + CHECK_TRACE_DOESNT_CONTAIN("run: jump 5"); +} |