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| author | Kartik Agaram <vc@akkartik.com> | 2020-03-06 18:31:14 -0800 |
|---|---|---|
| committer | Kartik Agaram <vc@akkartik.com> | 2020-03-06 18:34:27 -0800 |
| commit | 8f256f1f2ee6a2a49816dd23d26cd120f526bf0b (patch) | |
| tree | 314294998b527980cdf85ecb51386642bfbe3af4 /033check_operands.cc | |
| parent | 4c19dd3968d2ce733073774867d97cc96b4277e6 (diff) | |
| download | mu-8f256f1f2ee6a2a49816dd23d26cd120f526bf0b.tar.gz | |
6090 - new instruction: multiply by immediate
This is a 3-operand instruction: r32 = rm32 * imm32 It looks like https://c9x.me/x86/html/file_module_x86_id_138.html has a bug, implying the same opcode supports a 2-operand version. I don't see that in the Intel manual pdf, or at alternative sites like https://www.felixcloutier.com/x86/imul Native runs seem to validate my understanding. In the process I also fixed a bug in the existing multiply instruction 0f af: the only flags it sets are OF and CF. The other existing multiply instruction f7 was doing things right.
Diffstat (limited to '033check_operands.cc')
| -rw-r--r-- | 033check_operands.cc | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/033check_operands.cc b/033check_operands.cc index 04492986..28a7458e 100644 --- a/033check_operands.cc +++ b/033check_operands.cc @@ -246,6 +246,11 @@ void init_permitted_operands() { put(Permitted_operands, "81", 0x43); // combine put(Permitted_operands, "c7", 0x43); // copy + //// Class Q: op, ModR/M and imm32 + // imm32 imm8 disp32 |disp16 disp8 subop modrm + // 1 0 0 |0 0 0 1 + put(Permitted_operands, "69", 0x41); // multiply + // End Init Permitted Operands } |