support 'fake' handles allocated statically

Mystery solved of why the syntax sugar phases don't work even though they
don't use any functions whose signatures changed in the migration to handles.

The answer: they use the Registers table, and it needs to use handles rather
than raw strings.

12 files changed, 102 insertions, 30 deletions

diff --git a/069allocate.subx b/069allocate.subx
index 587e4bf7..6da9fb81 100644
--- a/069allocate.subx
+++ b/069allocate.subx
@@ -33,7 +33,7 @@ Heap-size:  # int
   0x400000/imm32/4MB
 
 Next-alloc-id:  # int
-  0x80000000/imm32
+  0x100/imm32  # save a few alloc ids for fake handles
 
 == code
 #   instruction                     effective address                                                   register    displacement    immediate
@@ -245,7 +245,7 @@ test-allocate-raw-success:
     # . . discard args
     81          0/subop/add         3/mod/direct    4/rm32/esp    .           .             .           .           .               0xc/imm32         # add to esp
     # clean up
-    c7          0/subop/copy        0/mod/indirect  5/rm32/.disp32            .             .           .           Next-alloc-id/disp32  1/imm32     # copy to *Next-alloc-id
+    c7          0/subop/copy        0/mod/indirect  5/rm32/.disp32            .             .           .           Next-alloc-id/disp32  0x100/imm32 # copy to *Next-alloc-id
     # . epilogue
     89/copy                         3/mod/direct    4/rm32/esp    .           .             .           5/r32/ebp   .               .                 # copy ebp to esp
     5d/pop-to-ebp
@@ -340,8 +340,7 @@ test-lookup-success:
     # . . discard args
     81          0/subop/add         3/mod/direct    4/rm32/esp    .           .             .           .           .               0xc/imm32         # add to esp
     # clean up
-    # . *Next-alloc-id = 1
-    c7          0/subop/copy        0/mod/indirect  5/rm32/.disp32            .             .           .     Next-alloc-id/disp32  1/imm32           # copy to *Next-alloc-id
+    c7          0/subop/copy        0/mod/indirect  5/rm32/.disp32            .             .           .           Next-alloc-id/disp32  0x100/imm32 # copy to *Next-alloc-id
     # . restore registers
     5a/pop-to-edx
     59/pop-to-ecx
@@ -417,8 +416,7 @@ _pending-test-lookup-failure:
     # . . discard args
     81          0/subop/add         3/mod/direct    4/rm32/esp    .           .             .           .           .               8/imm32           # add to esp
     # clean up
-    # . *Next-alloc-id = 1
-    c7          0/subop/copy        0/mod/indirect  5/rm32/.disp32            .             .           .     Next-alloc-id/disp32  1/imm32           # copy to *Next-alloc-id
+    c7          0/subop/copy        0/mod/indirect  5/rm32/.disp32            .             .           .           Next-alloc-id/disp32  0x100/imm32 # copy to *Next-alloc-id
     # . epilogue
     89/copy                         3/mod/direct    4/rm32/esp    .           .             .           5/r32/ebp   .               .                 # copy ebp to esp
     5d/pop-to-ebp
diff --git a/090register-names.subx b/090register-names.subx
index db2c1e6a..ab1dfcb1 100644
--- a/090register-names.subx
+++ b/090register-names.subx
@@ -1,31 +1,105 @@
-# This data structure uses pointers. Since Mu requires pointers in data to be
-# handles, we need to create some fake alloc ids.
-#
-# Fake alloc ids used in this file:
-#   "HAND" = 0x48414e44
-
 == data
-Registers:  # (table string int)
+Registers:  # (addr stream {(handle array byte), int})
   # a table is a stream
   0xc0/imm32/write
   0/imm32/read
   0xc0/imm32/length
   # data
-  0x48414e44/imm32 "HANDeax"/imm32  0/imm32
-  0x48414e44/imm32 "HANDecx"/imm32  1/imm32
-  0x48414e44/imm32 "HANDedx"/imm32  2/imm32
-  0x48414e44/imm32 "HANDebx"/imm32  3/imm32
-  0x48414e44/imm32 "HANDesp"/imm32  4/imm32
-  0x48414e44/imm32 "HANDebp"/imm32  5/imm32
-  0x48414e44/imm32 "HANDesi"/imm32  6/imm32
-  0x48414e44/imm32 "HANDedi"/imm32  7/imm32
+  0x11/imm32/alloc-id $Register-eax/imm32 0/imm32
+  0x11/imm32/alloc-id $Register-ecx/imm32 1/imm32
+  0x11/imm32/alloc-id $Register-edx/imm32 2/imm32
+  0x11/imm32/alloc-id $Register-ebx/imm32 3/imm32
+  0x11/imm32/alloc-id $Register-esp/imm32 4/imm32
+  0x11/imm32/alloc-id $Register-ebp/imm32 5/imm32
+  0x11/imm32/alloc-id $Register-esi/imm32 6/imm32
+  0x11/imm32/alloc-id $Register-edi/imm32 7/imm32
   # for 8-byte registers
   # we don't actually check if these are used when they should be; be careful
-  0x48414e44/imm32 "HANDal"/imm32   0/imm32
-  0x48414e44/imm32 "HANDcl"/imm32   1/imm32
-  0x48414e44/imm32 "HANDdl"/imm32   2/imm32
-  0x48414e44/imm32 "HANDbl"/imm32   3/imm32
-  0x48414e44/imm32 "HANDah"/imm32   4/imm32
-  0x48414e44/imm32 "HANDch"/imm32   5/imm32
-  0x48414e44/imm32 "HANDdh"/imm32   6/imm32
-  0x48414e44/imm32 "HANDbh"/imm32   7/imm32
+  0x11/imm32/alloc-id $Register-al/imm32 0/imm32
+  0x11/imm32/alloc-id $Register-cl/imm32 1/imm32
+  0x11/imm32/alloc-id $Register-dl/imm32 2/imm32
+  0x11/imm32/alloc-id $Register-bl/imm32 3/imm32
+  0x11/imm32/alloc-id $Register-ah/imm32 4/imm32
+  0x11/imm32/alloc-id $Register-ch/imm32 5/imm32
+  0x11/imm32/alloc-id $Register-dh/imm32 6/imm32
+  0x11/imm32/alloc-id $Register-bh/imm32 7/imm32
+
+$Register-eax:
+  0x11/imm32/alloc-id
+  3/imm32/size
+  0x65/e 0x61/a 0x78/x
+
+$Register-ecx:
+  0x11/imm32/alloc-id
+  3/imm32/size
+  0x65/e 0x63/c 0x78/x
+
+$Register-edx:
+  0x11/imm32/alloc-id
+  3/imm32/size
+  0x65/e 0x64/d 0x78/x
+
+$Register-ebx:
+  0x11/imm32/alloc-id
+  3/imm32/size
+  0x65/e 0x62/b 0x78/x
+
+$Register-esp:
+  0x11/imm32/alloc-id
+  3/imm32/size
+  0x65/e 0x73/s 0x70/p
+
+$Register-ebp:
+  0x11/imm32/alloc-id
+  3/imm32/size
+  0x65/e 0x62/b 0x70/p
+
+$Register-esi:
+  0x11/imm32/alloc-id
+  3/imm32/size
+  0x65/e 0x73/s 0x69/i
+
+$Register-edi:
+  0x11/imm32/alloc-id
+  3/imm32/size
+  0x65/e 0x64/d 0x69/i
+
+$Register-al:
+  0x11/imm32/alloc-id
+  2/imm32/size
+  0x61/a 0x6c/l
+
+$Register-cl:
+  0x11/imm32/alloc-id
+  2/imm32/size
+  0x63/c 0x6c/l
+
+$Register-dl:
+  0x11/imm32/alloc-id
+  2/imm32/size
+  0x64/d 0x6c/l
+
+$Register-bl:
+  0x11/imm32/alloc-id
+  2/imm32/size
+  0x62/b 0x6c/l
+
+$Register-ah:
+  0x11/imm32/alloc-id
+  2/imm32/size
+  0x61/a 0x68/h
+
+$Register-ch:
+  0x11/imm32/alloc-id
+  2/imm32/size
+  0x63/c 0x68/h
+
+$Register-dh:
+  0x11/imm32/alloc-id
+  2/imm32/size
+  0x64/d 0x68/h
+
+$Register-bh:
+  0x11/imm32/alloc-id
+  2/imm32/size
+  0x62/b 0x68/h
diff --git a/apps/assort b/apps/assort
index 0f20ee49..7bd69ebf 100755
--- a/apps/assort
+++ b/apps/assort
Binary files differdiff --git a/apps/crenshaw2-1 b/apps/crenshaw2-1
index 555e1b27..8d362a1e 100755
--- a/apps/crenshaw2-1
+++ b/apps/crenshaw2-1
Binary files differdiff --git a/apps/crenshaw2-1b b/apps/crenshaw2-1b
index a173aeec..3d700cc6 100755
--- a/apps/crenshaw2-1b
+++ b/apps/crenshaw2-1b
Binary files differdiff --git a/apps/dquotes b/apps/dquotes
index aa4ab28f..9ee4a375 100755
--- a/apps/dquotes
+++ b/apps/dquotes
Binary files differdiff --git a/apps/factorial b/apps/factorial
index c9d75a9f..6e240627 100755
--- a/apps/factorial
+++ b/apps/factorial
Binary files differdiff --git a/apps/hex b/apps/hex
index f38e0ebb..8d8bfe6e 100755
--- a/apps/hex
+++ b/apps/hex
Binary files differdiff --git a/apps/pack b/apps/pack
index 66313b30..05c15b24 100755
--- a/apps/pack
+++ b/apps/pack
Binary files differdiff --git a/apps/survey b/apps/survey
index 5855e4f0..7584e54c 100755
--- a/apps/survey
+++ b/apps/survey
Binary files differdiff --git a/apps/tests b/apps/tests
index e28be899..dec346d2 100755
--- a/apps/tests
+++ b/apps/tests
Binary files differdiff --git a/subx.vim b/subx.vim
index a0e11837..f63a13c9 100644
--- a/subx.vim
+++ b/subx.vim
@@ -38,7 +38,7 @@ set cpo&vim
 setlocal formatoptions-=t  " allow long lines
 setlocal formatoptions+=c  " but comments should still wrap
 
-setlocal iskeyword+=-,?,<,>
+setlocal iskeyword+=-,?,<,>,$
 
 syntax match subxH1Comment /# - .*/ | highlight link subxH1Comment Comment
 syntax match subxComment /#\( \.\| - \|? \)\@!.*/ | highlight link subxComment Comment