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authorKartik Agaram <vc@akkartik.com>2019-12-26 02:21:55 -0800
committerKartik Agaram <vc@akkartik.com>2019-12-26 02:21:55 -0800
commitbf03b1d9faa126dd6379d8f5855402a9cd95da68 (patch)
treeda4f416e54d7a074b2e02f503a6de4bed44658b6
parent1210b773625bfe1a5984b23b801bb69f55efc866 (diff)
downloadmu-bf03b1d9faa126dd6379d8f5855402a9cd95da68.tar.gz
5828 - copy (mov) instructions
-rwxr-xr-xapps/mubin69085 -> 69817 bytes
-rw-r--r--apps/mu.subx166
2 files changed, 144 insertions, 22 deletions
diff --git a/apps/mu b/apps/mu
index f679e2d5..76522096 100755
--- a/apps/mu
+++ b/apps/mu
Binary files differdiff --git a/apps/mu.subx b/apps/mu.subx
index 9837366d..6c6781c3 100644
--- a/apps/mu.subx
+++ b/apps/mu.subx
@@ -2983,22 +2983,22 @@ _Primitive-add-to-eax:
     0/imm32/output-is-write-only
     _Primitive-add-reg-to-reg/imm32/next
 _Primitive-add-reg-to-reg:
-    # var1/reg <- add var2/reg => 01/add var1/rm32 var2/r32
+    # var1/reg <- add var2/reg => 01/add-to var1/rm32 var2/r32
     "add"/imm32/name
     Single-int-var-in-some-register/imm32/inouts
     Single-int-var-in-some-register/imm32/outputs
-    "01/add"/imm32/subx-name
+    "01/add-to"/imm32/subx-name
     3/imm32/rm32-is-first-output
     1/imm32/r32-is-first-inout
     0/imm32/no-imm32
     0/imm32/output-is-write-only
     _Primitive-add-reg-to-mem/imm32/next
 _Primitive-add-reg-to-mem:
-    # add-to var1 var2/reg => 01/add var1 var2/r32
+    # add-to var1 var2/reg => 01/add-to var1 var2/r32
     "add-to"/imm32/name
     Int-var-and-second-int-var-in-some-register/imm32/inouts
     0/imm32/outputs
-    "01/add"/imm32/subx-name
+    "01/add-to"/imm32/subx-name
     1/imm32/rm32-is-first-inout
     2/imm32/r32-is-second-inout
     0/imm32/no-imm32
@@ -3050,22 +3050,22 @@ _Primitive-subtract-from-eax:
     0/imm32/output-is-write-only
     _Primitive-subtract-reg-from-reg/imm32/next
 _Primitive-subtract-reg-from-reg:
-    # var1/reg <- subtract var2/reg => 29/subtract var1/rm32 var2/r32
+    # var1/reg <- subtract var2/reg => 29/subtract-from var1/rm32 var2/r32
     "subtract"/imm32/name
     Single-int-var-in-some-register/imm32/inouts
     Single-int-var-in-some-register/imm32/outputs
-    "29/subtract"/imm32/subx-name
+    "29/subtract-from"/imm32/subx-name
     3/imm32/rm32-is-first-output
     1/imm32/r32-is-first-inout
     0/imm32/no-imm32
     0/imm32/output-is-write-only
     _Primitive-subtract-reg-from-mem/imm32/next
 _Primitive-subtract-reg-from-mem:
-    # subtract-from var1 var2/reg => 29/subtract var1 var2/r32
+    # subtract-from var1 var2/reg => 29/subtract-from var1 var2/r32
     "subtract-from"/imm32/name
     Int-var-and-second-int-var-in-some-register/imm32/inouts
     0/imm32/outputs
-    "29/subtract"/imm32/subx-name
+    "29/subtract-from"/imm32/subx-name
     1/imm32/rm32-is-first-inout
     2/imm32/r32-is-second-inout
     0/imm32/no-imm32
@@ -3117,22 +3117,22 @@ _Primitive-and-with-eax:
     0/imm32/output-is-write-only
     _Primitive-and-reg-with-reg/imm32/next
 _Primitive-and-reg-with-reg:
-    # var1/reg <- and var2/reg => 21/and var1/rm32 var2/r32
+    # var1/reg <- and var2/reg => 21/and-with var1/rm32 var2/r32
     "and"/imm32/name
     Single-int-var-in-some-register/imm32/inouts
     Single-int-var-in-some-register/imm32/outputs
-    "21/and"/imm32/subx-name
+    "21/and-with"/imm32/subx-name
     3/imm32/rm32-is-first-output
     1/imm32/r32-is-first-inout
     0/imm32/no-imm32
     0/imm32/output-is-write-only
     _Primitive-and-reg-with-mem/imm32/next
 _Primitive-and-reg-with-mem:
-    # and-with var1 var2/reg => 21/and var1 var2/r32
+    # and-with var1 var2/reg => 21/and-with var1 var2/r32
     "and-with"/imm32/name
     Int-var-and-second-int-var-in-some-register/imm32/inouts
     0/imm32/outputs
-    "21/and"/imm32/subx-name
+    "21/and-with"/imm32/subx-name
     1/imm32/rm32-is-first-inout
     2/imm32/r32-is-second-inout
     0/imm32/no-imm32
@@ -3184,22 +3184,22 @@ _Primitive-or-with-eax:
     0/imm32/output-is-write-only
     _Primitive-or-reg-with-reg/imm32/next
 _Primitive-or-reg-with-reg:
-    # var1/reg <- or var2/reg => 09/or var1/rm32 var2/r32
+    # var1/reg <- or var2/reg => 09/or-with var1/rm32 var2/r32
     "or"/imm32/name
     Single-int-var-in-some-register/imm32/inouts
     Single-int-var-in-some-register/imm32/outputs
-    "09/or"/imm32/subx-name
+    "09/or-with"/imm32/subx-name
     3/imm32/rm32-is-first-output
     1/imm32/r32-is-first-inout
     0/imm32/no-imm32
     0/imm32/output-is-write-only
     _Primitive-or-reg-with-mem/imm32/next
 _Primitive-or-reg-with-mem:
-    # or-with var1 var2/reg => 09/or var1 var2/r32
+    # or-with var1 var2/reg => 09/or-with var1 var2/r32
     "or-with"/imm32/name
     Int-var-and-second-int-var-in-some-register/imm32/inouts
     0/imm32/outputs
-    "09/or"/imm32/subx-name
+    "09/or-with"/imm32/subx-name
     1/imm32/rm32-is-first-inout
     2/imm32/r32-is-second-inout
     0/imm32/no-imm32
@@ -3251,22 +3251,22 @@ _Primitive-xor-with-eax:
     0/imm32/output-is-write-only
     _Primitive-xor-reg-with-reg/imm32/next
 _Primitive-xor-reg-with-reg:
-    # var1/reg <- xor var2/reg => 31/xor var1/rm32 var2/r32
+    # var1/reg <- xor var2/reg => 31/xor-with var1/rm32 var2/r32
     "xor"/imm32/name
     Single-int-var-in-some-register/imm32/inouts
     Single-int-var-in-some-register/imm32/outputs
-    "31/xor"/imm32/subx-name
+    "31/xor-with"/imm32/subx-name
     3/imm32/rm32-is-first-output
     1/imm32/r32-is-first-inout
     0/imm32/no-imm32
     0/imm32/output-is-write-only
     _Primitive-xor-reg-with-mem/imm32/next
 _Primitive-xor-reg-with-mem:
-    # xor-with var1 var2/reg => 31/xor var1 var2/r32
+    # xor-with var1 var2/reg => 31/xor-with var1 var2/r32
     "xor-with"/imm32/name
     Int-var-and-second-int-var-in-some-register/imm32/inouts
     0/imm32/outputs
-    "31/xor"/imm32/subx-name
+    "31/xor-with"/imm32/subx-name
     1/imm32/rm32-is-first-inout
     2/imm32/r32-is-second-inout
     0/imm32/no-imm32
@@ -3304,6 +3304,128 @@ _Primitive-xor-lit-with-mem:
     0/imm32/no-r32
     2/imm32/imm32-is-first-inout
     0/imm32/output-is-write-only
+    _Primitive-copy-to-eax/imm32/next
+# - copy
+_Primitive-copy-to-eax:
+    # var/eax <- copy lit => b8/copy-to-eax lit/imm32
+    "copy"/imm32/name
+    Single-lit-var/imm32/inouts
+    Single-int-var-in-eax/imm32/outputs
+    "b8/copy-to-eax"/imm32/subx-name
+    0/imm32/no-rm32
+    0/imm32/no-r32
+    1/imm32/imm32-is-first-inout
+    1/imm32/output-is-write-only
+    _Primitive-copy-to-ecx/imm32/next
+_Primitive-copy-to-ecx:
+    # var/ecx <- copy lit => b9/copy-to-ecx lit/imm32
+    "copy"/imm32/name
+    Single-lit-var/imm32/inouts
+    Single-int-var-in-ecx/imm32/outputs
+    "b9/copy-to-ecx"/imm32/subx-name
+    0/imm32/no-rm32
+    0/imm32/no-r32
+    1/imm32/imm32-is-first-inout
+    1/imm32/output-is-write-only
+    _Primitive-copy-to-edx/imm32/next
+_Primitive-copy-to-edx:
+    # var/edx <- copy lit => ba/copy-to-edx lit/imm32
+    "copy"/imm32/name
+    Single-lit-var/imm32/inouts
+    Single-int-var-in-edx/imm32/outputs
+    "ba/copy-to-edx"/imm32/subx-name
+    0/imm32/no-rm32
+    0/imm32/no-r32
+    1/imm32/imm32-is-first-inout
+    1/imm32/output-is-write-only
+    _Primitive-copy-to-ebx/imm32/next
+_Primitive-copy-to-ebx:
+    # var/ebx <- copy lit => bb/copy-to-ebx lit/imm32
+    "copy"/imm32/name
+    Single-lit-var/imm32/inouts
+    Single-int-var-in-ebx/imm32/outputs
+    "bb/copy-to-ebx"/imm32/subx-name
+    0/imm32/no-rm32
+    0/imm32/no-r32
+    1/imm32/imm32-is-first-inout
+    1/imm32/output-is-write-only
+    _Primitive-copy-to-esi/imm32/next
+_Primitive-copy-to-esi:
+    # var/esi <- copy lit => be/copy-to-esi lit/imm32
+    "copy"/imm32/name
+    Single-lit-var/imm32/inouts
+    Single-int-var-in-esi/imm32/outputs
+    "be/copy-to-esi"/imm32/subx-name
+    0/imm32/no-rm32
+    0/imm32/no-r32
+    1/imm32/imm32-is-first-inout
+    1/imm32/output-is-write-only
+    _Primitive-copy-to-edi/imm32/next
+_Primitive-copy-to-edi:
+    # var/edi <- copy lit => bf/copy-to-edi lit/imm32
+    "copy"/imm32/name
+    Single-lit-var/imm32/inouts
+    Single-int-var-in-edi/imm32/outputs
+    "bf/copy-to-edi"/imm32/subx-name
+    0/imm32/no-rm32
+    0/imm32/no-r32
+    1/imm32/imm32-is-first-inout
+    1/imm32/output-is-write-only
+    _Primitive-copy-reg-to-reg/imm32/next
+_Primitive-copy-reg-to-reg:
+    # var1/reg <- copy var2/reg => 89/copy-to var1/rm32 var2/r32
+    "copy"/imm32/name
+    Single-int-var-in-some-register/imm32/inouts
+    Single-int-var-in-some-register/imm32/outputs
+    "89/copy-to"/imm32/subx-name
+    3/imm32/rm32-is-first-output
+    1/imm32/r32-is-first-inout
+    0/imm32/no-imm32
+    1/imm32/output-is-write-only
+    _Primitive-copy-reg-to-mem/imm32/next
+_Primitive-copy-reg-to-mem:
+    # copy-to var1 var2/reg => 89/copy-to var1 var2/r32
+    "copy-to"/imm32/name
+    Int-var-and-second-int-var-in-some-register/imm32/inouts
+    0/imm32/outputs
+    "89/copy-to"/imm32/subx-name
+    1/imm32/rm32-is-first-inout
+    2/imm32/r32-is-second-inout
+    0/imm32/no-imm32
+    1/imm32/output-is-write-only
+    _Primitive-copy-mem-to-reg/imm32/next
+_Primitive-copy-mem-to-reg:
+    # var1/reg <- copy var2 => 8b/copy-from var2/rm32 var1/r32
+    "copy"/imm32/name
+    Single-int-var-on-stack/imm32/inouts
+    Single-int-var-in-some-register/imm32/outputs
+    "8b/copy-from"/imm32/subx-name
+    1/imm32/rm32-is-first-inout
+    3/imm32/r32-is-first-output
+    0/imm32/no-imm32
+    1/imm32/output-is-write-only
+    _Primitive-copy-lit-to-reg/imm32/next
+_Primitive-copy-lit-to-reg:
+    # var1/reg <- copy lit => c7 0/subop/copy var1/rm32 lit/imm32
+    "copy"/imm32/name
+    Single-lit-var/imm32/inouts
+    Single-int-var-in-some-register/imm32/outputs
+    "c7 0/subop/copy"/imm32/subx-name
+    3/imm32/rm32-is-first-output
+    0/imm32/no-r32
+    1/imm32/imm32-is-first-inout
+    1/imm32/output-is-write-only
+    _Primitive-copy-lit-to-mem/imm32/next
+_Primitive-copy-lit-to-mem:
+    # copy-to var1, lit => c7 0/subop/copy var1/rm32 lit/imm32
+    "copy-to"/imm32/name
+    Int-var-and-literal/imm32/inouts
+    0/imm32/outputs
+    "c7 0/subop/copy"/imm32/subx-name
+    1/imm32/rm32-is-first-inout
+    0/imm32/no-r32
+    2/imm32/imm32-is-first-inout
+    1/imm32/output-is-write-only
     0/imm32/next
 
 Single-int-var-on-stack:
@@ -4432,7 +4554,7 @@ test-add-reg-to-reg:
 #?     (rewind-stream _test-output-stream)
 #?     # }}}
     # check output
-    (check-next-stream-line-equal _test-output-stream "01/add %eax 0x00000001/r32" "F - test-add-reg-to-reg")
+    (check-next-stream-line-equal _test-output-stream "01/add-to %eax 0x00000001/r32" "F - test-add-reg-to-reg")
     # . epilogue
     89/<- %esp 5/r32/ebp
     5d/pop-to-ebp
@@ -4488,7 +4610,7 @@ test-add-reg-to-mem:
 #?     (rewind-stream _test-output-stream)
 #?     # }}}
     # check output
-    (check-next-stream-line-equal _test-output-stream "01/add *(ebp+0x00000008) 0x00000001/r32" "F - test-add-reg-to-mem")
+    (check-next-stream-line-equal _test-output-stream "01/add-to *(ebp+0x00000008) 0x00000001/r32" "F - test-add-reg-to-mem")
     # . epilogue
     89/<- %esp 5/r32/ebp
     5d/pop-to-ebp