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author | Kartik Agaram <vc@akkartik.com> | 2020-12-23 11:10:52 -0800 |
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committer | Kartik Agaram <vc@akkartik.com> | 2020-12-23 11:10:52 -0800 |
commit | e60e0e06453788c769c457c64448fa5d00681707 (patch) | |
tree | 90b339fb44fdc3bb6523c1a5eada569dfb681845 /apps | |
parent | 286ccc40e0c0ec2f897cd93a730ea8bacc84cf3e (diff) | |
download | mu-e60e0e06453788c769c457c64448fa5d00681707.tar.gz |
7389 - snapshot
Ok, we're back at the reset loop. Let's keep going; maybe having a decent keyboard handler will fix it. The bug I fixed here was caused by misunderstanding what m16&32 mean in the Intel manual. It's still a regular regmem operand that uses all of the ModR/M byte (which can be interpreted in 16-bit mode, adding to the complication). It's just constrained to not allow direct addressing (mod 00). I needed to better internalize the format of the instruction set references at the start of Volume 2, Chapter 3.
Diffstat (limited to 'apps')
-rw-r--r-- | apps/boot.hex | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/apps/boot.hex b/apps/boot.hex index dad4a098..e526eea6 100644 --- a/apps/boot.hex +++ b/apps/boot.hex @@ -85,7 +85,7 @@ # 3a: # switch to 32-bit mode - 0f 01 16 # lgdt 00/mod/indirect 010/subop 110/rm32/TODO + 0f 01 16 # lgdt 00/mod/indirect 010/subop 110/rm/use-disp16 80 7c # *gdt_descriptor # 3f: 0f 20 c0 # eax <- cr0 @@ -170,16 +170,16 @@ e9 fb ff # loop forever 8e e8 # gs <- ax # load interrupt handlers - 0f 01 1e # lidt 00/mod/indirect 011/subop 110/rm32/TODO - 00 7f # *idt_descriptor + 0f 01 1d # lidt 00/mod/indirect 011/subop 101/rm32/use-disp32 + 00 7f 00 00 # *idt_descriptor # initialization is done; enable interrupts fb - e9 27 00 00 00 # jump to 0x7d00 + e9 25 00 00 00 # jump to 0x7d00 # padding -# d9: - 00 00 00 00 00 00 00 +# db: + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |