5826 - done with basic binary ops

2 files changed, 197 insertions, 0 deletions

diff --git a/apps/mu b/apps/mu
index 9d2f89d7..864eb892 100755
--- a/apps/mu
+++ b/apps/mu
Binary files differdiff --git a/apps/mu.subx b/apps/mu.subx
index 6a379270..1a0b2050 100644
--- a/apps/mu.subx
+++ b/apps/mu.subx
@@ -2792,6 +2792,7 @@ $emit-subx-statement:abort:
 Primitives:
 # - increment/decrement
 _Primitive-inc-eax:
+    # var/eax <- increment => 40/increment-eax
     "increment"/imm32/name
     0/imm32/no-inouts
     Single-int-var-in-eax/imm32/outputs
@@ -2801,6 +2802,7 @@ _Primitive-inc-eax:
     0/imm32/no-imm32
     _Primitive-inc-ecx/imm32/next
 _Primitive-inc-ecx:
+    # var/ecx <- increment => 41/increment-ecx
     "increment"/imm32/name
     0/imm32/no-inouts
     Single-int-var-in-ecx/imm32/outputs
@@ -2810,6 +2812,7 @@ _Primitive-inc-ecx:
     0/imm32/no-imm32
     _Primitive-inc-edx/imm32/next
 _Primitive-inc-edx:
+    # var/edx <- increment => 42/increment-edx
     "increment"/imm32/name
     0/imm32/no-inouts
     Single-int-var-in-edx/imm32/outputs
@@ -2819,6 +2822,7 @@ _Primitive-inc-edx:
     0/imm32/no-imm32
     _Primitive-inc-ebx/imm32/next
 _Primitive-inc-ebx:
+    # var/ebx <- increment => 43/increment-ebx
     "increment"/imm32/name
     0/imm32/no-inouts
     Single-int-var-in-ebx/imm32/outputs
@@ -2828,6 +2832,7 @@ _Primitive-inc-ebx:
     0/imm32/no-imm32
     _Primitive-inc-esi/imm32/next
 _Primitive-inc-esi:
+    # var/esi <- increment => 46/increment-esi
     "increment"/imm32/name
     0/imm32/no-inouts
     Single-int-var-in-esi/imm32/outputs
@@ -2837,6 +2842,7 @@ _Primitive-inc-esi:
     0/imm32/no-imm32
     _Primitive-inc-edi/imm32/next
 _Primitive-inc-edi:
+    # var/edi <- increment => 47/increment-edi
     "increment"/imm32/name
     0/imm32/no-inouts
     Single-int-var-in-edi/imm32/outputs
@@ -2846,6 +2852,7 @@ _Primitive-inc-edi:
     0/imm32/no-imm32
     _Primitive-dec-eax/imm32/next
 _Primitive-dec-eax:
+    # var/eax <- decrement => 48/decrement-eax
     "decrement"/imm32/name
     0/imm32/no-inouts
     Single-int-var-in-eax/imm32/outputs
@@ -2855,6 +2862,7 @@ _Primitive-dec-eax:
     0/imm32/no-imm32
     _Primitive-dec-ecx/imm32/next
 _Primitive-dec-ecx:
+    # var/ecx <- decrement => 49/decrement-ecx
     "decrement"/imm32/name
     0/imm32/no-inouts
     Single-int-var-in-ecx/imm32/outputs
@@ -2864,6 +2872,7 @@ _Primitive-dec-ecx:
     0/imm32/no-imm32
     _Primitive-dec-edx/imm32/next
 _Primitive-dec-edx:
+    # var/edx <- decrement => 4a/decrement-edx
     "decrement"/imm32/name
     0/imm32/no-inouts
     Single-int-var-in-edx/imm32/outputs
@@ -2873,6 +2882,7 @@ _Primitive-dec-edx:
     0/imm32/no-imm32
     _Primitive-dec-ebx/imm32/next
 _Primitive-dec-ebx:
+    # var/ebx <- decrement => 4b/decrement-ebx
     "decrement"/imm32/name
     0/imm32/no-inouts
     Single-int-var-in-ebx/imm32/outputs
@@ -2882,6 +2892,7 @@ _Primitive-dec-ebx:
     0/imm32/no-imm32
     _Primitive-dec-esi/imm32/next
 _Primitive-dec-esi:
+    # var/esi <- decrement => 4e/decrement-esi
     "decrement"/imm32/name
     0/imm32/no-inouts
     Single-int-var-in-esi/imm32/outputs
@@ -2891,6 +2902,7 @@ _Primitive-dec-esi:
     0/imm32/no-imm32
     _Primitive-dec-edi/imm32/next
 _Primitive-dec-edi:
+    # var/edi <- decrement => 4f/decrement-edi
     "decrement"/imm32/name
     0/imm32/no-inouts
     Single-int-var-in-edi/imm32/outputs
@@ -2941,6 +2953,7 @@ _Primitive-dec-reg:
     _Primitive-add-to-eax/imm32/next
 # - add
 _Primitive-add-to-eax:
+    # var/eax <- add lit => 05/add-to-eax lit/imm32
     "add"/imm32/name
     Single-lit-var/imm32/inouts
     Single-int-var-in-eax/imm32/outputs
@@ -3001,6 +3014,7 @@ _Primitive-add-lit-to-mem:
     _Primitive-subtract-from-eax/imm32/next
 # - subtract
 _Primitive-subtract-from-eax:
+    # var/eax <- subtract lit => 2d/subtract-from-eax lit/imm32
     "subtract"/imm32/name
     Single-lit-var/imm32/inouts
     Single-int-var-in-eax/imm32/outputs
@@ -3058,6 +3072,189 @@ _Primitive-subtract-lit-from-mem:
     1/imm32/rm32-is-first-inout
     0/imm32/no-r32
     2/imm32/imm32-is-first-inout
+    _Primitive-and-with-eax/imm32/next
+# - and
+_Primitive-and-with-eax:
+    # var/eax <- and lit => 25/and-with-eax lit/imm32
+    "and"/imm32/name
+    Single-lit-var/imm32/inouts
+    Single-int-var-in-eax/imm32/outputs
+    "25/and-with-eax"/imm32/subx-name
+    0/imm32/no-rm32
+    0/imm32/no-r32
+    1/imm32/imm32-is-first-inout
+    _Primitive-and-reg-with-reg/imm32/next
+_Primitive-and-reg-with-reg:
+    # var1/reg <- and var2/reg => 21/and var1/rm32 var2/r32
+    "and"/imm32/name
+    Single-int-var-in-some-register/imm32/inouts
+    Single-int-var-in-some-register/imm32/outputs
+    "21/and"/imm32/subx-name
+    3/imm32/rm32-is-first-output
+    1/imm32/r32-is-first-inout
+    0/imm32/no-imm32
+    _Primitive-and-reg-with-mem/imm32/next
+_Primitive-and-reg-with-mem:
+    # and-with var1 var2/reg => 21/and var1 var2/r32
+    "and-with"/imm32/name
+    Int-var-and-second-int-var-in-some-register/imm32/inouts
+    0/imm32/outputs
+    "21/and"/imm32/subx-name
+    1/imm32/rm32-is-first-inout
+    2/imm32/r32-is-second-inout
+    0/imm32/no-imm32
+    _Primitive-and-mem-with-reg/imm32/next
+_Primitive-and-mem-with-reg:
+    # var1/reg <- and var2 => 23/and var2/rm32 var1/r32
+    "and"/imm32/name
+    Single-int-var-on-stack/imm32/inouts
+    Single-int-var-in-some-register/imm32/outputs
+    "23/and"/imm32/subx-name
+    1/imm32/rm32-is-first-inout
+    3/imm32/r32-is-first-output
+    0/imm32/no-imm32
+    _Primitive-and-lit-with-reg/imm32/next
+_Primitive-and-lit-with-reg:
+    # var1/reg <- and lit => 81 4/subop/and var1/rm32 lit/imm32
+    "and"/imm32/name
+    Single-lit-var/imm32/inouts
+    Single-int-var-in-some-register/imm32/outputs
+    "81 4/subop/and"/imm32/subx-name
+    3/imm32/rm32-is-first-output
+    0/imm32/no-r32
+    1/imm32/imm32-is-first-inout
+    _Primitive-and-lit-with-mem/imm32/next
+_Primitive-and-lit-with-mem:
+    # and-with var1, lit => 81 4/subop/and var1/rm32 lit/imm32
+    "and-with"/imm32/name
+    Int-var-and-literal/imm32/inouts
+    0/imm32/outputs
+    "81 4/subop/and"/imm32/subx-name
+    1/imm32/rm32-is-first-inout
+    0/imm32/no-r32
+    2/imm32/imm32-is-first-inout
+    _Primitive-or-with-eax/imm32/next
+# - or
+_Primitive-or-with-eax:
+    # var/eax <- or lit => 0d/or-with-eax lit/imm32
+    "or"/imm32/name
+    Single-lit-var/imm32/inouts
+    Single-int-var-in-eax/imm32/outputs
+    "0d/or-with-eax"/imm32/subx-name
+    0/imm32/no-rm32
+    0/imm32/no-r32
+    1/imm32/imm32-is-first-inout
+    _Primitive-or-reg-with-reg/imm32/next
+_Primitive-or-reg-with-reg:
+    # var1/reg <- or var2/reg => 09/or var1/rm32 var2/r32
+    "or"/imm32/name
+    Single-int-var-in-some-register/imm32/inouts
+    Single-int-var-in-some-register/imm32/outputs
+    "09/or"/imm32/subx-name
+    3/imm32/rm32-is-first-output
+    1/imm32/r32-is-first-inout
+    0/imm32/no-imm32
+    _Primitive-or-reg-with-mem/imm32/next
+_Primitive-or-reg-with-mem:
+    # or-with var1 var2/reg => 09/or var1 var2/r32
+    "or-with"/imm32/name
+    Int-var-and-second-int-var-in-some-register/imm32/inouts
+    0/imm32/outputs
+    "09/or"/imm32/subx-name
+    1/imm32/rm32-is-first-inout
+    2/imm32/r32-is-second-inout
+    0/imm32/no-imm32
+    _Primitive-or-mem-with-reg/imm32/next
+_Primitive-or-mem-with-reg:
+    # var1/reg <- or var2 => 0b/or var2/rm32 var1/r32
+    "or"/imm32/name
+    Single-int-var-on-stack/imm32/inouts
+    Single-int-var-in-some-register/imm32/outputs
+    "0b/or"/imm32/subx-name
+    1/imm32/rm32-is-first-inout
+    3/imm32/r32-is-first-output
+    0/imm32/no-imm32
+    _Primitive-or-lit-with-reg/imm32/next
+_Primitive-or-lit-with-reg:
+    # var1/reg <- or lit => 81 1/subop/or var1/rm32 lit/imm32
+    "or"/imm32/name
+    Single-lit-var/imm32/inouts
+    Single-int-var-in-some-register/imm32/outputs
+    "81 4/subop/or"/imm32/subx-name
+    3/imm32/rm32-is-first-output
+    0/imm32/no-r32
+    1/imm32/imm32-is-first-inout
+    _Primitive-or-lit-with-mem/imm32/next
+_Primitive-or-lit-with-mem:
+    # or-with var1, lit => 81 1/subop/or var1/rm32 lit/imm32
+    "or-with"/imm32/name
+    Int-var-and-literal/imm32/inouts
+    0/imm32/outputs
+    "81 4/subop/or"/imm32/subx-name
+    1/imm32/rm32-is-first-inout
+    0/imm32/no-r32
+    2/imm32/imm32-is-first-inout
+    _Primitive-xor-with-eax/imm32/next
+# - xor
+_Primitive-xor-with-eax:
+    # var/eax <- xor lit => 35/xor-with-eax lit/imm32
+    "xor"/imm32/name
+    Single-lit-var/imm32/inouts
+    Single-int-var-in-eax/imm32/outputs
+    "35/xor-with-eax"/imm32/subx-name
+    0/imm32/no-rm32
+    0/imm32/no-r32
+    1/imm32/imm32-is-first-inout
+    _Primitive-xor-reg-with-reg/imm32/next
+_Primitive-xor-reg-with-reg:
+    # var1/reg <- xor var2/reg => 31/xor var1/rm32 var2/r32
+    "xor"/imm32/name
+    Single-int-var-in-some-register/imm32/inouts
+    Single-int-var-in-some-register/imm32/outputs
+    "31/xor"/imm32/subx-name
+    3/imm32/rm32-is-first-output
+    1/imm32/r32-is-first-inout
+    0/imm32/no-imm32
+    _Primitive-xor-reg-with-mem/imm32/next
+_Primitive-xor-reg-with-mem:
+    # xor-with var1 var2/reg => 31/xor var1 var2/r32
+    "xor-with"/imm32/name
+    Int-var-and-second-int-var-in-some-register/imm32/inouts
+    0/imm32/outputs
+    "31/xor"/imm32/subx-name
+    1/imm32/rm32-is-first-inout
+    2/imm32/r32-is-second-inout
+    0/imm32/no-imm32
+    _Primitive-xor-mem-with-reg/imm32/next
+_Primitive-xor-mem-with-reg:
+    # var1/reg <- xor var2 => 33/xor var2/rm32 var1/r32
+    "xor"/imm32/name
+    Single-int-var-on-stack/imm32/inouts
+    Single-int-var-in-some-register/imm32/outputs
+    "33/xor"/imm32/subx-name
+    1/imm32/rm32-is-first-inout
+    3/imm32/r32-is-first-output
+    0/imm32/no-imm32
+    _Primitive-xor-lit-with-reg/imm32/next
+_Primitive-xor-lit-with-reg:
+    # var1/reg <- xor lit => 81 6/subop/xor var1/rm32 lit/imm32
+    "xor"/imm32/name
+    Single-lit-var/imm32/inouts
+    Single-int-var-in-some-register/imm32/outputs
+    "81 4/subop/xor"/imm32/subx-name
+    3/imm32/rm32-is-first-output
+    0/imm32/no-r32
+    1/imm32/imm32-is-first-inout
+    _Primitive-xor-lit-with-mem/imm32/next
+_Primitive-xor-lit-with-mem:
+    # xor-with var1, lit => 81 6/subop/xor var1/rm32 lit/imm32
+    "xor-with"/imm32/name
+    Int-var-and-literal/imm32/inouts
+    0/imm32/outputs
+    "81 4/subop/xor"/imm32/subx-name
+    1/imm32/rm32-is-first-inout
+    0/imm32/no-r32
+    2/imm32/imm32-is-first-inout
     0/imm32/next
 
 Single-int-var-on-stack: