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| author | Kartik Agaram <vc@akkartik.com> | 2020-05-22 23:08:09 -0700 |
|---|---|---|
| committer | Kartik Agaram <vc@akkartik.com> | 2020-05-22 23:12:11 -0700 |
| commit | 9a77780158842db6e4aa098f5027e030fc3bd878 (patch) | |
| tree | 39dcb108e89fa7135bb74f8796ed55c5d117a362 /html/090register-names.subx.html | |
| parent | 3d0c48adf989ce9431986320ca76f565dc53ee5c (diff) | |
| download | mu-9a77780158842db6e4aa098f5027e030fc3bd878.tar.gz | |
6384
Diffstat (limited to 'html/090register-names.subx.html')
| -rw-r--r-- | html/090register-names.subx.html | 121 |
1 files changed, 106 insertions, 15 deletions
diff --git a/html/090register-names.subx.html b/html/090register-names.subx.html index 46e18826..510dbe76 100644 --- a/html/090register-names.subx.html +++ b/html/090register-names.subx.html @@ -53,21 +53,112 @@ if ('onhashchange' in window) { <body onload='JumpToLine();'> <a href='https://github.com/akkartik/mu/blob/master/090register-names.subx'>https://github.com/akkartik/mu/blob/master/090register-names.subx</a> <pre id='vimCodeElement'> -<span id="L1" class="LineNr"> 1 </span>== data -<span id="L2" class="LineNr"> 2 </span><span class="SpecialChar">Registers</span>: <span class="subxComment"># (table string int)</span> -<span id="L3" class="LineNr"> 3 </span> <span class="subxComment"># a table is a stream</span> -<span id="L4" class="LineNr"> 4 </span> 0x40/imm32/write -<span id="L5" class="LineNr"> 5 </span> 0/imm32/read -<span id="L6" class="LineNr"> 6 </span> 0x40/imm32/length -<span id="L7" class="LineNr"> 7 </span> <span class="subxComment"># data</span> -<span id="L8" class="LineNr"> 8 </span> <span class="Constant">"eax"</span>/imm32 0/imm32 -<span id="L9" class="LineNr"> 9 </span> <span class="Constant">"ecx"</span>/imm32 1/imm32 -<span id="L10" class="LineNr">10 </span> <span class="Constant">"edx"</span>/imm32 2/imm32 -<span id="L11" class="LineNr">11 </span> <span class="Constant">"ebx"</span>/imm32 3/imm32 -<span id="L12" class="LineNr">12 </span> <span class="Constant">"esp"</span>/imm32 4/imm32 -<span id="L13" class="LineNr">13 </span> <span class="Constant">"ebp"</span>/imm32 5/imm32 -<span id="L14" class="LineNr">14 </span> <span class="Constant">"esi"</span>/imm32 6/imm32 -<span id="L15" class="LineNr">15 </span> <span class="Constant">"edi"</span>/imm32 7/imm32 +<span id="L1" class="LineNr"> 1 </span>== data +<span id="L2" class="LineNr"> 2 </span><span class="SpecialChar">Registers</span>: <span class="subxComment"># (addr stream {(handle array byte), int})</span> +<span id="L3" class="LineNr"> 3 </span> <span class="subxComment"># a table is a stream</span> +<span id="L4" class="LineNr"> 4 </span> 0xc0/imm32/write +<span id="L5" class="LineNr"> 5 </span> 0/imm32/read +<span id="L6" class="LineNr"> 6 </span> 0xc0/imm32/length +<span id="L7" class="LineNr"> 7 </span> <span class="subxComment"># data</span> +<span id="L8" class="LineNr"> 8 </span> <span class="subxComment"># it is perfectly ok to use fake alloc-ids -- as long as you never try to reclaim them</span> +<span id="L9" class="LineNr"> 9 </span> 0x11/imm32/alloc-id $Register-eax/imm32 0/imm32 +<span id="L10" class="LineNr"> 10 </span> 0x11/imm32/alloc-id $Register-ecx/imm32 1/imm32 +<span id="L11" class="LineNr"> 11 </span> 0x11/imm32/alloc-id $Register-edx/imm32 2/imm32 +<span id="L12" class="LineNr"> 12 </span> 0x11/imm32/alloc-id $Register-ebx/imm32 3/imm32 +<span id="L13" class="LineNr"> 13 </span> 0x11/imm32/alloc-id $Register-esp/imm32 4/imm32 +<span id="L14" class="LineNr"> 14 </span> 0x11/imm32/alloc-id $Register-ebp/imm32 5/imm32 +<span id="L15" class="LineNr"> 15 </span> 0x11/imm32/alloc-id $Register-esi/imm32 6/imm32 +<span id="L16" class="LineNr"> 16 </span> 0x11/imm32/alloc-id $Register-edi/imm32 7/imm32 +<span id="L17" class="LineNr"> 17 </span> <span class="subxComment"># for 8-byte registers</span> +<span id="L18" class="LineNr"> 18 </span> <span class="subxComment"># we don't actually check if these are used when they should be; be careful</span> +<span id="L19" class="LineNr"> 19 </span> 0x11/imm32/alloc-id $Register-al/imm32 0/imm32 +<span id="L20" class="LineNr"> 20 </span> 0x11/imm32/alloc-id $Register-cl/imm32 1/imm32 +<span id="L21" class="LineNr"> 21 </span> 0x11/imm32/alloc-id $Register-dl/imm32 2/imm32 +<span id="L22" class="LineNr"> 22 </span> 0x11/imm32/alloc-id $Register-bl/imm32 3/imm32 +<span id="L23" class="LineNr"> 23 </span> 0x11/imm32/alloc-id $Register-ah/imm32 4/imm32 +<span id="L24" class="LineNr"> 24 </span> 0x11/imm32/alloc-id $Register-ch/imm32 5/imm32 +<span id="L25" class="LineNr"> 25 </span> 0x11/imm32/alloc-id $Register-dh/imm32 6/imm32 +<span id="L26" class="LineNr"> 26 </span> 0x11/imm32/alloc-id $Register-bh/imm32 7/imm32 +<span id="L27" class="LineNr"> 27 </span> +<span id="L28" class="LineNr"> 28 </span><span class="Constant">$Register-eax</span>: +<span id="L29" class="LineNr"> 29 </span> 0x11/imm32/alloc-id +<span id="L30" class="LineNr"> 30 </span> 3/imm32/size +<span id="L31" class="LineNr"> 31 </span> 0x65/e 0x61/a 0x78/x +<span id="L32" class="LineNr"> 32 </span> +<span id="L33" class="LineNr"> 33 </span><span class="Constant">$Register-ecx</span>: +<span id="L34" class="LineNr"> 34 </span> 0x11/imm32/alloc-id +<span id="L35" class="LineNr"> 35 </span> 3/imm32/size +<span id="L36" class="LineNr"> 36 </span> 0x65/e 0x63/c 0x78/x +<span id="L37" class="LineNr"> 37 </span> +<span id="L38" class="LineNr"> 38 </span><span class="Constant">$Register-edx</span>: +<span id="L39" class="LineNr"> 39 </span> 0x11/imm32/alloc-id +<span id="L40" class="LineNr"> 40 </span> 3/imm32/size +<span id="L41" class="LineNr"> 41 </span> 0x65/e 0x64/d 0x78/x +<span id="L42" class="LineNr"> 42 </span> +<span id="L43" class="LineNr"> 43 </span><span class="Constant">$Register-ebx</span>: +<span id="L44" class="LineNr"> 44 </span> 0x11/imm32/alloc-id +<span id="L45" class="LineNr"> 45 </span> 3/imm32/size +<span id="L46" class="LineNr"> 46 </span> 0x65/e 0x62/b 0x78/x +<span id="L47" class="LineNr"> 47 </span> +<span id="L48" class="LineNr"> 48 </span><span class="Constant">$Register-esp</span>: +<span id="L49" class="LineNr"> 49 </span> 0x11/imm32/alloc-id +<span id="L50" class="LineNr"> 50 </span> 3/imm32/size +<span id="L51" class="LineNr"> 51 </span> 0x65/e 0x73/s 0x70/p +<span id="L52" class="LineNr"> 52 </span> +<span id="L53" class="LineNr"> 53 </span><span class="Constant">$Register-ebp</span>: +<span id="L54" class="LineNr"> 54 </span> 0x11/imm32/alloc-id +<span id="L55" class="LineNr"> 55 </span> 3/imm32/size +<span id="L56" class="LineNr"> 56 </span> 0x65/e 0x62/b 0x70/p +<span id="L57" class="LineNr"> 57 </span> +<span id="L58" class="LineNr"> 58 </span><span class="Constant">$Register-esi</span>: +<span id="L59" class="LineNr"> 59 </span> 0x11/imm32/alloc-id +<span id="L60" class="LineNr"> 60 </span> 3/imm32/size +<span id="L61" class="LineNr"> 61 </span> 0x65/e 0x73/s 0x69/i +<span id="L62" class="LineNr"> 62 </span> +<span id="L63" class="LineNr"> 63 </span><span class="Constant">$Register-edi</span>: +<span id="L64" class="LineNr"> 64 </span> 0x11/imm32/alloc-id +<span id="L65" class="LineNr"> 65 </span> 3/imm32/size +<span id="L66" class="LineNr"> 66 </span> 0x65/e 0x64/d 0x69/i +<span id="L67" class="LineNr"> 67 </span> +<span id="L68" class="LineNr"> 68 </span><span class="Constant">$Register-al</span>: +<span id="L69" class="LineNr"> 69 </span> 0x11/imm32/alloc-id +<span id="L70" class="LineNr"> 70 </span> 2/imm32/size +<span id="L71" class="LineNr"> 71 </span> 0x61/a 0x6c/l +<span id="L72" class="LineNr"> 72 </span> +<span id="L73" class="LineNr"> 73 </span><span class="Constant">$Register-cl</span>: +<span id="L74" class="LineNr"> 74 </span> 0x11/imm32/alloc-id +<span id="L75" class="LineNr"> 75 </span> 2/imm32/size +<span id="L76" class="LineNr"> 76 </span> 0x63/c 0x6c/l +<span id="L77" class="LineNr"> 77 </span> +<span id="L78" class="LineNr"> 78 </span><span class="Constant">$Register-dl</span>: +<span id="L79" class="LineNr"> 79 </span> 0x11/imm32/alloc-id +<span id="L80" class="LineNr"> 80 </span> 2/imm32/size +<span id="L81" class="LineNr"> 81 </span> 0x64/d 0x6c/l +<span id="L82" class="LineNr"> 82 </span> +<span id="L83" class="LineNr"> 83 </span><span class="Constant">$Register-bl</span>: +<span id="L84" class="LineNr"> 84 </span> 0x11/imm32/alloc-id +<span id="L85" class="LineNr"> 85 </span> 2/imm32/size +<span id="L86" class="LineNr"> 86 </span> 0x62/b 0x6c/l +<span id="L87" class="LineNr"> 87 </span> +<span id="L88" class="LineNr"> 88 </span><span class="Constant">$Register-ah</span>: +<span id="L89" class="LineNr"> 89 </span> 0x11/imm32/alloc-id +<span id="L90" class="LineNr"> 90 </span> 2/imm32/size +<span id="L91" class="LineNr"> 91 </span> 0x61/a 0x68/h +<span id="L92" class="LineNr"> 92 </span> +<span id="L93" class="LineNr"> 93 </span><span class="Constant">$Register-ch</span>: +<span id="L94" class="LineNr"> 94 </span> 0x11/imm32/alloc-id +<span id="L95" class="LineNr"> 95 </span> 2/imm32/size +<span id="L96" class="LineNr"> 96 </span> 0x63/c 0x68/h +<span id="L97" class="LineNr"> 97 </span> +<span id="L98" class="LineNr"> 98 </span><span class="Constant">$Register-dh</span>: +<span id="L99" class="LineNr"> 99 </span> 0x11/imm32/alloc-id +<span id="L100" class="LineNr">100 </span> 2/imm32/size +<span id="L101" class="LineNr">101 </span> 0x64/d 0x68/h +<span id="L102" class="LineNr">102 </span> +<span id="L103" class="LineNr">103 </span><span class="Constant">$Register-bh</span>: +<span id="L104" class="LineNr">104 </span> 0x11/imm32/alloc-id +<span id="L105" class="LineNr">105 </span> 2/imm32/size +<span id="L106" class="LineNr">106 </span> 0x62/b 0x68/h </pre> </body> </html> |