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| author | Kartik Agaram <vc@akkartik.com> | 2021-03-25 14:33:04 -0700 |
|---|---|---|
| committer | Kartik Agaram <vc@akkartik.com> | 2021-03-25 14:33:04 -0700 |
| commit | 681c0156a93599ed7199ee801ebc7f3f79914575 (patch) | |
| tree | e3c58fc3411ae1b70eb5060827bc4ec4130b2dbd /html/mu_instructions.html | |
| parent | c2aeba0a110eb57fe41ab3388970e55274e15e14 (diff) | |
| download | mu-681c0156a93599ed7199ee801ebc7f3f79914575.tar.gz | |
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Diffstat (limited to 'html/mu_instructions.html')
| -rw-r--r-- | html/mu_instructions.html | 431 |
1 files changed, 431 insertions, 0 deletions
diff --git a/html/mu_instructions.html b/html/mu_instructions.html new file mode 100644 index 00000000..ff5a2fe3 --- /dev/null +++ b/html/mu_instructions.html @@ -0,0 +1,431 @@ +<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN" "http://www.w3.org/TR/html4/strict.dtd"> +<html> +<head> +<meta http-equiv="content-type" content="text/html; charset=UTF-8"> +<title>~/play/mu/mu_instructions.html</title> +<meta name="Generator" content="Vim/8.1"> +<meta name="plugin-version" content="vim8.1_v1"> +<meta name="syntax" content="none"> +<meta name="settings" content="use_css,no_foldcolumn,expand_tabs,prevent_copy="> +<meta name="colorscheme" content="minimal-light"> +<style type="text/css"> +<!-- +pre { font-family: monospace; color: #000000; background-color: #c6c6c6; } +body { font-family: monospace; color: #000000; background-color: #c6c6c6; } +* { font-size: 1em; } +.PreProc { color: #c000c0; } +.muComment { color: #005faf; } +.Constant { color: #008787; } +.Special { color: #ff6060; } +--> +</style> +</head> +<body> +<pre id='vimCodeElement'> +<span class="muComment">## Mu's instructions and their table-driven translation</span> + +See <a href="http://akkartik.name/akkartik-convivial-20200607.pdf">http://akkartik.name/akkartik-convivial-20200607.pdf</a> for the complete +story. In brief: Mu is a statement-oriented language. Blocks consist of flat +lists of instructions. Instructions can have inputs after the operation, and +outputs to the left of a '<span class="Special"><-</span>'. Inputs and outputs must be variables. They can't +include nested expressions. Variables can be literals ('n'), or live in a +register ('var/reg') or in memory ('var') at some 'stack-offset' from the 'ebp' +register. Outputs must be registers. To modify a variable in memory, pass it in +by reference as an input. (Inputs are more precisely called 'inouts'.) +Conversely, registers that are just read from must not be passed as outputs. + +The following chart shows all the instruction forms supported by Mu, along with +the SubX instruction they're translated to. + +<span class="muComment">## Integer instructions</span> + +These instructions use the general-purpose registers. + +var/<span class="Constant">eax</span> <span class="Special"><-</span> increment => <span class="Constant">"40/increment-eax"</span> +var/<span class="Constant">ecx</span> <span class="Special"><-</span> increment => <span class="Constant">"41/increment-ecx"</span> +var/<span class="Constant">edx</span> <span class="Special"><-</span> increment => <span class="Constant">"42/increment-edx"</span> +var/<span class="Constant">ebx</span> <span class="Special"><-</span> increment => <span class="Constant">"43/increment-ebx"</span> +var/<span class="Constant">esi</span> <span class="Special"><-</span> increment => <span class="Constant">"46/increment-esi"</span> +var/<span class="Constant">edi</span> <span class="Special"><-</span> increment => <span class="Constant">"47/increment-edi"</span> +increment var => <span class="Constant">"ff 0/subop/increment *(ebp+"</span> var.stack-offset <span class="Constant">")"</span> +increment *var/reg => <span class="Constant">"ff 0/subop/increment *"</span> reg + +var/<span class="Constant">eax</span> <span class="Special"><-</span> decrement => <span class="Constant">"48/decrement-eax"</span> +var/<span class="Constant">ecx</span> <span class="Special"><-</span> decrement => <span class="Constant">"49/decrement-ecx"</span> +var/<span class="Constant">edx</span> <span class="Special"><-</span> decrement => <span class="Constant">"4a/decrement-edx"</span> +var/<span class="Constant">ebx</span> <span class="Special"><-</span> decrement => <span class="Constant">"4b/decrement-ebx"</span> +var/<span class="Constant">esi</span> <span class="Special"><-</span> decrement => <span class="Constant">"4e/decrement-esi"</span> +var/<span class="Constant">edi</span> <span class="Special"><-</span> decrement => <span class="Constant">"4f/decrement-edi"</span> +decrement var => <span class="Constant">"ff 1/subop/decrement *(ebp+"</span> var.stack-offset <span class="Constant">")"</span> +decrement *var/reg => <span class="Constant">"ff 1/subop/decrement *"</span> reg + +var/reg <span class="Special"><-</span> add var2/reg2 => <span class="Constant">"01/add-to %"</span> reg <span class="Constant">" "</span> reg2 <span class="Constant">"/r32"</span> +var/reg <span class="Special"><-</span> add var2 => <span class="Constant">"03/add *(ebp+"</span> var2.stack-offset <span class="Constant">") "</span> reg <span class="Constant">"/r32"</span> +var/reg <span class="Special"><-</span> add *var2/reg2 => <span class="Constant">"03/add *"</span> reg2 <span class="Constant">" "</span> reg <span class="Constant">"/r32"</span> +add-to var1, var2/reg => <span class="Constant">"01/add-to *(ebp+"</span> var1.stack-offset <span class="Constant">") "</span> reg <span class="Constant">"/r32"</span> +add-to *var1/reg1, var2/reg2 => <span class="Constant">"01/add-to *"</span> reg1 <span class="Constant">" "</span> reg2 <span class="Constant">"/r32"</span> +var/<span class="Constant">eax</span> <span class="Special"><-</span> add n => <span class="Constant">"05/add-to-eax "</span> n <span class="Constant">"/imm32"</span> +var/reg <span class="Special"><-</span> add n => <span class="Constant">"81 0/subop/add %"</span> reg <span class="Constant">" "</span> n <span class="Constant">"/imm32"</span> +add-to var, n => <span class="Constant">"81 0/subop/add *(ebp+"</span> var.stack-offset <span class="Constant">") "</span> n <span class="Constant">"/imm32"</span> +add-to *var/reg, n => <span class="Constant">"81 0/subop/add *"</span> reg <span class="Constant">" "</span> n <span class="Constant">"/imm32"</span> + +var/reg <span class="Special"><-</span> subtract var2/reg2 => <span class="Constant">"29/subtract-from %"</span> reg <span class="Constant">" "</span> reg2 <span class="Constant">"/r32"</span> +var/reg <span class="Special"><-</span> subtract var2 => <span class="Constant">"2b/subtract *(ebp+"</span> var2.stack-offset <span class="Constant">") "</span> reg <span class="Constant">"/r32"</span> +var/reg <span class="Special"><-</span> subtract *var2/reg2 => <span class="Constant">"2b/subtract *"</span> reg2 <span class="Constant">" "</span> reg1 <span class="Constant">"/r32"</span> +subtract-from var1, var2/reg2 => <span class="Constant">"29/subtract-from *(ebp+"</span> var1.stack-offset <span class="Constant">") "</span> reg2 <span class="Constant">"/r32"</span> +subtract-from *var1/reg1, var2/reg2 => <span class="Constant">"29/subtract-from *"</span> reg1 <span class="Constant">" "</span> reg2 <span class="Constant">"/r32"</span> +var/<span class="Constant">eax</span> <span class="Special"><-</span> subtract n => <span class="Constant">"2d/subtract-from-eax "</span> n <span class="Constant">"/imm32"</span> +var/reg <span class="Special"><-</span> subtract n => <span class="Constant">"81 5/subop/subtract %"</span> reg <span class="Constant">" "</span> n <span class="Constant">"/imm32"</span> +subtract-from var, n => <span class="Constant">"81 5/subop/subtract *(ebp+"</span> var.stack-offset <span class="Constant">") "</span> n <span class="Constant">"/imm32"</span> +subtract-from *var/reg, n => <span class="Constant">"81 5/subop/subtract *"</span> reg <span class="Constant">" "</span> n <span class="Constant">"/imm32"</span> + +var/reg <span class="Special"><-</span> and var2/reg2 => <span class="Constant">"21/and-with %"</span> reg <span class="Constant">" "</span> reg2 <span class="Constant">"/r32"</span> +var/reg <span class="Special"><-</span> and var2 => <span class="Constant">"23/and *(ebp+"</span> var2.stack-offset <span class="Constant">" "</span> reg <span class="Constant">"/r32"</span> +var/reg <span class="Special"><-</span> and *var2/reg2 => <span class="Constant">"23/and *"</span> reg2 <span class="Constant">" "</span> reg <span class="Constant">"/r32"</span> +and-with var1, var2/reg => <span class="Constant">"21/and-with *(ebp+"</span> var1.stack-offset <span class="Constant">") "</span> reg <span class="Constant">"/r32"</span> +and-with *var1/reg1, var2/reg2 => <span class="Constant">"21/and-with *"</span> reg1 <span class="Constant">" "</span> reg2 <span class="Constant">"/r32"</span> +var/<span class="Constant">eax</span> <span class="Special"><-</span> and n => <span class="Constant">"25/and-with-eax "</span> n <span class="Constant">"/imm32"</span> +var/reg <span class="Special"><-</span> and n => <span class="Constant">"81 4/subop/and %"</span> reg <span class="Constant">" "</span> n <span class="Constant">"/imm32"</span> +and-with var, n => <span class="Constant">"81 4/subop/and *(ebp+"</span> var.stack-offset <span class="Constant">") "</span> n <span class="Constant">"/imm32"</span> +and-with *var/reg, n => <span class="Constant">"81 4/subop/and *"</span> reg <span class="Constant">" "</span> n <span class="Constant">"/imm32"</span> + +var/reg <span class="Special"><-</span> or var2/reg2 => <span class="Constant">"09/or-with %"</span> reg <span class="Constant">" "</span> reg2 <span class="Constant">"/r32"</span> +var/reg <span class="Special"><-</span> or var2 => <span class="Constant">"0b/or *(ebp+"</span> var2.stack-offset <span class="Constant">") "</span> reg <span class="Constant">"/r32"</span> +var/reg <span class="Special"><-</span> or *var2/reg2 => <span class="Constant">"0b/or *"</span> reg2 <span class="Constant">" "</span> reg <span class="Constant">"/r32"</span> +or-with var1, var2/reg2 => <span class="Constant">"09/or-with *(ebp+"</span> var1.stack-offset <span class="Constant">" "</span> reg2 <span class="Constant">"/r32"</span> +or-with *var1/reg1, var2/reg2 => <span class="Constant">"09/or-with *"</span> reg1 <span class="Constant">" "</span> reg2 <span class="Constant">"/r32"</span> +var/<span class="Constant">eax</span> <span class="Special"><-</span> or n => <span class="Constant">"0d/or-with-eax "</span> n <span class="Constant">"/imm32"</span> +var/reg <span class="Special"><-</span> or n => <span class="Constant">"81 1/subop/or %"</span> reg <span class="Constant">" "</span> n <span class="Constant">"/imm32"</span> +or-with var, n => <span class="Constant">"81 1/subop/or *(ebp+"</span> var.stack-offset <span class="Constant">") "</span> n <span class="Constant">"/imm32"</span> +or-with *var/reg, n => <span class="Constant">"81 1/subop/or *"</span> reg <span class="Constant">" "</span> n <span class="Constant">"/imm32"</span> + +var/reg <span class="Special"><-</span> xor var2/reg2 => <span class="Constant">"31/xor-with %"</span> reg <span class="Constant">" "</span> reg2 <span class="Constant">"/r32"</span> +var/reg <span class="Special"><-</span> xor var2 => <span class="Constant">"33/xor *(ebp+"</span> var2.stack-offset <span class="Constant">") "</span> reg <span class="Constant">"/r32"</span> +var/reg <span class="Special"><-</span> xor *var2/reg2 => <span class="Constant">"33/xor *"</span> reg2 <span class="Constant">" "</span> reg <span class="Constant">"/r32"</span> +xor-with var1, var2/reg => <span class="Constant">"31/xor-with *(ebp+"</span> var1.stack-offset <span class="Constant">") "</span> reg <span class="Constant">"/r32"</span> +xor-with *var1/reg1, var2/reg2 => <span class="Constant">"31/xor-with *"</span> reg1 <span class="Constant">" "</span> reg2 <span class="Constant">"/r32"</span> +var/<span class="Constant">eax</span> <span class="Special"><-</span> xor n => <span class="Constant">"35/xor-with-eax "</span> n <span class="Constant">"/imm32"</span> +var/reg <span class="Special"><-</span> xor n => <span class="Constant">"81 6/subop/xor %"</span> reg <span class="Constant">" "</span> n <span class="Constant">"/imm32"</span> +xor-with var, n => <span class="Constant">"81 6/subop/xor *(ebp+"</span> var.stack-offset <span class="Constant">") "</span> n <span class="Constant">"/imm32"</span> +xor-with *var/reg, n => <span class="Constant">"81 6/subop/xor *"</span> reg <span class="Constant">" "</span> n <span class="Constant">"/imm32"</span> + +var/reg <span class="Special"><-</span> negate => <span class="Constant">"f7 3/subop/negate %"</span> reg +negate var => <span class="Constant">"f7 3/subop/negate *(ebp+"</span> var.stack-offset <span class="Constant">")"</span> +negate *var/reg => <span class="Constant">"f7 3/subop/negate *"</span> reg + +var/reg <span class="Special"><-</span> shift-left n => <span class="Constant">"c1/shift 4/subop/left %"</span> reg <span class="Constant">" "</span> n <span class="Constant">"/imm32"</span> +var/reg <span class="Special"><-</span> shift-right n => <span class="Constant">"c1/shift 5/subop/right %"</span> reg <span class="Constant">" "</span> n <span class="Constant">"/imm32"</span> +var/reg <span class="Special"><-</span> shift-right-signed n => <span class="Constant">"c1/shift 7/subop/right-signed %"</span> reg <span class="Constant">" "</span> n <span class="Constant">"/imm32"</span> +shift-left var, n => <span class="Constant">"c1/shift 4/subop/left *(ebp+"</span> var.stack-offset <span class="Constant">") "</span> n <span class="Constant">"/imm32"</span> +shift-left *var/reg, n => <span class="Constant">"c1/shift 4/subop/left *"</span> reg <span class="Constant">" "</span> n <span class="Constant">"/imm32"</span> +shift-right var, n => <span class="Constant">"c1/shift 5/subop/right *(ebp+"</span> var.stack-offset <span class="Constant">") "</span> n <span class="Constant">"/imm32"</span> +shift-right *var/reg, n => <span class="Constant">"c1/shift 5/subop/right *"</span> reg <span class="Constant">" "</span> n <span class="Constant">"/imm32"</span> +shift-right-signed var, n => <span class="Constant">"c1/shift 7/subop/right-signed *(ebp+"</span> var.stack-offset <span class="Constant">") "</span> n <span class="Constant">"/imm32"</span> +shift-right-signed *var/reg, n => <span class="Constant">"c1/shift 7/subop/right-signed *"</span> reg <span class="Constant">" "</span> n <span class="Constant">"/imm32"</span> + +var/<span class="Constant">eax</span> <span class="Special"><-</span> copy n => <span class="Constant">"b8/copy-to-eax "</span> n <span class="Constant">"/imm32"</span> +var/<span class="Constant">ecx</span> <span class="Special"><-</span> copy n => <span class="Constant">"b9/copy-to-ecx "</span> n <span class="Constant">"/imm32"</span> +var/<span class="Constant">edx</span> <span class="Special"><-</span> copy n => <span class="Constant">"ba/copy-to-edx "</span> n <span class="Constant">"/imm32"</span> +var/<span class="Constant">ebx</span> <span class="Special"><-</span> copy n => <span class="Constant">"bb/copy-to-ebx "</span> n <span class="Constant">"/imm32"</span> +var/<span class="Constant">esi</span> <span class="Special"><-</span> copy n => <span class="Constant">"be/copy-to-esi "</span> n <span class="Constant">"/imm32"</span> +var/<span class="Constant">edi</span> <span class="Special"><-</span> copy n => <span class="Constant">"bf/copy-to-edi "</span> n <span class="Constant">"/imm32"</span> +var/reg <span class="Special"><-</span> copy var2/reg2 => <span class="Constant">"89/<- %"</span> reg <span class="Constant">" "</span> reg2 <span class="Constant">"/r32"</span> +copy-to var1, var2/reg => <span class="Constant">"89/<- *(ebp+"</span> var1.stack-offset <span class="Constant">") "</span> reg <span class="Constant">"/r32"</span> +copy-to *var1/reg1, var2/reg2 => <span class="Constant">"89/<- *"</span> reg1 <span class="Constant">" "</span> reg2 <span class="Constant">"/r32"</span> +var/reg <span class="Special"><-</span> copy var2 => <span class="Constant">"8b/-> *(ebp+"</span> var2.stack-offset <span class="Constant">") "</span> reg <span class="Constant">"/r32"</span> +var/reg <span class="Special"><-</span> copy *var2/reg2 => <span class="Constant">"8b/-> *"</span> reg2 <span class="Constant">" "</span> reg <span class="Constant">"/r32"</span> +var/reg <span class="Special"><-</span> copy n => <span class="Constant">"c7 0/subop/copy %"</span> reg <span class="Constant">" "</span> n <span class="Constant">"/imm32"</span> +copy-to var, n => <span class="Constant">"c7 0/subop/copy *(ebp+"</span> var.stack-offset <span class="Constant">") "</span> n <span class="Constant">"/imm32"</span> +copy-to *var/reg, n => <span class="Constant">"c7 0/subop/copy *"</span> reg <span class="Constant">" "</span> n <span class="Constant">"/imm32"</span> + +var/reg <span class="Special"><-</span> copy-byte var2/reg2 => <span class="Constant">"8a/byte-> %"</span> reg2 <span class="Constant">" "</span> reg <span class="Constant">"/r32"</span> + <span class="Constant">"81 4/subop/and %"</span> reg <span class="Constant">" 0xff/imm32"</span> +var/reg <span class="Special"><-</span> copy-byte *var2/reg2 => <span class="Constant">"8a/byte-> *"</span> reg2 <span class="Constant">" "</span> reg <span class="Constant">"/r32"</span> + <span class="Constant">"81 4/subop/and %"</span> reg <span class="Constant">" 0xff/imm32"</span> +copy-byte-to *var1/reg1, var2/reg2 => <span class="Constant">"88/byte<- *"</span> reg1 <span class="Constant">" "</span> reg2 <span class="Constant">"/r32"</span> + +compare var1, var2/reg2 => <span class="Constant">"39/compare *(ebp+"</span> var1.stack-offset <span class="Constant">") "</span> reg2 <span class="Constant">"/r32"</span> +compare *var1/reg1, var2/reg2 => <span class="Constant">"39/compare *"</span> reg1 <span class="Constant">" "</span> reg2 <span class="Constant">"/r32"</span> +compare var1/reg1, var2 => <span class="Constant">"3b/compare<- *(ebp+"</span> var2.stack-offset <span class="Constant">") "</span> reg1 <span class="Constant">"/r32"</span> +compare var/reg, *var2/reg2 => <span class="Constant">"3b/compare<- *"</span> reg <span class="Constant">" "</span> n <span class="Constant">"/imm32"</span> +compare var/<span class="Constant">eax</span>, n => <span class="Constant">"3d/compare-eax-with "</span> n <span class="Constant">"/imm32"</span> +compare var/reg, n => <span class="Constant">"81 7/subop/compare %"</span> reg <span class="Constant">" "</span> n <span class="Constant">"/imm32"</span> +compare var, n => <span class="Constant">"81 7/subop/compare *(ebp+"</span> var.stack-offset <span class="Constant">") "</span> n <span class="Constant">"/imm32"</span> +compare *var/reg, n => <span class="Constant">"81 7/subop/compare *"</span> reg <span class="Constant">" "</span> n <span class="Constant">"/imm32"</span> + +var/reg <span class="Special"><-</span> multiply var2 => <span class="Constant">"0f af/multiply *(ebp+"</span> var2.stack-offset <span class="Constant">") "</span> reg <span class="Constant">"/r32"</span> +var/reg <span class="Special"><-</span> multiply var2/reg2 => <span class="Constant">"0f af/multiply %"</span> reg2 <span class="Constant">" "</span> reg <span class="Constant">"/r32"</span> +var/reg <span class="Special"><-</span> multiply *var2/reg2 => <span class="Constant">"0f af/multiply *"</span> reg2 <span class="Constant">" "</span> reg <span class="Constant">"/r32"</span> + +<span class="muComment">## Floating-point operations</span> + +These instructions operate on either floating-point registers (xreg) or +general-purpose registers (reg) in indirect mode. + +var/xreg <span class="Special"><-</span> add var2/xreg2 => <span class="Constant">"f3 0f 58/add %"</span> xreg2 <span class="Constant">" "</span> xreg1 <span class="Constant">"/x32"</span> +var/xreg <span class="Special"><-</span> add var2 => <span class="Constant">"f3 0f 58/add *(ebp+"</span> var2.stack-offset <span class="Constant">") "</span> xreg <span class="Constant">"/x32"</span> +var/xreg <span class="Special"><-</span> add *var2/reg2 => <span class="Constant">"f3 0f 58/add *"</span> reg2 <span class="Constant">" "</span> xreg <span class="Constant">"/x32"</span> + +var/xreg <span class="Special"><-</span> subtract var2/xreg2 => <span class="Constant">"f3 0f 5c/subtract %"</span> xreg2 <span class="Constant">" "</span> xreg1 <span class="Constant">"/x32"</span> +var/xreg <span class="Special"><-</span> subtract var2 => <span class="Constant">"f3 0f 5c/subtract *(ebp+"</span> var2.stack-offset <span class="Constant">") "</span> xreg <span class="Constant">"/x32"</span> +var/xreg <span class="Special"><-</span> subtract *var2/reg2 => <span class="Constant">"f3 0f 5c/subtract *"</span> reg2 <span class="Constant">" "</span> xreg <span class="Constant">"/x32"</span> + +var/xreg <span class="Special"><-</span> multiply var2/xreg2 => <span class="Constant">"f3 0f 59/multiply %"</span> xreg2 <span class="Constant">" "</span> xreg1 <span class="Constant">"/x32"</span> +var/xreg <span class="Special"><-</span> multiply var2 => <span class="Constant">"f3 0f 59/multiply *(ebp+"</span> var2.stack-offset <span class="Constant">") "</span> xreg <span class="Constant">"/x32"</span> +var/xreg <span class="Special"><-</span> multiply *var2/reg2 => <span class="Constant">"f3 0f 59/multiply *"</span> reg2 <span class="Constant">" "</span> xreg <span class="Constant">"/x32"</span> + +var/xreg <span class="Special"><-</span> divide var2/xreg2 => <span class="Constant">"f3 0f 5e/divide %"</span> xreg2 <span class="Constant">" "</span> xreg1 <span class="Constant">"/x32"</span> +var/xreg <span class="Special"><-</span> divide var2 => <span class="Constant">"f3 0f 5e/divide *(ebp+"</span> var2.stack-offset <span class="Constant">") "</span> xreg <span class="Constant">"/x32"</span> +var/xreg <span class="Special"><-</span> divide *var2/reg2 => <span class="Constant">"f3 0f 5e/divide *"</span> reg2 <span class="Constant">" "</span> xreg <span class="Constant">"/x32"</span> + +There are also some exclusively floating-point instructions: + +var/xreg <span class="Special"><-</span> reciprocal var2/xreg2 => <span class="Constant">"f3 0f 53/reciprocal %"</span> xreg2 <span class="Constant">" "</span> xreg1 <span class="Constant">"/x32"</span> +var/xreg <span class="Special"><-</span> reciprocal var2 => <span class="Constant">"f3 0f 53/reciprocal *(ebp+"</span> var2.stack-offset <span class="Constant">") "</span> xreg <span class="Constant">"/x32"</span> +var/xreg <span class="Special"><-</span> reciprocal *var2/reg2 => <span class="Constant">"f3 0f 53/reciprocal *"</span> reg2 <span class="Constant">" "</span> xreg <span class="Constant">"/x32"</span> + +var/xreg <span class="Special"><-</span> square-root var2/xreg2 => <span class="Constant">"f3 0f 51/square-root %"</span> xreg2 <span class="Constant">" "</span> xreg1 <span class="Constant">"/x32"</span> +var/xreg <span class="Special"><-</span> square-root var2 => <span class="Constant">"f3 0f 51/square-root *(ebp+"</span> var2.stack-offset <span class="Constant">") "</span> xreg <span class="Constant">"/x32"</span> +var/xreg <span class="Special"><-</span> square-root *var2/reg2 => <span class="Constant">"f3 0f 51/square-root *"</span> reg2 <span class="Constant">" "</span> xreg <span class="Constant">"/x32"</span> + +var/xreg <span class="Special"><-</span> inverse-square-root var2/xreg2 => <span class="Constant">"f3 0f 52/inverse-square-root %"</span> xreg2 <span class="Constant">" "</span> xreg1 <span class="Constant">"/x32"</span> +var/xreg <span class="Special"><-</span> inverse-square-root var2 => <span class="Constant">"f3 0f 52/inverse-square-root *(ebp+"</span> var2.stack-offset <span class="Constant">") "</span> xreg <span class="Constant">"/x32"</span> +var/xreg <span class="Special"><-</span> inverse-square-root *var2/reg2 => <span class="Constant">"f3 0f 52/inverse-square-root *"</span> reg2 <span class="Constant">" "</span> xreg <span class="Constant">"/x32"</span> + +var/xreg <span class="Special"><-</span> min var2/xreg2 => <span class="Constant">"f3 0f 5d/min %"</span> xreg2 <span class="Constant">" "</span> xreg1 <span class="Constant">"/x32"</span> +var/xreg <span class="Special"><-</span> min var2 => <span class="Constant">"f3 0f 5d/min *(ebp+"</span> var2.stack-offset <span class="Constant">") "</span> xreg <span class="Constant">"/x32"</span> +var/xreg <span class="Special"><-</span> min *var2/reg2 => <span class="Constant">"f3 0f 5d/min *"</span> reg2 <span class="Constant">" "</span> xreg <span class="Constant">"/x32"</span> + +var/xreg <span class="Special"><-</span> max var2/xreg2 => <span class="Constant">"f3 0f 5f/max %"</span> xreg2 <span class="Constant">" "</span> xreg1 <span class="Constant">"/x32"</span> +var/xreg <span class="Special"><-</span> max var2 => <span class="Constant">"f3 0f 5f/max *(ebp+"</span> var2.stack-offset <span class="Constant">") "</span> xreg <span class="Constant">"/x32"</span> +var/xreg <span class="Special"><-</span> max *var2/reg2 => <span class="Constant">"f3 0f 5f/max *"</span> reg2 <span class="Constant">" "</span> xreg <span class="Constant">"/x32"</span> + +Remember, when these instructions use indirect mode, they still use an integer +register. Floating-point registers can't hold addresses. + +Most instructions operate exclusively on integer or floating-point operands. +The only exceptions are the instructions for converting between integers and +floating-point numbers. + +var/xreg <span class="Special"><-</span> convert var2/reg2 => <span class="Constant">"f3 0f 2a/convert-to-float %"</span> reg2 <span class="Constant">" "</span> xreg <span class="Constant">"/x32"</span> +var/xreg <span class="Special"><-</span> convert var2 => <span class="Constant">"f3 0f 2a/convert-to-float *(ebp+"</span> var2.stack-offset <span class="Constant">") "</span> xreg <span class="Constant">"/x32"</span> +var/xreg <span class="Special"><-</span> convert *var2/reg2 => <span class="Constant">"f3 0f 2a/convert-to-float *"</span> reg2 <span class="Constant">" "</span> xreg <span class="Constant">"/x32"</span> + +Converting floats to ints performs rounding by default. (We don't mess with the +MXCSR control register.) + +var/reg <span class="Special"><-</span> convert var2/xreg2 => <span class="Constant">"f3 0f 2d/convert-to-int %"</span> xreg2 <span class="Constant">" "</span> reg <span class="Constant">"/r32"</span> +var/reg <span class="Special"><-</span> convert var2 => <span class="Constant">"f3 0f 2d/convert-to-int *(ebp+"</span> var2.stack-offset <span class="Constant">") "</span> reg <span class="Constant">"/r32"</span> +var/reg <span class="Special"><-</span> convert *var2/reg2 => <span class="Constant">"f3 0f 2d/convert-to-int *"</span> reg2 <span class="Constant">" "</span> reg <span class="Constant">"/r32"</span> + +There's a separate instruction for truncating the fractional part. + +var/reg <span class="Special"><-</span> truncate var2/xreg2 => <span class="Constant">"f3 0f 2c/truncate-to-int %"</span> xreg2 <span class="Constant">" "</span> reg <span class="Constant">"/r32"</span> +var/reg <span class="Special"><-</span> truncate var2 => <span class="Constant">"f3 0f 2c/truncate-to-int *(ebp+"</span> var2.stack-offset <span class="Constant">") "</span> reg <span class="Constant">"/r32"</span> +var/reg <span class="Special"><-</span> truncate *var2/reg2 => <span class="Constant">"f3 0f 2c/truncate-to-int *"</span> reg2 <span class="Constant">" "</span> reg <span class="Constant">"/r32"</span> + +There are no instructions accepting floating-point literals. To obtain integer +literals in floating-point registers, copy them to general-purpose registers +and then convert them to floating-point. + +One pattern you may have noticed above is that the floating-point instructions +above always write to registers. The only exceptions are `copy` instructions, +which can write to memory locations. + +var/xreg <span class="Special"><-</span> copy var2/xreg2 => <span class="Constant">"f3 0f 11/<- %"</span> xreg <span class="Constant">" "</span> xreg2 <span class="Constant">"/x32"</span> +copy-to var1, var2/xreg => <span class="Constant">"f3 0f 11/<- *(ebp+"</span> var1.stack-offset <span class="Constant">") "</span> xreg <span class="Constant">"/x32"</span> +var/xreg <span class="Special"><-</span> copy var2 => <span class="Constant">"f3 0f 10/-> *(ebp+"</span> var2.stack-offset <span class="Constant">") "</span> xreg <span class="Constant">"/x32"</span> +var/xreg <span class="Special"><-</span> copy *var2/reg2 => <span class="Constant">"f3 0f 10/-> *"</span> reg2 <span class="Constant">" "</span> xreg <span class="Constant">"/x32"</span> + +Comparisons must always start with a register: + +compare var1/xreg1, var2/xreg2 => <span class="Constant">"0f 2f/compare %"</span> xreg2 <span class="Constant">" "</span> xreg1 <span class="Constant">"/x32"</span> +compare var1/xreg1, var2 => <span class="Constant">"0f 2f/compare *(ebp+"</span> var2.stack-offset <span class="Constant">") "</span> xreg1 <span class="Constant">"/x32"</span> + +<span class="muComment">## Blocks</span> + +In themselves, blocks generate no instructions. However, if a block contains +variable declarations, they must be cleaned up when the block ends. + +Clean up var on the stack => <span class="Constant">"81 0/subop/add %esp "</span> size-of(var) <span class="Constant">"/imm32"</span> +Clean up var/reg => <span class="Constant">"8f 0/subop/pop %"</span> reg + +Clean up var/xreg => <span class="Constant">"f3 0f 10/-> *esp "</span> xreg <span class="Constant">"/x32"</span> + <span class="Constant">"81 0/subop/add %esp 4/imm32"</span> + +<span class="muComment">## Jumps</span> + +Besides having to clean up any variable declarations (see above) between +themselves and their target, jumps translate like this: + +<span class="PreProc">break</span> => <span class="Constant">"e9/jump break/disp32"</span> +<span class="PreProc">break</span> label => <span class="Constant">"e9/jump "</span> label <span class="Constant">":break/disp32"</span> +<span class="PreProc">loop</span> => <span class="Constant">"e9/jump loop/disp32"</span> +<span class="PreProc">loop</span> label => <span class="Constant">"e9/jump "</span> label <span class="Constant">":loop/disp32"</span> + +<span class="PreProc">break-if-=</span> => <span class="Constant">"0f 84/jump-if-= break/disp32"</span> +<span class="PreProc">break-if-=</span> label => <span class="Constant">"0f 84/jump-if-= "</span> label <span class="Constant">":break/disp32"</span> +<span class="PreProc">loop-if-=</span> => <span class="Constant">"0f 84/jump-if-= loop/disp32"</span> +<span class="PreProc">loop-if-=</span> label => <span class="Constant">"0f 84/jump-if-= "</span> label <span class="Constant">":loop/disp32"</span> + +<span class="PreProc">break-if-!=</span> => <span class="Constant">"0f 85/jump-if-!= break/disp32"</span> +<span class="PreProc">break-if-!=</span> label => <span class="Constant">"0f 85/jump-if-!= "</span> label <span class="Constant">":break/disp32"</span> +<span class="PreProc">loop-if-!=</span> => <span class="Constant">"0f 85/jump-if-!= loop/disp32"</span> +<span class="PreProc">loop-if-!=</span> label => <span class="Constant">"0f 85/jump-if-!= "</span> label <span class="Constant">":loop/disp32"</span> + +<span class="PreProc">break-if-<</span> => <span class="Constant">"0f 8c/jump-if-< break/disp32"</span> +<span class="PreProc">break-if-<</span> label => <span class="Constant">"0f 8c/jump-if-< "</span> label <span class="Constant">":break/disp32"</span> +<span class="PreProc">loop-if-<</span> => <span class="Constant">"0f 8c/jump-if-< loop/disp32"</span> +<span class="PreProc">loop-if-<</span> label => <span class="Constant">"0f 8c/jump-if-< "</span> label <span class="Constant">":loop/disp32"</span> + +<span class="PreProc">break-if-></span> => <span class="Constant">"0f 8f/jump-if-> break/disp32"</span> +<span class="PreProc">break-if-></span> label => <span class="Constant">"0f 8f/jump-if-> "</span> label <span class="Constant">":break/disp32"</span> +<span class="PreProc">loop-if-></span> => <span class="Constant">"0f 8f/jump-if-> loop/disp32"</span> +<span class="PreProc">loop-if-></span> label => <span class="Constant">"0f 8f/jump-if-> "</span> label <span class="Constant">":loop/disp32"</span> + +<span class="PreProc">break-if-<=</span> => <span class="Constant">"0f 8e/jump-if-<= break/disp32"</span> +<span class="PreProc">break-if-<=</span> label => <span class="Constant">"0f 8e/jump-if-<= "</span> label <span class="Constant">":break/disp32"</span> +<span class="PreProc">loop-if-<=</span> => <span class="Constant">"0f 8e/jump-if-<= loop/disp32"</span> +<span class="PreProc">loop-if-<=</span> label => <span class="Constant">"0f 8e/jump-if-<= "</span> label <span class="Constant">":loop/disp32"</span> + +<span class="PreProc">break-if->=</span> => <span class="Constant">"0f 8d/jump-if->= break/disp32"</span> +<span class="PreProc">break-if->=</span> label => <span class="Constant">"0f 8d/jump-if->= "</span> label <span class="Constant">":break/disp32"</span> +<span class="PreProc">loop-if->=</span> => <span class="Constant">"0f 8d/jump-if->= loop/disp32"</span> +<span class="PreProc">loop-if->=</span> label => <span class="Constant">"0f 8d/jump-if->= "</span> label <span class="Constant">":loop/disp32"</span> + +<span class="PreProc">break-if-addr<</span> => <span class="Constant">"0f 82/jump-if-addr< break/disp32"</span> +<span class="PreProc">break-if-addr<</span> label => <span class="Constant">"0f 82/jump-if-addr< "</span> label <span class="Constant">":break/disp32"</span> +<span class="PreProc">loop-if-addr<</span> => <span class="Constant">"0f 82/jump-if-addr< loop/disp32"</span> +<span class="PreProc">loop-if-addr<</span> label => <span class="Constant">"0f 82/jump-if-addr< "</span> label <span class="Constant">":loop/disp32"</span> + +<span class="PreProc">break-if-addr></span> => <span class="Constant">"0f 87/jump-if-addr> break/disp32"</span> +<span class="PreProc">break-if-addr></span> label => <span class="Constant">"0f 87/jump-if-addr> "</span> label <span class="Constant">":break/disp32"</span> +<span class="PreProc">loop-if-addr></span> => <span class="Constant">"0f 87/jump-if-addr> loop/disp32"</span> +<span class="PreProc">loop-if-addr></span> label => <span class="Constant">"0f 87/jump-if-addr> "</span> label <span class="Constant">":loop/disp32"</span> + +<span class="PreProc">break-if-addr<=</span> => <span class="Constant">"0f 86/jump-if-addr<= break/disp32"</span> +<span class="PreProc">break-if-addr<=</span> label => <span class="Constant">"0f 86/jump-if-addr<= "</span> label <span class="Constant">":break/disp32"</span> +<span class="PreProc">loop-if-addr<=</span> => <span class="Constant">"0f 86/jump-if-addr<= loop/disp32"</span> +<span class="PreProc">loop-if-addr<=</span> label => <span class="Constant">"0f 86/jump-if-addr<= "</span> label <span class="Constant">":loop/disp32"</span> + +<span class="PreProc">break-if-addr>=</span> => <span class="Constant">"0f 83/jump-if-addr>= break/disp32"</span> +<span class="PreProc">break-if-addr>=</span> label => <span class="Constant">"0f 83/jump-if-addr>= "</span> label <span class="Constant">":break/disp32"</span> +<span class="PreProc">loop-if-addr>=</span> => <span class="Constant">"0f 83/jump-if-addr>= loop/disp32"</span> +<span class="PreProc">loop-if-addr>=</span> label => <span class="Constant">"0f 83/jump-if-addr>= "</span> label <span class="Constant">":loop/disp32"</span> + +Similar float variants like `<span class="PreProc">break-if-float<`</span> are aliases for the corresponding +`addr` equivalents. The x86 instruction set stupidly has floating-point +operations only update a subset of flags. + +<span class="muComment">## Returns</span> + +The `<span class="PreProc">return</span>` instruction cleans up variable declarations just like an unconditional +`<span class="PreProc">jump</span>` to end of function, but also emits a series of copies before the final +`<span class="PreProc">jump</span>`, copying each argument of `<span class="PreProc">return</span>` to the register appropriate to the +respective function output. This doesn't work if a function output register +contains a later `<span class="PreProc">return</span>` argument (e.g. if the registers for two outputs are +swapped in `<span class="PreProc">return</span>`), so you can't do that. + +<span class="PreProc">return</span> => <span class="Constant">"c3/return"</span> + +--- + +In the following instructions types are provided for clarity even if they must +be provided in an earlier 'var' declaration. + +<span class="muComment"># Address operations</span> + +var/reg: (addr T) <span class="Special"><-</span> address var2: T + => <span class="Constant">"8d/copy-address *(ebp+"</span> var2.stack-offset <span class="Constant">") "</span> reg <span class="Constant">"/r32"</span> + +<span class="muComment"># Array operations</span> + +var/reg: (addr T) <span class="Special"><-</span> index arr/rega: (addr array T), idx/regi: int + | if size-of(T) is <span class="Constant">1</span>, <span class="Constant">2</span>, <span class="Constant">4</span> or <span class="Constant">8</span> + => <span class="Constant">"(__check-mu-array-bounds *"</span> rega <span class="Constant">" %"</span> regi <span class="Constant">" "</span> size-of(T) <span class="Constant">")"</span> + <span class="Constant">"8d/copy-address *("</span> rega <span class="Constant">"+"</span> regi <span class="Constant">"<<"</span> log2(size-of(T)) <span class="Constant">"+4) "</span> reg <span class="Constant">"/r32"</span> +var/reg: (addr T) <span class="Special"><-</span> index arr: (array T len), idx/regi: int + => <span class="Constant">"(__check-mu-array-bounds *(ebp+"</span> arr.stack-offset <span class="Constant">") %"</span> regi <span class="Constant">" "</span> size-of(T) <span class="Constant">")"</span> + <span class="Constant">"8d/copy-address *(ebp+"</span> regi <span class="Constant">"<<"</span> log2(size-of(T)) <span class="Constant">"+"</span> (arr.stack-offset + <span class="Constant">4</span>) <span class="Constant">") "</span> reg <span class="Constant">"/r32"</span> +var/reg: (addr T) <span class="Special"><-</span> index arr/rega: (addr array T), n + => <span class="Constant">"(__check-mu-array-bounds *"</span> rega <span class="Constant">" "</span> n <span class="Constant">" "</span> size-of(T) <span class="Constant">")"</span> + <span class="Constant">"8d/copy-address *("</span> rega <span class="Constant">"+"</span> (n*size-of(T)+<span class="Constant">4</span>) <span class="Constant">") "</span> reg <span class="Constant">"/r32"</span> +var/reg: (addr T) <span class="Special"><-</span> index arr: (array T len), n + => <span class="Constant">"(__check-mu-array-bounds *(ebp+"</span> arr.stack-offset <span class="Constant">") "</span> n <span class="Constant">" "</span> size-of(T) <span class="Constant">")"</span> + <span class="Constant">"8d/copy-address *(ebp+"</span> (arr.stack-offset+<span class="Constant">4</span>+n*size-of(T)) <span class="Constant">") "</span> reg <span class="Constant">"/r32"</span> + +var/reg: (offset T) <span class="Special"><-</span> compute-offset arr: (addr array T), idx/regi: int <span class="muComment"># arr can be in reg or mem</span> + => <span class="Constant">"69/multiply %"</span> regi <span class="Constant">" "</span> size-of(T) <span class="Constant">"/imm32 "</span> reg <span class="Constant">"/r32"</span> +var/reg: (offset T) <span class="Special"><-</span> compute-offset arr: (addr array T), idx: int <span class="muComment"># arr can be in reg or mem</span> + => <span class="Constant">"69/multiply *(ebp+"</span> idx.stack-offset <span class="Constant">") "</span> size-of(T) <span class="Constant">"/imm32 "</span> reg <span class="Constant">"/r32"</span> +var/reg: (addr T) <span class="Special"><-</span> index arr/rega: (addr array T), o/rego: (offset T) + => <span class="Constant">"(__check-mu-array-bounds %"</span> rega <span class="Constant">" %"</span> rego <span class="Constant">" 1 \"" function-name "</span>\<span class="Constant">")"</span> + <span class="Constant">"8d/copy-address *("</span> rega <span class="Constant">"+"</span> rego <span class="Constant">"+4) "</span> reg <span class="Constant">"/r32"</span> + +Computing the length of an array is complex. + +var/reg: int <span class="Special"><-</span> length arr/reg2: (addr array T) + | if T is byte (TODO) + => <span class="Constant">"8b/-> *"</span> reg2 <span class="Constant">" "</span> reg <span class="Constant">"/r32"</span> + | if size-of(T) is <span class="Constant">4</span> or <span class="Constant">8</span> or <span class="Constant">16</span> or <span class="Constant">32</span> or <span class="Constant">64</span> or <span class="Constant">128</span> + => <span class="Constant">"8b/-> *"</span> reg2 <span class="Constant">" "</span> reg <span class="Constant">"/r32"</span> + <span class="Constant">"c1/shift 5/subop/logic-right %"</span> reg <span class="Constant">" "</span> log2(size-of(T)) <span class="Constant">"/imm8"</span> + | otherwise + x86 has no instruction to divide by a literal, so + we need up to <span class="Constant">3</span> extra registers! <span class="Constant">eax</span>/<span class="Constant">edx</span> for division and say <span class="Constant">ecx</span> + => if reg is not <span class="Constant">eax</span> + <span class="Constant">"50/push-eax"</span> + if reg is not <span class="Constant">ecx</span> + <span class="Constant">"51/push-ecx"</span> + if reg is not <span class="Constant">edx</span> + <span class="Constant">"52/push-edx"</span> + <span class="Constant">"8b/-> *"</span> reg2 <span class="Constant">" eax/r32"</span> + <span class="Constant">"31/xor %edx 2/r32/edx"</span> <span class="muComment"># sign-extend, but array size can't be negative</span> + <span class="Constant">"b9/copy-to-ecx "</span> size-of(T) <span class="Constant">"/imm32"</span> + <span class="Constant">"f7 7/subop/idiv-eax-edx-by %ecx"</span> + if reg is not <span class="Constant">eax</span> + <span class="Constant">"89/<- %"</span> reg <span class="Constant">" 0/r32/eax"</span> + if reg is not <span class="Constant">edx</span> + <span class="Constant">"5a/pop-to-edx"</span> + if reg is not <span class="Constant">ecx</span> + <span class="Constant">"59/pop-to-ecx"</span> + if reg is not <span class="Constant">eax</span> + <span class="Constant">"58/pop-to-eax"</span> + +<span class="muComment"># User-defined types</span> + +If a record (product) <span class="PreProc">type</span> T was defined to have elements a, b, c, ... of +types T_a, T_b, T_c, ..., then accessing one of those elements f of <span class="PreProc">type</span> T_f: + +var/reg: (addr T_f) <span class="Special"><-</span> get var2/reg2: (addr T), f + => <span class="Constant">"8d/copy-address *("</span> reg2 <span class="Constant">"+"</span> offset(f) <span class="Constant">") "</span> reg <span class="Constant">"/r32"</span> +var/reg: (addr T_f) <span class="Special"><-</span> get var2: T, f + => <span class="Constant">"8d/copy-address *(ebp+"</span> var2.stack-offset <span class="Constant">"+"</span> offset(f) <span class="Constant">") "</span> reg <span class="Constant">"/r32"</span> + +<span class="muComment"># Allocating memory</span> + +allocate in: (addr handle T) + => <span class="Constant">"(allocate Heap "</span> size-of(T) <span class="Constant">" "</span> in <span class="Constant">")"</span> + +populate in: (addr handle array T), num <span class="muComment"># can be literal or variable on stack or register</span> + => <span class="Constant">"(allocate-array2 Heap "</span> size-of(T) <span class="Constant">" "</span> num <span class="Constant">" "</span> in <span class="Constant">")"</span> + +populate-stream in: (addr handle stream T), num <span class="muComment"># can be literal or variable on stack or register</span> + => <span class="Constant">"(new-stream Heap "</span> size-of(T) <span class="Constant">" "</span> num <span class="Constant">" "</span> in <span class="Constant">")"</span> + +<span class="muComment"># Some miscellaneous helpers to avoid error-prone size computations</span> + +clear x: (addr T) + => <span class="Constant">"(zero-out "</span> s <span class="Constant">" "</span> size-of(T) <span class="Constant">")"</span> + +read-from-stream s: (addr stream T), out: (addr T) + => <span class="Constant">"(read-from-stream "</span> s <span class="Constant">" "</span> out <span class="Constant">" "</span> size-of(T) <span class="Constant">")"</span> + +write-to-stream s: (addr stream T), in: (addr T) + => <span class="Constant">"(write-to-stream "</span> s <span class="Constant">" "</span> in <span class="Constant">" "</span> size-of(T) <span class="Constant">")"</span> + +vim:ft=mu:nowrap:textwidth=<span class="Constant">0</span> +</pre> +</body> +</html> +<!-- vim: set foldmethod=manual : --> |