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authorKartik K. Agaram <vc@akkartik.com>2017-10-14 22:53:18 -0700
committerKartik K. Agaram <vc@akkartik.com>2017-10-14 23:00:05 -0700
commitc67ca4b92674620f3cae3b9301471e0321a7936c (patch)
treefb471c4ae56d38f6731d913b1450eec025ae7351 /html/subx/012indirect_addressing.cc.html
parent0cb3c774b207c8a94bf9f9775e99e7d593d1e4fe (diff)
downloadmu-c67ca4b92674620f3cae3b9301471e0321a7936c.tar.gz
4065
subx: 'compare'

Hopefully I've implemented the 'sense' of comparisons right..
Diffstat (limited to 'html/subx/012indirect_addressing.cc.html')
-rw-r--r--html/subx/012indirect_addressing.cc.html80
1 files changed, 80 insertions, 0 deletions
diff --git a/html/subx/012indirect_addressing.cc.html b/html/subx/012indirect_addressing.cc.html
index c6b76529..72211ce3 100644
--- a/html/subx/012indirect_addressing.cc.html
+++ b/html/subx/012indirect_addressing.cc.html
@@ -256,6 +256,86 @@ if ('onhashchange' in window) {
 <span id="L192" class="LineNr">192 </span><span class="traceContains">+run: 'not' of effective address</span>
 <span id="L193" class="LineNr">193 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 3)</span>
 <span id="L194" class="LineNr">194 </span><span class="traceContains">+run: storing 0xf0f0ff00</span>
+<span id="L195" class="LineNr">195 </span>
+<span id="L196" class="LineNr">196 </span><span class="SalientComment">//:: compare</span>
+<span id="L197" class="LineNr">197 </span>
+<span id="L198" class="LineNr">198 </span><span class="Delimiter">:(scenario compare_mem_at_r32_with_r32_greater)</span>
+<span id="L199" class="LineNr">199 </span><span class="Special">% Reg[0].i = 0x60;</span>
+<span id="L200" class="LineNr">200 </span><span class="Special">% SET_WORD_IN_MEM(0x60, 0x0a0b0c0d);</span>
+<span id="L201" class="LineNr">201 </span><span class="Special">% Reg[3].i = 0x0a0b0c07;</span>
+<span id="L202" class="LineNr">202 </span><span class="Comment"># op  ModRM   SIB   displacement  immediate</span>
+<span id="L203" class="LineNr">203 </span>  <span class="Constant">39</span>  <span class="Constant">18</span>                                      <span class="Comment"># compare EBX (reg 3) with *EAX (reg 0)</span>
+<span id="L204" class="LineNr">204 </span><span class="traceContains">+run: compare <a href='010core.cc.html#L15'>reg</a> 3 with effective address</span>
+<span id="L205" class="LineNr">205 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 0)</span>
+<span id="L206" class="LineNr">206 </span><span class="traceContains">+run: SF=0; ZF=0; OF=0</span>
+<span id="L207" class="LineNr">207 </span>
+<span id="L208" class="LineNr">208 </span><span class="Delimiter">:(scenario compare_mem_at_r32_with_r32_lesser)</span>
+<span id="L209" class="LineNr">209 </span><span class="Special">% Reg[0].i = 0x60;</span>
+<span id="L210" class="LineNr">210 </span><span class="Special">% SET_WORD_IN_MEM(0x60, 0x0a0b0c07);</span>
+<span id="L211" class="LineNr">211 </span><span class="Special">% Reg[3].i = 0x0a0b0c0d;</span>
+<span id="L212" class="LineNr">212 </span><span class="Comment"># op  ModRM   SIB   displacement  immediate</span>
+<span id="L213" class="LineNr">213 </span>  <span class="Constant">39</span>  <span class="Constant">18</span>                                      <span class="Comment"># compare EBX (reg 3) with *EAX (reg 0)</span>
+<span id="L214" class="LineNr">214 </span><span class="traceContains">+run: compare <a href='010core.cc.html#L15'>reg</a> 3 with effective address</span>
+<span id="L215" class="LineNr">215 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 0)</span>
+<span id="L216" class="LineNr">216 </span><span class="traceContains">+run: SF=1; ZF=0; OF=0</span>
+<span id="L217" class="LineNr">217 </span>
+<span id="L218" class="LineNr">218 </span><span class="Delimiter">:(scenario compare_mem_at_r32_with_r32_equal)</span>
+<span id="L219" class="LineNr">219 </span><span class="Special">% Reg[0].i = 0x60;</span>
+<span id="L220" class="LineNr">220 </span><span class="Special">% SET_WORD_IN_MEM(0x60, 0x0a0b0c0d);</span>
+<span id="L221" class="LineNr">221 </span><span class="Special">% Reg[3].i = 0x0a0b0c0d;</span>
+<span id="L222" class="LineNr">222 </span><span class="Comment"># op  ModRM   SIB   displacement  immediate</span>
+<span id="L223" class="LineNr">223 </span>  <span class="Constant">39</span>  <span class="Constant">18</span>                                      <span class="Comment"># compare EBX (reg 3) with *EAX (reg 0)</span>
+<span id="L224" class="LineNr">224 </span><span class="traceContains">+run: compare <a href='010core.cc.html#L15'>reg</a> 3 with effective address</span>
+<span id="L225" class="LineNr">225 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 0)</span>
+<span id="L226" class="LineNr">226 </span><span class="traceContains">+run: SF=0; ZF=1; OF=0</span>
+<span id="L227" class="LineNr">227 </span>
+<span id="L228" class="LineNr">228 </span><span class="Comment">//:</span>
+<span id="L229" class="LineNr">229 </span>
+<span id="L230" class="LineNr">230 </span><span class="Delimiter">:(scenario compare_r32_with_mem_at_r32_greater)</span>
+<span id="L231" class="LineNr">231 </span><span class="Special">% Reg[0].i = 0x60;</span>
+<span id="L232" class="LineNr">232 </span><span class="Special">% SET_WORD_IN_MEM(0x60, 0x0a0b0c07);</span>
+<span id="L233" class="LineNr">233 </span><span class="Special">% Reg[3].i = 0x0a0b0c0d;</span>
+<span id="L234" class="LineNr">234 </span><span class="Comment"># op  ModRM   SIB   displacement  immediate</span>
+<span id="L235" class="LineNr">235 </span>  3b  <span class="Constant">18</span>                                      <span class="Comment"># compare *EAX (reg 0) with EBX (reg 3)</span>
+<span id="L236" class="LineNr">236 </span><span class="traceContains">+run: compare effective address with <a href='010core.cc.html#L15'>reg</a> 3</span>
+<span id="L237" class="LineNr">237 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 0)</span>
+<span id="L238" class="LineNr">238 </span><span class="traceContains">+run: SF=0; ZF=0; OF=0</span>
+<span id="L239" class="LineNr">239 </span>
+<span id="L240" class="LineNr">240 </span><span class="Delimiter">:(before &quot;End Single-Byte Opcodes&quot;)</span>
+<span id="L241" class="LineNr">241 </span><span class="Normal">case</span> <span class="Constant">0x3b</span>: <span class="Delimiter">{</span>  <span class="Comment">// compare r/m32 with r32</span>
+<span id="L242" class="LineNr">242 </span>  <span class="Normal">uint8_t</span> modrm = <a href='010core.cc.html#L210'>next</a><span class="Delimiter">();</span>
+<span id="L243" class="LineNr">243 </span>  <span class="Normal">uint8_t</span> reg1 = <span class="Delimiter">(</span>modrm&gt;&gt;<span class="Constant">3</span><span class="Delimiter">)</span>&amp;<span class="Constant">0x7</span><span class="Delimiter">;</span>
+<span id="L244" class="LineNr">244 </span>  <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">&quot;run&quot;</span><span class="Delimiter">)</span> &lt;&lt; <span class="Constant">&quot;compare effective address with <a href='010core.cc.html#L15'>reg</a> &quot;</span> &lt;&lt; <a href='010core.cc.html#L228'>NUM</a><span class="Delimiter">(</span>reg1<span class="Delimiter">)</span> &lt;&lt; <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
+<span id="L245" class="LineNr">245 </span>  <span class="Normal">int32_t</span> arg1 = Reg[reg1]<span class="Delimiter">.</span><a href='010core.cc.html#L16'>i</a><span class="Delimiter">;</span>
+<span id="L246" class="LineNr">246 </span>  <span class="Normal">int32_t</span>* arg2 = <a href='011direct_addressing.cc.html#L26'>effective_address</a><span class="Delimiter">(</span>modrm<span class="Delimiter">);</span>
+<span id="L247" class="LineNr">247 </span>  <span class="Normal">int32_t</span> tmp1 = arg1 - *arg2<span class="Delimiter">;</span>
+<span id="L248" class="LineNr">248 </span>  SF = <span class="Delimiter">(</span>tmp1 &lt; <span class="Constant">0</span><span class="Delimiter">);</span>
+<span id="L249" class="LineNr">249 </span>  <a href='010core.cc.html#L30'>ZF</a> = <span class="Delimiter">(</span>tmp1 == <span class="Constant">0</span><span class="Delimiter">);</span>
+<span id="L250" class="LineNr">250 </span>  <span class="Normal">int64_t</span> tmp2 = arg1 - *arg2<span class="Delimiter">;</span>
+<span id="L251" class="LineNr">251 </span>  <a href='010core.cc.html#L31'>OF</a> = <span class="Delimiter">(</span>tmp1 != tmp2<span class="Delimiter">);</span>
+<span id="L252" class="LineNr">252 </span>  <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">&quot;run&quot;</span><span class="Delimiter">)</span> &lt;&lt; <span class="Constant">&quot;SF=&quot;</span> &lt;&lt; SF &lt;&lt; <span class="Constant">&quot;; ZF=&quot;</span> &lt;&lt; <a href='010core.cc.html#L30'>ZF</a> &lt;&lt; <span class="Constant">&quot;; OF=&quot;</span> &lt;&lt; <a href='010core.cc.html#L31'>OF</a> &lt;&lt; <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span>
+<span id="L253" class="LineNr">253 </span>  <span class="Identifier">break</span><span class="Delimiter">;</span>
+<span id="L254" class="LineNr">254 </span><span class="Delimiter">}</span>
+<span id="L255" class="LineNr">255 </span>
+<span id="L256" class="LineNr">256 </span><span class="Delimiter">:(scenario compare_r32_with_mem_at_r32_lesser)</span>
+<span id="L257" class="LineNr">257 </span><span class="Special">% Reg[0].i = 0x60;</span>
+<span id="L258" class="LineNr">258 </span><span class="Special">% SET_WORD_IN_MEM(0x60, 0x0a0b0c0d);</span>
+<span id="L259" class="LineNr">259 </span><span class="Special">% Reg[3].i = 0x0a0b0c07;</span>
+<span id="L260" class="LineNr">260 </span><span class="Comment"># op  ModRM   SIB   displacement  immediate</span>
+<span id="L261" class="LineNr">261 </span>  3b  <span class="Constant">18</span>                                      <span class="Comment"># compare *EAX (reg 0) with EBX (reg 3)</span>
+<span id="L262" class="LineNr">262 </span><span class="traceContains">+run: compare effective address with <a href='010core.cc.html#L15'>reg</a> 3</span>
+<span id="L263" class="LineNr">263 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 0)</span>
+<span id="L264" class="LineNr">264 </span><span class="traceContains">+run: SF=1; ZF=0; OF=0</span>
+<span id="L265" class="LineNr">265 </span>
+<span id="L266" class="LineNr">266 </span><span class="Delimiter">:(scenario compare_r32_with_mem_at_r32_equal)</span>
+<span id="L267" class="LineNr">267 </span><span class="Special">% Reg[0].i = 0x60;</span>
+<span id="L268" class="LineNr">268 </span><span class="Special">% SET_WORD_IN_MEM(0x60, 0x0a0b0c0d);</span>
+<span id="L269" class="LineNr">269 </span><span class="Special">% Reg[3].i = 0x0a0b0c0d;</span>
+<span id="L270" class="LineNr">270 </span><span class="Comment"># op  ModRM   SIB   displacement  immediate</span>
+<span id="L271" class="LineNr">271 </span>  3b  <span class="Constant">18</span>                                      <span class="Comment"># compare *EAX (reg 0) with EBX (reg 3)</span>
+<span id="L272" class="LineNr">272 </span><span class="traceContains">+run: compare effective address with <a href='010core.cc.html#L15'>reg</a> 3</span>
+<span id="L273" class="LineNr">273 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 0)</span>
+<span id="L274" class="LineNr">274 </span><span class="traceContains">+run: SF=0; ZF=1; OF=0</span>
 </pre>
 </body>
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