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authorKartik Agaram <vc@akkartik.com>2018-07-24 16:06:43 -0700
committerKartik Agaram <vc@akkartik.com>2018-07-24 16:06:43 -0700
commitd57d39cb3f867d6e33ffa8e4cdc7d0ca749cb75c (patch)
tree1800345f57b37202c18218a78b1bb21496460a0f /subx/010vm.cc
parent1faa9790960043f5fbad482cd4b2cf4a6c50efd8 (diff)
downloadmu-d57d39cb3f867d6e33ffa8e4cdc7d0ca749cb75c.tar.gz
4395
Diffstat (limited to 'subx/010vm.cc')
-rw-r--r--subx/010vm.cc6
1 files changed, 5 insertions, 1 deletions
diff --git a/subx/010vm.cc b/subx/010vm.cc
index 81a8c12b..d2f39e90 100644
--- a/subx/010vm.cc
+++ b/subx/010vm.cc
@@ -1,4 +1,8 @@
 //: Core data structures for simulating the SubX VM (subset of an x86 processor)
+//:
+//: At the lowest level ("level 1") of abstraction, SubX executes x86
+//: instructions provided in the form of an array of bytes, loaded into memory
+//: starting at a specific address.
 
 //:: registers
 //: assume segment registers are hard-coded to 0
@@ -32,7 +36,7 @@ cerr << "  registers\n";
 :(before "End Help Texts")
 put(Help, "registers",
   "SubX currently supports eight 32-bit integer registers: R0 to R7.\n"
-  "R4 contains the top of the stack.\n"
+  "R4 (ESP) contains the top of the stack.\n"
   "There's also a register for the address of the currently executing instruction. It is modified by jumps.\n"
   "Various instructions modify one or more of three 1-bit 'flag' registers, as a side-effect:\n"
   "- the sign flag (SF): usually set if an arithmetic result is negative, or reset if not.\n"