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authorKartik K. Agaram <vc@akkartik.com>2017-10-13 00:54:59 -0700
committerKartik K. Agaram <vc@akkartik.com>2017-10-13 00:54:59 -0700
commit280f5115465501464b2f7e9f4671f9e8f3b52147 (patch)
treeedf239245638eb309e63660ffea39af4ebff6962 /subx/011direct_addressing.cc
parent7a219c68bae6dbe214aec69a051015e851e32400 (diff)
downloadmu-280f5115465501464b2f7e9f4671f9e8f3b52147.tar.gz
4055
subx: Implement 'and' for the addressing modes we've built so far.
Diffstat (limited to 'subx/011direct_addressing.cc')
-rw-r--r--subx/011direct_addressing.cc21
1 files changed, 21 insertions, 0 deletions
diff --git a/subx/011direct_addressing.cc b/subx/011direct_addressing.cc
index 8d280784..de5e923a 100644
--- a/subx/011direct_addressing.cc
+++ b/subx/011direct_addressing.cc
@@ -62,3 +62,24 @@ case 0x29: {  // subtract r32 from r/m32
   BINARY_ARITHMETIC_OP(-, *arg1, Reg[arg2].i);
   break;
 }
+
+//:: and
+
+:(scenario and_r32_with_r32)
+% Reg[0].i = 0x0a0b0c0d;
+% Reg[3].i = 0x000000ff;
+# op  ModR/M  SIB   displacement  immediate
+  21  d8                                      # and EBX (reg 3) with destination EAX (reg 0)
++run: and reg 3 with effective address
++run: effective address is reg 0
++run: storing 0x0000000d
+
+:(before "End Single-Byte Opcodes")
+case 0x21: {  // and r32 with r/m32
+  uint8_t modrm = next();
+  uint8_t arg2 = (modrm>>3)&0x7;
+  trace(2, "run") << "and reg " << NUM(arg2) << " with effective address" << end();
+  int32_t* arg1 = effective_address(modrm);
+  BINARY_BITWISE_OP(&, *arg1, Reg[arg2].u);
+  break;
+}