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authorKartik Agaram <vc@akkartik.com>2018-07-27 10:15:03 -0700
committerKartik Agaram <vc@akkartik.com>2018-07-27 10:15:03 -0700
commit3f4bbe9e5fd1389720c7adb5577edf2dc01d51e9 (patch)
tree61d80e20e59be711010dd4a1665afedc8d9bb93a /subx/012direct_addressing.cc
parent667d21177b9d8fe3652710b818d13940b23511d7 (diff)
downloadmu-3f4bbe9e5fd1389720c7adb5577edf2dc01d51e9.tar.gz
4434
Key core data structures by hex bytes in text rather than opcode
numbers. Saves us round trips of having to parse and reparse strings,
and also allows us to more easily ignore unexpected non-hex words in
each transform. We'll use this ability next when we start inserting
labels.
Diffstat (limited to 'subx/012direct_addressing.cc')
-rw-r--r--subx/012direct_addressing.cc50
1 files changed, 25 insertions, 25 deletions
diff --git a/subx/012direct_addressing.cc b/subx/012direct_addressing.cc
index 601f7ab2..66d34195 100644
--- a/subx/012direct_addressing.cc
+++ b/subx/012direct_addressing.cc
@@ -1,7 +1,7 @@
 //: operating directly on a register
 
 :(before "End Initialize Op Names(name)")
-put(name, 0x01, "add r32 to rm32");
+put(name, "01", "add r32 to rm32");
 
 :(scenario add_r32_to_r32)
 % Reg[EAX].i = 0x10;
@@ -64,7 +64,7 @@ string rname(uint8_t r) {
 //:: subtract
 
 :(before "End Initialize Op Names(name)")
-put(name, 0x29, "subtract r32 from rm32");
+put(name, "29", "subtract r32 from rm32");
 
 :(scenario subtract_r32_from_r32)
 % Reg[EAX].i = 10;
@@ -90,7 +90,7 @@ case 0x29: {  // subtract r32 from r/m32
 //:: and
 
 :(before "End Initialize Op Names(name)")
-put(name, 0x21, "rm32 = bitwise AND of r32 with rm32");
+put(name, "21", "rm32 = bitwise AND of r32 with rm32");
 
 :(scenario and_r32_with_r32)
 % Reg[EAX].i = 0x0a0b0c0d;
@@ -116,7 +116,7 @@ case 0x21: {  // and r32 with r/m32
 //:: or
 
 :(before "End Initialize Op Names(name)")
-put(name, 0x09, "rm32 = bitwise OR of r32 with rm32");
+put(name, "09", "rm32 = bitwise OR of r32 with rm32");
 
 :(scenario or_r32_with_r32)
 % Reg[EAX].i = 0x0a0b0c0d;
@@ -142,7 +142,7 @@ case 0x09: {  // or r32 with r/m32
 //:: xor
 
 :(before "End Initialize Op Names(name)")
-put(name, 0x31, "rm32 = bitwise XOR of r32 with rm32");
+put(name, "31", "rm32 = bitwise XOR of r32 with rm32");
 
 :(scenario xor_r32_with_r32)
 % Reg[EAX].i = 0x0a0b0c0d;
@@ -168,7 +168,7 @@ case 0x31: {  // xor r32 with r/m32
 //:: not
 
 :(before "End Initialize Op Names(name)")
-put(name, 0xf7, "bitwise complement of rm32");
+put(name, "f7", "bitwise complement of rm32");
 
 :(scenario not_r32)
 % Reg[EBX].i = 0x0f0f00ff;
@@ -196,7 +196,7 @@ case 0xf7: {  // xor r32 with r/m32
 //:: compare (cmp)
 
 :(before "End Initialize Op Names(name)")
-put(name, 0x39, "set SF if rm32 < r32");
+put(name, "39", "set SF if rm32 < r32");
 
 :(scenario compare_r32_with_r32_greater)
 % Reg[EAX].i = 0x0a0b0c0d;
@@ -250,7 +250,7 @@ case 0x39: {  // set SF if r/m32 < r32
 //:: copy (mov)
 
 :(before "End Initialize Op Names(name)")
-put(name, 0x89, "copy r32 to rm32");
+put(name, "89", "copy r32 to rm32");
 
 :(scenario copy_r32_to_r32)
 % Reg[EBX].i = 0xaf;
@@ -276,7 +276,7 @@ case 0x89: {  // copy r32 to r/m32
 //:: xchg
 
 :(before "End Initialize Op Names(name)")
-put(name, 0x87, "swap the contents of r32 and rm32");
+put(name, "87", "swap the contents of r32 and rm32");
 
 :(scenario xchg_r32_with_r32)
 % Reg[EBX].i = 0xaf;
@@ -307,14 +307,14 @@ case 0x87: {  // exchange r32 with r/m32
 //:: push
 
 :(before "End Initialize Op Names(name)")
-put(name, 0x50, "push R0 (EAX) to stack");
-put(name, 0x51, "push R1 (ECX) to stack");
-put(name, 0x52, "push R2 (EDX) to stack");
-put(name, 0x53, "push R3 (EBX) to stack");
-put(name, 0x54, "push R4 (ESP) to stack");
-put(name, 0x55, "push R5 (EBP) to stack");
-put(name, 0x56, "push R6 (ESI) to stack");
-put(name, 0x57, "push R7 (EDI) to stack");
+put(name, "50", "push R0 (EAX) to stack");
+put(name, "51", "push R1 (ECX) to stack");
+put(name, "52", "push R2 (EDX) to stack");
+put(name, "53", "push R3 (EBX) to stack");
+put(name, "54", "push R4 (ESP) to stack");
+put(name, "55", "push R5 (EBP) to stack");
+put(name, "56", "push R6 (ESI) to stack");
+put(name, "57", "push R7 (EDI) to stack");
 
 :(scenario push_r32)
 % Reg[ESP].u = 0x64;
@@ -351,14 +351,14 @@ void push(uint32_t val) {
 //:: pop
 
 :(before "End Initialize Op Names(name)")
-put(name, 0x58, "pop top of stack to R0 (EAX)");
-put(name, 0x59, "pop top of stack to R1 (ECX)");
-put(name, 0x5a, "pop top of stack to R2 (EDX)");
-put(name, 0x5b, "pop top of stack to R3 (EBX)");
-put(name, 0x5c, "pop top of stack to R4 (ESP)");
-put(name, 0x5d, "pop top of stack to R5 (EBP)");
-put(name, 0x5e, "pop top of stack to R6 (ESI)");
-put(name, 0x5f, "pop top of stack to R7 (EDI)");
+put(name, "58", "pop top of stack to R0 (EAX)");
+put(name, "59", "pop top of stack to R1 (ECX)");
+put(name, "5a", "pop top of stack to R2 (EDX)");
+put(name, "5b", "pop top of stack to R3 (EBX)");
+put(name, "5c", "pop top of stack to R4 (ESP)");
+put(name, "5d", "pop top of stack to R5 (EBP)");
+put(name, "5e", "pop top of stack to R6 (ESI)");
+put(name, "5f", "pop top of stack to R7 (EDI)");
 
 :(scenario pop_r32)
 % Reg[ESP].u = 0x60;