4434

Key core data structures by hex bytes in text rather than opcode
numbers. Saves us round trips of having to parse and reparse strings,
and also allows us to more easily ignore unexpected non-hex words in
each transform. We'll use this ability next when we start inserting
labels.

1 files changed, 16 insertions, 16 deletions

diff --git a/subx/014immediate_addressing.cc b/subx/014immediate_addressing.cc
index 9a04215f..8c308a80 100644
--- a/subx/014immediate_addressing.cc
+++ b/subx/014immediate_addressing.cc
@@ -1,7 +1,7 @@
 //: instructions that (immediately) contain an argument to act with
 
 :(before "End Initialize Op Names(name)")
-put(name, 0x81, "combine rm32 with imm32 based on subop");
+put(name, "81", "combine rm32 with imm32 based on subop");
 
 :(scenario add_imm32_to_r32)
 % Reg[EBX].i = 1;
@@ -52,7 +52,7 @@ case 0x81: {  // combine imm32 with r/m32
 //:: subtract
 
 :(before "End Initialize Op Names(name)")
-put(name, 0x2d, "subtract imm32 from R0 (EAX)");
+put(name, "2d", "subtract imm32 from R0 (EAX)");
 
 :(scenario subtract_imm32_from_eax)
 % Reg[EAX].i = 0x0d0c0baa;
@@ -108,7 +108,7 @@ case 5: {
 //:: and
 
 :(before "End Initialize Op Names(name)")
-put(name, 0x25, "R0 = bitwise AND of imm32 with R0 (EAX)");
+put(name, "25", "R0 = bitwise AND of imm32 with R0 (EAX)");
 
 :(scenario and_imm32_with_eax)
 % Reg[EAX].i = 0xff;
@@ -164,7 +164,7 @@ case 4: {
 //:: or
 
 :(before "End Initialize Op Names(name)")
-put(name, 0x0d, "R0 = bitwise OR of imm32 with R0 (EAX)");
+put(name, "0d", "R0 = bitwise OR of imm32 with R0 (EAX)");
 
 :(scenario or_imm32_with_eax)
 % Reg[EAX].i = 0xd0c0b0a0;
@@ -218,7 +218,7 @@ case 1: {
 //:: xor
 
 :(before "End Initialize Op Names(name)")
-put(name, 0x35, "R0 = bitwise XOR of imm32 with R0 (EAX)");
+put(name, "35", "R0 = bitwise XOR of imm32 with R0 (EAX)");
 
 :(scenario xor_imm32_with_eax)
 % Reg[EAX].i = 0xddccb0a0;
@@ -272,7 +272,7 @@ case 6: {
 //:: compare (cmp)
 
 :(before "End Initialize Op Names(name)")
-put(name, 0x3d, "subtract imm32 from R0 (EAX)");
+put(name, "3d", "subtract imm32 from R0 (EAX)");
 
 :(scenario compare_imm32_with_eax_greater)
 % Reg[EAX].i = 0x0d0c0b0a;
@@ -396,14 +396,14 @@ case 7: {
 //:: copy (mov)
 
 :(before "End Initialize Op Names(name)")
-put(name, 0xb8, "copy imm32 to R0 (EAX)");
-put(name, 0xb9, "copy imm32 to R1 (ECX)");
-put(name, 0xba, "copy imm32 to R2 (EDX)");
-put(name, 0xbb, "copy imm32 to R3 (EBX)");
-put(name, 0xbc, "copy imm32 to R4 (ESP)");
-put(name, 0xbd, "copy imm32 to R5 (EBP)");
-put(name, 0xbe, "copy imm32 to R6 (ESI)");
-put(name, 0xbf, "copy imm32 to R7 (EDI)");
+put(name, "b8", "copy imm32 to R0 (EAX)");
+put(name, "b9", "copy imm32 to R1 (ECX)");
+put(name, "ba", "copy imm32 to R2 (EDX)");
+put(name, "bb", "copy imm32 to R3 (EBX)");
+put(name, "bc", "copy imm32 to R4 (ESP)");
+put(name, "bd", "copy imm32 to R5 (EBP)");
+put(name, "be", "copy imm32 to R6 (ESI)");
+put(name, "bf", "copy imm32 to R7 (EDI)");
 
 :(scenario copy_imm32_to_r32)
 == 0x1
@@ -430,7 +430,7 @@ case 0xbf: {  // copy imm32 to r32
 //:
 
 :(before "End Initialize Op Names(name)")
-put(name, 0xc7, "copy imm32 to rm32");
+put(name, "c7", "copy imm32 to rm32");
 
 :(scenario copy_imm32_to_mem_at_r32)
 % Reg[EBX].i = 0x60;
@@ -454,7 +454,7 @@ case 0xc7: {  // copy imm32 to r32
 //:: push
 
 :(before "End Initialize Op Names(name)")
-put(name, 0x68, "push imm32 to stack");
+put(name, "68", "push imm32 to stack");
 
 :(scenario push_imm32)
 % Reg[ESP].u = 0x14;