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authorKartik K. Agaram <vc@akkartik.com>2018-01-24 12:59:14 -0800
committerKartik K. Agaram <vc@akkartik.com>2018-01-24 12:59:14 -0800
commit0cb988d0aed78773fe2c5eec3bc923794f629363 (patch)
tree69c06fc0f003b670aa8ba5c482448ada171f5b79 /subx/014index_addressing.cc
parentf7ff8585b9f4ecd6871fb1e3980be9fe6a4486fd (diff)
downloadmu-0cb988d0aed78773fe2c5eec3bc923794f629363.tar.gz
4185
Diffstat (limited to 'subx/014index_addressing.cc')
-rw-r--r--subx/014index_addressing.cc17
1 files changed, 11 insertions, 6 deletions
diff --git a/subx/014index_addressing.cc b/subx/014index_addressing.cc
index 389808d1..4deff72a 100644
--- a/subx/014index_addressing.cc
+++ b/subx/014index_addressing.cc
@@ -6,22 +6,27 @@
 % SET_WORD_IN_MEM(0x60, 1);
 # op  ModR/M  SIB   displacement  immediate
   01  1c      20                             # add EBX to *EAX
+# ModR/M in binary: 00 (indirect mode) 011 (src EBX) 000 (dest EAX)
 # SIB in binary: 00 (scale 1) 100 (no index) 000 (base EAX)
-# See Table 2-3 of the Intel programming manual.
 +run: add EBX to effective address
 +run: effective address is mem at address 0x60 (EAX)
 +run: storing 0x00000011
 
 :(before "End Mod 0 Special-cases")
-case 4:
-  // exception: SIB addressing
+case 4:  // exception: mod 0b00 rm 0b100 => incoming SIB (scale-index-base) byte
   uint8_t sib = next();
   uint8_t base = sib&0x7;
   if (base == EBP) {
-    // This gets complicated. In the example below, do the two disp8's accumulate? multiply? cancel out?!
+    // Need to sometimes use a displacement either in addition to or in place
+    // of EBP. This gets complicated, and I don't understand interactions with
+    // displacement mode in Mod/RM. For example:
+    //
     // op (hex)   ModR/M (binary)                     SIB (binary)                                      displacement (hex)
     // 0x01       01 100 /*SIB+disp8*/ 000 /*EAX*/    00 /*scale*/ 100 /*no index*/ 101 /*EBP+disp8*/   0xf0
     //
+    // Do the two disp8's accumulate (so the instruction has *two* disp8's)?
+    // multiply? cancel out?!
+    //
     // Maybe this is the answer:
     //   "When the ModR/M or SIB tables state that a disp value is required..
     //   then the displacement bytes are required."
@@ -43,15 +48,15 @@ case 4:
   }
   break;
 
-:(scenario add_r32_to_mem_at_base_plus_index)
+:(scenario add_r32_to_mem_at_base_r32_index_r32)
 % Reg[3].i = 0x10;  // source
 % Reg[0].i = 0x5e;  // dest base
 % Reg[1].i = 0x2;  // dest index
 % SET_WORD_IN_MEM(0x60, 1);
 # op  ModR/M  SIB   displacement  immediate
   01  1c      08                             # add EBX to *(EAX+ECX)
+# ModR/M in binary: 00 (indirect mode) 011 (src EBX) 000 (dest EAX)
 # SIB in binary: 00 (scale 1) 001 (index ECX) 000 (base EAX)
-# See Table 2-3 of the Intel programming manual.
 +run: add EBX to effective address
 +run: effective address is mem at address 0x60 (EAX + ECX*1)
 +run: storing 0x00000011