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authorKartik K. Agaram <vc@akkartik.com>2018-01-24 02:47:49 -0800
committerKartik K. Agaram <vc@akkartik.com>2018-01-24 02:47:49 -0800
commit3ecd66fb7c9aa444a5f195d60f8fc92f0c121fdd (patch)
tree56bfe2530d483ee35f22789cc6038721bb448fdc /subx/014index_addressing.cc
parent836d13dbc92c97cf529d6a51972be350e8ee1b2c (diff)
downloadmu-3ecd66fb7c9aa444a5f195d60f8fc92f0c121fdd.tar.gz
4183
Diffstat (limited to 'subx/014index_addressing.cc')
-rw-r--r--subx/014index_addressing.cc16
1 files changed, 8 insertions, 8 deletions
diff --git a/subx/014index_addressing.cc b/subx/014index_addressing.cc
index 1615e652..e489dba1 100644
--- a/subx/014index_addressing.cc
+++ b/subx/014index_addressing.cc
@@ -5,11 +5,11 @@
 % Reg[0].i = 0x60;
 % SET_WORD_IN_MEM(0x60, 1);
 # op  ModR/M  SIB   displacement  immediate
-  01  1c      20                             # add EBX (reg 3) to *EAX (reg 0)
+  01  1c      20                             # add EBX to *EAX
 # SIB in binary: 00 (scale 1) 100 (no index) 000 (base EAX)
 # See Table 2-3 of the Intel programming manual.
-+run: add reg 3 to effective address
-+run: effective address is mem at address 0x60 (reg 0)
++run: add EBX to effective address
++run: effective address is mem at address 0x60 (EAX)
 +run: storing 0x00000011
 
 :(before "End Mod 0 Special-cases")
@@ -20,13 +20,13 @@ case 4:
   uint8_t index = (sib>>3)&0x7;
   if (index == ESP) {
     // ignore index and scale
-    trace(2, "run") << "effective address is mem at address 0x" << std::hex << Reg[base].u << " (reg " << NUM(base) << ")" << end();
+    trace(2, "run") << "effective address is mem at address 0x" << std::hex << Reg[base].u << " (" << rname(base) << ")" << end();
     result = reinterpret_cast<int32_t*>(&Mem.at(Reg[base].u));
   }
   else {
     uint8_t scale = (1 << (sib>>6));
     uint32_t addr = Reg[base].u + Reg[index].u*scale;
-    trace(2, "run") << "effective address is mem at address 0x" << std::hex << addr << " (reg " << NUM(base) << " + reg " << NUM(index) << " * " << NUM(scale) << ")" << end();
+    trace(2, "run") << "effective address is mem at address 0x" << std::hex << addr << " (" << rname(base) << " + " << rname(index) << "*" << NUM(scale) << ")" << end();
     result = reinterpret_cast<int32_t*>(&Mem.at(addr));
   }
   break;
@@ -37,9 +37,9 @@ case 4:
 % Reg[1].i = 0x2;  // dest index
 % SET_WORD_IN_MEM(0x60, 1);
 # op  ModR/M  SIB   displacement  immediate
-  01  1c      08                             # add EBX (reg 3) to *(EAX+ECX)
+  01  1c      08                             # add EBX to *(EAX+ECX)
 # SIB in binary: 00 (scale 1) 001 (index ECX) 000 (base EAX)
 # See Table 2-3 of the Intel programming manual.
-+run: add reg 3 to effective address
-+run: effective address is mem at address 0x60 (reg 0 + reg 1 * 1)
++run: add EBX to effective address
++run: effective address is mem at address 0x60 (EAX + ECX*1)
 +run: storing 0x00000011