about summary refs log tree commit diff stats
path: root/subx/014indirect_addressing.cc
diff options
context:
space:
mode:
authorKartik Agaram <vc@akkartik.com>2018-10-13 23:41:03 -0700
committerKartik Agaram <vc@akkartik.com>2018-10-13 23:50:10 -0700
commitdc559a00c7592469e716a2baee963987fb34d4a9 (patch)
treefa67760d2da11104d81bef71567a1bd3b6f7b760 /subx/014indirect_addressing.cc
parent116e7730d7bcc79cfbb76aa24de142955fb4f281 (diff)
downloadmu-dc559a00c7592469e716a2baee963987fb34d4a9.tar.gz
4693
Add the standard mnemonic for each opcode.

We aren't ever going to have complete docs of the subset of the x86 ISA
we support, so we need to help readers cross-correlate with the complete
docs.
Diffstat (limited to 'subx/014indirect_addressing.cc')
-rw-r--r--subx/014indirect_addressing.cc18
1 files changed, 9 insertions, 9 deletions
diff --git a/subx/014indirect_addressing.cc b/subx/014indirect_addressing.cc
index 1e20cff5..8bcedbd3 100644
--- a/subx/014indirect_addressing.cc
+++ b/subx/014indirect_addressing.cc
@@ -28,7 +28,7 @@ case 0:  // indirect addressing
 //:
 
 :(before "End Initialize Op Names(name)")
-put(name, "03", "add rm32 to r32");
+put(name, "03", "add rm32 to r32 (add)");
 
 :(scenario add_mem_at_r32_to_r32)
 % Reg[EAX].i = 0x2000;
@@ -71,7 +71,7 @@ case 0x03: {  // add r/m32 to r32
 //:
 
 :(before "End Initialize Op Names(name)")
-put(name, "2b", "subtract rm32 from r32");
+put(name, "2b", "subtract rm32 from r32 (sub)");
 
 :(scenario subtract_mem_at_r32_from_r32)
 % Reg[EAX].i = 0x2000;
@@ -114,7 +114,7 @@ case 0x2b: {  // subtract r/m32 from r32
 //:
 
 :(before "End Initialize Op Names(name)")
-put(name, "23", "r32 = bitwise AND of r32 with rm32");
+put(name, "23", "r32 = bitwise AND of r32 with rm32 (and)");
 
 :(scenario and_mem_at_r32_with_r32)
 % Reg[EAX].i = 0x2000;
@@ -157,7 +157,7 @@ case 0x23: {  // and r/m32 with r32
 //:
 
 :(before "End Initialize Op Names(name)")
-put(name, "0b", "r32 = bitwise OR of r32 with rm32");
+put(name, "0b", "r32 = bitwise OR of r32 with rm32 (or)");
 
 :(scenario or_mem_at_r32_with_r32)
 % Reg[EAX].i = 0x2000;
@@ -200,7 +200,7 @@ case 0x0b: {  // or r/m32 with r32
 //:
 
 :(before "End Initialize Op Names(name)")
-put(name, "33", "r32 = bitwise XOR of r32 with rm32");
+put(name, "33", "r32 = bitwise XOR of r32 with rm32 (xor)");
 
 :(scenario xor_mem_at_r32_with_r32)
 % Reg[EAX].i = 0x2000;
@@ -284,7 +284,7 @@ ff 00 0f 0f  # 0x0f0f00ff
 //:
 
 :(before "End Initialize Op Names(name)")
-put(name, "3b", "compare: set SF if r32 < rm32");
+put(name, "3b", "compare: set SF if r32 < rm32 (cmp)");
 
 :(scenario compare_r32_with_mem_at_r32_greater)
 % Reg[EAX].i = 0x2000;
@@ -357,7 +357,7 @@ case 0x3b: {  // set SF if r32 < r/m32
 //:
 
 :(before "End Initialize Op Names(name)")
-put(name, "8b", "copy rm32 to r32");
+put(name, "8b", "copy rm32 to r32 (mov)");
 
 :(scenario copy_mem_at_r32_to_r32)
 % Reg[EAX].i = 0x2000;
@@ -437,7 +437,7 @@ case 6: {  // push r/m32 to stack
 //:: pop
 
 :(before "End Initialize Op Names(name)")
-put(name, "8f", "pop top of stack to rm32");
+put(name, "8f", "pop top of stack to rm32 (pop)");
 
 :(scenario pop_mem_at_r32)
 % Reg[EAX].i = 0x60;
@@ -581,7 +581,7 @@ case 2:  // indirect + disp32 addressing
 //:: lea
 
 :(before "End Initialize Op Names(name)")
-put(name, "8d", "load effective address of memory in rm32 into r32");
+put(name, "8d", "copy address in rm32 into r32 (lea)");
 
 :(scenario lea)
 % Reg[EAX].u = 0x2000;