4693

Add the standard mnemonic for each opcode.

We aren't ever going to have complete docs of the subset of the x86 ISA
we support, so we need to help readers cross-correlate with the complete
docs.

9 files changed, 89 insertions, 91 deletions

diff --git a/subx/010---vm.cc b/subx/010---vm.cc
index cae54aec..41d98b82 100644
--- a/subx/010---vm.cc
+++ b/subx/010---vm.cc
@@ -373,7 +373,7 @@ map</*op*/string, string> name_f3_0f;
 init_op_names();
 :(code)
 void init_op_names() {
-  put(name, "f4", "halt");
+  put(name, "f4", "halt (hlt)");
   // End Initialize Op Names(name)
 }
 
@@ -390,7 +390,8 @@ if (key == "opcodes") {
     cerr << "  f3 0f " << p->first << ": " << p->second << '\n';
   cerr << "Run `subx help instructions` for details on words like 'r32' and 'disp8'.\n"
           "For complete details on these instructions, consult the IA-32 manual (volume 2).\n"
-          "There's various versions of it online, such as https://c9x.me/x86.\n";
+          "There's various versions of it online, such as https://c9x.me/x86.\n"
+          "The mnemonics in brackets will help you locate each instruction.\n";
   return 0;
 }
 :(before "End Help Contents")
diff --git a/subx/011run.cc b/subx/011run.cc
index d5d1c074..6dc1a09b 100644
--- a/subx/011run.cc
+++ b/subx/011run.cc
@@ -327,7 +327,7 @@ void parse_and_load(const string& text_bytes) {
 //:: run
 
 :(before "End Initialize Op Names(name)")
-put(name, "05", "add imm32 to EAX");
+put(name, "05", "add imm32 to EAX (add)");
 
 //: our first opcode
 :(before "End Single-Byte Opcodes")
diff --git a/subx/013direct_addressing.cc b/subx/013direct_addressing.cc
index 2767f32b..71b869d2 100644
--- a/subx/013direct_addressing.cc
+++ b/subx/013direct_addressing.cc
@@ -1,7 +1,7 @@
 //: operating directly on a register
 
 :(before "End Initialize Op Names(name)")
-put(name, "01", "add r32 to rm32");
+put(name, "01", "add r32 to rm32 (add)");
 
 :(scenario add_r32_to_r32)
 % Reg[EAX].i = 0x10;
@@ -76,7 +76,7 @@ string rname(uint8_t r) {
 //:: subtract
 
 :(before "End Initialize Op Names(name)")
-put(name, "29", "subtract r32 from rm32");
+put(name, "29", "subtract r32 from rm32 (sub)");
 
 :(scenario subtract_r32_from_r32)
 % Reg[EAX].i = 10;
@@ -102,7 +102,7 @@ case 0x29: {  // subtract r32 from r/m32
 //:: multiply
 
 :(before "End Initialize Op Names(name)")
-put(name, "f7", "test/negate/mul/div rm32 (with EAX if necessary) depending on subop");
+put(name, "f7", "negate/multiply rm32 (with EAX if necessary) depending on subop (neg/mul)");
 
 :(scenario multiply_eax_by_r32)
 % Reg[EAX].i = 4;
@@ -143,7 +143,7 @@ case 0xf7: {  // xor r32 with r/m32
 //:
 
 :(before "End Initialize Op Names(name)")
-put(name_0f, "af", "multiply rm32 into r32");
+put(name_0f, "af", "multiply rm32 into r32 (imul)");
 
 :(scenario multiply_r32_into_r32)
 % Reg[EAX].i = 4;
@@ -169,7 +169,7 @@ case 0xaf: {  // multiply r32 into r/m32
 //:: and
 
 :(before "End Initialize Op Names(name)")
-put(name, "21", "rm32 = bitwise AND of r32 with rm32");
+put(name, "21", "rm32 = bitwise AND of r32 with rm32 (and)");
 
 :(scenario and_r32_with_r32)
 % Reg[EAX].i = 0x0a0b0c0d;
@@ -195,7 +195,7 @@ case 0x21: {  // and r32 with r/m32
 //:: or
 
 :(before "End Initialize Op Names(name)")
-put(name, "09", "rm32 = bitwise OR of r32 with rm32");
+put(name, "09", "rm32 = bitwise OR of r32 with rm32 (or)");
 
 :(scenario or_r32_with_r32)
 % Reg[EAX].i = 0x0a0b0c0d;
@@ -221,7 +221,7 @@ case 0x09: {  // or r32 with r/m32
 //:: xor
 
 :(before "End Initialize Op Names(name)")
-put(name, "31", "rm32 = bitwise XOR of r32 with rm32");
+put(name, "31", "rm32 = bitwise XOR of r32 with rm32 (xor)");
 
 :(scenario xor_r32_with_r32)
 % Reg[EAX].i = 0x0a0b0c0d;
@@ -246,9 +246,6 @@ case 0x31: {  // xor r32 with r/m32
 
 //:: not
 
-:(before "End Initialize Op Names(name)")
-put(name, "f7", "bitwise complement of rm32");
-
 :(scenario not_r32)
 % Reg[EBX].i = 0x0f0f00ff;
 == 0x1
@@ -274,7 +271,7 @@ case 2: {  // not r/m32
 //:: compare (cmp)
 
 :(before "End Initialize Op Names(name)")
-put(name, "39", "compare: set SF if rm32 < r32");
+put(name, "39", "compare: set SF if rm32 < r32 (cmp)");
 
 :(scenario compare_r32_with_r32_greater)
 % Reg[EAX].i = 0x0a0b0c0d;
@@ -328,7 +325,7 @@ case 0x39: {  // set SF if r/m32 < r32
 //:: copy (mov)
 
 :(before "End Initialize Op Names(name)")
-put(name, "89", "copy r32 to rm32");
+put(name, "89", "copy r32 to rm32 (mov)");
 
 :(scenario copy_r32_to_r32)
 % Reg[EBX].i = 0xaf;
@@ -354,7 +351,7 @@ case 0x89: {  // copy r32 to r/m32
 //:: xchg
 
 :(before "End Initialize Op Names(name)")
-put(name, "87", "swap the contents of r32 and rm32");
+put(name, "87", "swap the contents of r32 and rm32 (xchg)");
 
 :(scenario xchg_r32_with_r32)
 % Reg[EBX].i = 0xaf;
@@ -385,14 +382,14 @@ case 0x87: {  // exchange r32 with r/m32
 //:: increment
 
 :(before "End Initialize Op Names(name)")
-put(name, "40", "increment EAX");
-put(name, "41", "increment ECX");
-put(name, "42", "increment EDX");
-put(name, "43", "increment EBX");
-put(name, "44", "increment ESP");
-put(name, "45", "increment EBP");
-put(name, "46", "increment ESI");
-put(name, "47", "increment EDI");
+put(name, "40", "increment EAX (inc)");
+put(name, "41", "increment ECX (inc)");
+put(name, "42", "increment EDX (inc)");
+put(name, "43", "increment EBX (inc)");
+put(name, "44", "increment ESP (inc)");
+put(name, "45", "increment EBP (inc)");
+put(name, "46", "increment ESI (inc)");
+put(name, "47", "increment EDI (inc)");
 
 :(scenario increment_r32)
 % Reg[ECX].u = 0x1f;
@@ -419,7 +416,7 @@ case 0x47: {  // increment r32
 }
 
 :(before "End Initialize Op Names(name)")
-put(name, "ff", "inc/dec/jump/push/call rm32 based on subop");
+put(name, "ff", "increment/decrement/jump/push/call rm32 based on subop (inc/dec/jmp/push/call)");
 
 :(scenario increment_rm32)
 % Reg[EAX].u = 0x20;
@@ -451,14 +448,14 @@ case 0xff: {
 //:: decrement
 
 :(before "End Initialize Op Names(name)")
-put(name, "48", "decrement EAX");
-put(name, "49", "decrement ECX");
-put(name, "4a", "decrement EDX");
-put(name, "4b", "decrement EBX");
-put(name, "4c", "decrement ESP");
-put(name, "4d", "decrement EBP");
-put(name, "4e", "decrement ESI");
-put(name, "4f", "decrement EDI");
+put(name, "48", "decrement EAX (dec)");
+put(name, "49", "decrement ECX (dec)");
+put(name, "4a", "decrement EDX (dec)");
+put(name, "4b", "decrement EBX (dec)");
+put(name, "4c", "decrement ESP (dec)");
+put(name, "4d", "decrement EBP (dec)");
+put(name, "4e", "decrement ESI (dec)");
+put(name, "4f", "decrement EDI (dec)");
 
 :(scenario decrement_r32)
 % Reg[ECX].u = 0x1f;
@@ -506,14 +503,14 @@ case 1: {  // decrement r/m32
 //:: push
 
 :(before "End Initialize Op Names(name)")
-put(name, "50", "push EAX to stack");
-put(name, "51", "push ECX to stack");
-put(name, "52", "push EDX to stack");
-put(name, "53", "push EBX to stack");
-put(name, "54", "push ESP to stack");
-put(name, "55", "push EBP to stack");
-put(name, "56", "push ESI to stack");
-put(name, "57", "push EDI to stack");
+put(name, "50", "push EAX to stack (push)");
+put(name, "51", "push ECX to stack (push)");
+put(name, "52", "push EDX to stack (push)");
+put(name, "53", "push EBX to stack (push)");
+put(name, "54", "push ESP to stack (push)");
+put(name, "55", "push EBP to stack (push)");
+put(name, "56", "push ESI to stack (push)");
+put(name, "57", "push EDI to stack (push)");
 
 :(scenario push_r32)
 % Reg[ESP].u = 0x64;
@@ -544,14 +541,14 @@ case 0x57: {  // push r32 to stack
 //:: pop
 
 :(before "End Initialize Op Names(name)")
-put(name, "58", "pop top of stack to EAX");
-put(name, "59", "pop top of stack to ECX");
-put(name, "5a", "pop top of stack to EDX");
-put(name, "5b", "pop top of stack to EBX");
-put(name, "5c", "pop top of stack to ESP");
-put(name, "5d", "pop top of stack to EBP");
-put(name, "5e", "pop top of stack to ESI");
-put(name, "5f", "pop top of stack to EDI");
+put(name, "58", "pop top of stack to EAX (pop)");
+put(name, "59", "pop top of stack to ECX (pop)");
+put(name, "5a", "pop top of stack to EDX (pop)");
+put(name, "5b", "pop top of stack to EBX (pop)");
+put(name, "5c", "pop top of stack to ESP (pop)");
+put(name, "5d", "pop top of stack to EBP (pop)");
+put(name, "5e", "pop top of stack to ESI (pop)");
+put(name, "5f", "pop top of stack to EDI (pop)");
 
 :(scenario pop_r32)
 % Reg[ESP].u = 0x2000;
diff --git a/subx/014indirect_addressing.cc b/subx/014indirect_addressing.cc
index 1e20cff5..8bcedbd3 100644
--- a/subx/014indirect_addressing.cc
+++ b/subx/014indirect_addressing.cc
@@ -28,7 +28,7 @@ case 0:  // indirect addressing
 //:
 
 :(before "End Initialize Op Names(name)")
-put(name, "03", "add rm32 to r32");
+put(name, "03", "add rm32 to r32 (add)");
 
 :(scenario add_mem_at_r32_to_r32)
 % Reg[EAX].i = 0x2000;
@@ -71,7 +71,7 @@ case 0x03: {  // add r/m32 to r32
 //:
 
 :(before "End Initialize Op Names(name)")
-put(name, "2b", "subtract rm32 from r32");
+put(name, "2b", "subtract rm32 from r32 (sub)");
 
 :(scenario subtract_mem_at_r32_from_r32)
 % Reg[EAX].i = 0x2000;
@@ -114,7 +114,7 @@ case 0x2b: {  // subtract r/m32 from r32
 //:
 
 :(before "End Initialize Op Names(name)")
-put(name, "23", "r32 = bitwise AND of r32 with rm32");
+put(name, "23", "r32 = bitwise AND of r32 with rm32 (and)");
 
 :(scenario and_mem_at_r32_with_r32)
 % Reg[EAX].i = 0x2000;
@@ -157,7 +157,7 @@ case 0x23: {  // and r/m32 with r32
 //:
 
 :(before "End Initialize Op Names(name)")
-put(name, "0b", "r32 = bitwise OR of r32 with rm32");
+put(name, "0b", "r32 = bitwise OR of r32 with rm32 (or)");
 
 :(scenario or_mem_at_r32_with_r32)
 % Reg[EAX].i = 0x2000;
@@ -200,7 +200,7 @@ case 0x0b: {  // or r/m32 with r32
 //:
 
 :(before "End Initialize Op Names(name)")
-put(name, "33", "r32 = bitwise XOR of r32 with rm32");
+put(name, "33", "r32 = bitwise XOR of r32 with rm32 (xor)");
 
 :(scenario xor_mem_at_r32_with_r32)
 % Reg[EAX].i = 0x2000;
@@ -284,7 +284,7 @@ ff 00 0f 0f  # 0x0f0f00ff
 //:
 
 :(before "End Initialize Op Names(name)")
-put(name, "3b", "compare: set SF if r32 < rm32");
+put(name, "3b", "compare: set SF if r32 < rm32 (cmp)");
 
 :(scenario compare_r32_with_mem_at_r32_greater)
 % Reg[EAX].i = 0x2000;
@@ -357,7 +357,7 @@ case 0x3b: {  // set SF if r32 < r/m32
 //:
 
 :(before "End Initialize Op Names(name)")
-put(name, "8b", "copy rm32 to r32");
+put(name, "8b", "copy rm32 to r32 (mov)");
 
 :(scenario copy_mem_at_r32_to_r32)
 % Reg[EAX].i = 0x2000;
@@ -437,7 +437,7 @@ case 6: {  // push r/m32 to stack
 //:: pop
 
 :(before "End Initialize Op Names(name)")
-put(name, "8f", "pop top of stack to rm32");
+put(name, "8f", "pop top of stack to rm32 (pop)");
 
 :(scenario pop_mem_at_r32)
 % Reg[EAX].i = 0x60;
@@ -581,7 +581,7 @@ case 2:  // indirect + disp32 addressing
 //:: lea
 
 :(before "End Initialize Op Names(name)")
-put(name, "8d", "load effective address of memory in rm32 into r32");
+put(name, "8d", "copy address in rm32 into r32 (lea)");
 
 :(scenario lea)
 % Reg[EAX].u = 0x2000;
diff --git a/subx/015immediate_addressing.cc b/subx/015immediate_addressing.cc
index 7f1f1a7e..7e6c6e28 100644
--- a/subx/015immediate_addressing.cc
+++ b/subx/015immediate_addressing.cc
@@ -1,7 +1,7 @@
 //: instructions that (immediately) contain an argument to act with
 
 :(before "End Initialize Op Names(name)")
-put(name, "81", "combine rm32 with imm32 based on subop");
+put(name, "81", "combine rm32 with imm32 based on subop (add/sub/and/or/xor/cmp)");
 
 :(scenario add_imm32_to_r32)
 % Reg[EBX].i = 1;
@@ -55,7 +55,7 @@ case 0x81: {  // combine imm32 with r/m32
 //:: subtract
 
 :(before "End Initialize Op Names(name)")
-put(name, "2d", "subtract imm32 from EAX");
+put(name, "2d", "subtract imm32 from EAX (sub)");
 
 :(scenario subtract_imm32_from_eax)
 % Reg[EAX].i = 0x0d0c0baa;
@@ -113,7 +113,7 @@ case 5: {
 //:: and
 
 :(before "End Initialize Op Names(name)")
-put(name, "25", "EAX = bitwise AND of imm32 with EAX");
+put(name, "25", "EAX = bitwise AND of imm32 with EAX (and)");
 
 :(scenario and_imm32_with_eax)
 % Reg[EAX].i = 0xff;
@@ -171,7 +171,7 @@ case 4: {
 //:: or
 
 :(before "End Initialize Op Names(name)")
-put(name, "0d", "EAX = bitwise OR of imm32 with EAX");
+put(name, "0d", "EAX = bitwise OR of imm32 with EAX (or)");
 
 :(scenario or_imm32_with_eax)
 % Reg[EAX].i = 0xd0c0b0a0;
@@ -227,7 +227,7 @@ case 1: {
 //:: xor
 
 :(before "End Initialize Op Names(name)")
-put(name, "35", "EAX = bitwise XOR of imm32 with EAX");
+put(name, "35", "EAX = bitwise XOR of imm32 with EAX (xor)");
 
 :(scenario xor_imm32_with_eax)
 % Reg[EAX].i = 0xddccb0a0;
@@ -283,7 +283,7 @@ case 6: {
 //:: compare (cmp)
 
 :(before "End Initialize Op Names(name)")
-put(name, "3d", "compare: set SF if EAX < imm32");
+put(name, "3d", "compare: set SF if EAX < imm32 (cmp)");
 
 :(scenario compare_imm32_with_eax_greater)
 % Reg[EAX].i = 0x0d0c0b0a;
@@ -413,14 +413,14 @@ case 7: {
 //:: copy (mov)
 
 :(before "End Initialize Op Names(name)")
-put(name, "b8", "copy imm32 to EAX");
-put(name, "b9", "copy imm32 to ECX");
-put(name, "ba", "copy imm32 to EDX");
-put(name, "bb", "copy imm32 to EBX");
-put(name, "bc", "copy imm32 to ESP");
-put(name, "bd", "copy imm32 to EBP");
-put(name, "be", "copy imm32 to ESI");
-put(name, "bf", "copy imm32 to EDI");
+put(name, "b8", "copy imm32 to EAX (mov)");
+put(name, "b9", "copy imm32 to ECX (mov)");
+put(name, "ba", "copy imm32 to EDX (mov)");
+put(name, "bb", "copy imm32 to EBX (mov)");
+put(name, "bc", "copy imm32 to ESP (mov)");
+put(name, "bd", "copy imm32 to EBP (mov)");
+put(name, "be", "copy imm32 to ESI (mov)");
+put(name, "bf", "copy imm32 to EDI (mov)");
 
 :(scenario copy_imm32_to_r32)
 == 0x1
@@ -447,7 +447,7 @@ case 0xbf: {  // copy imm32 to r32
 //:
 
 :(before "End Initialize Op Names(name)")
-put(name, "c7", "copy imm32 to rm32");
+put(name, "c7", "copy imm32 to rm32 (mov)");
 
 :(scenario copy_imm32_to_mem_at_r32)
 % Reg[EBX].i = 0x60;
@@ -473,7 +473,7 @@ case 0xc7: {  // copy imm32 to r32
 //:: push
 
 :(before "End Initialize Op Names(name)")
-put(name, "68", "push imm32 to stack");
+put(name, "68", "push imm32 to stack (push)");
 
 :(scenario push_imm32)
 % Reg[ESP].u = 0x14;
diff --git a/subx/017jump_disp8.cc b/subx/017jump_disp8.cc
index b60d69b6..67dc6656 100644
--- a/subx/017jump_disp8.cc
+++ b/subx/017jump_disp8.cc
@@ -3,7 +3,7 @@
 //:: jump
 
 :(before "End Initialize Op Names(name)")
-put(name, "eb", "jump disp8 bytes away");
+put(name, "eb", "jump disp8 bytes away (jmp)");
 
 :(scenario jump_rel8)
 == 0x1
@@ -27,7 +27,7 @@ case 0xeb: {  // jump rel8
 //:: jump if equal/zero
 
 :(before "End Initialize Op Names(name)")
-put(name, "74", "jump disp8 bytes away if ZF is set");
+put(name, "74", "jump disp8 bytes away if equal, if ZF is set. (jcc/jz/je)");
 
 :(scenario je_rel8_success)
 % ZF = true;
@@ -66,7 +66,7 @@ case 0x74: {  // jump rel8 if ZF
 //:: jump if not equal/not zero
 
 :(before "End Initialize Op Names(name)")
-put(name, "75", "jump disp8 bytes away if ZF is not set");
+put(name, "75", "jump disp8 bytes away if not equal, if ZF is not set. (jcc/jnz/jne)");
 
 :(scenario jne_rel8_success)
 % ZF = false;
@@ -105,7 +105,7 @@ case 0x75: {  // jump rel8 unless ZF
 //:: jump if greater
 
 :(before "End Initialize Op Names(name)")
-put(name, "7f", "jump disp8 bytes away if greater (ZF is unset, SF == OF)");
+put(name, "7f", "jump disp8 bytes away if greater, if ZF is unset and SF == OF. (jcc/jg/jnle)");
 
 :(scenario jg_rel8_success)
 % ZF = false;
@@ -148,7 +148,7 @@ case 0x7f: {  // jump rel8 if !SF and !ZF
 //:: jump if greater or equal
 
 :(before "End Initialize Op Names(name)")
-put(name, "7d", "jump disp8 bytes away if greater or equal (SF == OF)");
+put(name, "7d", "jump disp8 bytes away if greater or equal, if SF == OF. (jcc/jge/jnl)");
 
 :(scenario jge_rel8_success)
 % SF = false;
@@ -189,7 +189,7 @@ case 0x7d: {  // jump rel8 if !SF
 //:: jump if lesser
 
 :(before "End Initialize Op Names(name)")
-put(name, "7c", "jump disp8 bytes away if lesser (SF != OF)");
+put(name, "7c", "jump disp8 bytes away if lesser, if SF != OF. (jcc/jl/jnge)");
 
 :(scenario jl_rel8_success)
 % ZF = false;
@@ -232,7 +232,7 @@ case 0x7c: {  // jump rel8 if SF and !ZF
 //:: jump if lesser or equal
 
 :(before "End Initialize Op Names(name)")
-put(name, "7e", "jump disp8 bytes away if lesser or equal (ZF is set or SF != OF)");
+put(name, "7e", "jump disp8 bytes away if lesser or equal, if ZF is set or SF != OF. (jcc/jle/jng)");
 
 :(scenario jle_rel8_equal)
 % ZF = true;
diff --git a/subx/018jump_disp16.cc b/subx/018jump_disp16.cc
index 7adb2321..b09c26b5 100644
--- a/subx/018jump_disp16.cc
+++ b/subx/018jump_disp16.cc
@@ -3,7 +3,7 @@
 //:: jump
 
 :(before "End Initialize Op Names(name)")
-put(name, "e9", "jump disp16 bytes away");
+put(name, "e9", "jump disp16 bytes away (jmp)");
 
 :(scenario jump_rel16)
 == 0x1
@@ -33,7 +33,7 @@ int16_t imm16() {
 //:: jump if equal/zero
 
 :(before "End Initialize Op Names(name)")
-put(name_0f, "84", "jump disp16 bytes away if ZF is set");
+put(name_0f, "84", "jump disp16 bytes away if equal, if ZF is set. (jcc/jz/je)");
 
 :(scenario je_rel16_success)
 % ZF = true;
@@ -72,7 +72,7 @@ case 0x84: {  // jump rel16 if ZF
 //:: jump if not equal/not zero
 
 :(before "End Initialize Op Names(name)")
-put(name_0f, "85", "jump disp16 bytes away if ZF is not set");
+put(name_0f, "85", "jump disp16 bytes away if not equal, if ZF is not set. (jcc/jnz/jne)");
 
 :(scenario jne_rel16_success)
 % ZF = false;
@@ -111,7 +111,7 @@ case 0x85: {  // jump rel16 unless ZF
 //:: jump if greater
 
 :(before "End Initialize Op Names(name)")
-put(name_0f, "8f", "jump disp16 bytes away if greater (ZF is unset, SF == OF)");
+put(name_0f, "8f", "jump disp16 bytes away if greater, if ZF is unset and SF == OF. (jcc/jg/jnle)");
 
 :(scenario jg_rel16_success)
 % ZF = false;
@@ -154,7 +154,7 @@ case 0x8f: {  // jump rel16 if !SF and !ZF
 //:: jump if greater or equal
 
 :(before "End Initialize Op Names(name)")
-put(name_0f, "8d", "jump disp16 bytes away if greater or equal (SF == OF)");
+put(name_0f, "8d", "jump disp16 bytes away if greater or equal, if SF == OF. (jcc/jge/jnl)");
 
 :(scenario jge_rel16_success)
 % SF = false;
@@ -195,7 +195,7 @@ case 0x8d: {  // jump rel16 if !SF
 //:: jump if lesser
 
 :(before "End Initialize Op Names(name)")
-put(name_0f, "8c", "jump disp16 bytes away if lesser (SF != OF)");
+put(name_0f, "8c", "jump disp16 bytes away if lesser, if SF != OF. (jcc/jl/jnge)");
 
 :(scenario jl_rel16_success)
 % ZF = false;
@@ -238,7 +238,7 @@ case 0x8c: {  // jump rel16 if SF and !ZF
 //:: jump if lesser or equal
 
 :(before "End Initialize Op Names(name)")
-put(name_0f, "8e", "jump disp16 bytes away if lesser or equal (ZF is set or SF != OF)");
+put(name_0f, "8e", "jump disp16 bytes away if lesser or equal, if ZF is set or SF != OF. (jcc/jle/jng)");
 
 :(scenario jle_rel16_equal)
 % ZF = true;
diff --git a/subx/019functions.cc b/subx/019functions.cc
index 09f4d690..a672dcfe 100644
--- a/subx/019functions.cc
+++ b/subx/019functions.cc
@@ -1,7 +1,7 @@
 //:: call
 
 :(before "End Initialize Op Names(name)")
-put(name, "e8", "call disp32");
+put(name, "e8", "call disp32 (call)");
 
 :(scenario call_disp32)
 % Reg[ESP].u = 0x64;
@@ -68,7 +68,7 @@ a0 00 00 00  # 0xa0
 //:: ret
 
 :(before "End Initialize Op Names(name)")
-put(name, "c3", "return from most recent unfinished call");
+put(name, "c3", "return from most recent unfinished call (ret)");
 
 :(scenario ret)
 % Reg[ESP].u = 0x2000;
diff --git a/subx/020syscalls.cc b/subx/020syscalls.cc
index d61693ca..673e38a3 100644
--- a/subx/020syscalls.cc
+++ b/subx/020syscalls.cc
@@ -1,5 +1,5 @@
 :(before "End Initialize Op Names(name)")
-put(name, "cd", "software interrupt");
+put(name, "cd", "software interrupt (int)");
 
 :(before "End Single-Byte Opcodes")
 case 0xcd: {  // int imm8 (software interrupt)