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| author | Kartik Agaram <vc@akkartik.com> | 2020-10-05 10:16:53 -0700 |
|---|---|---|
| committer | Kartik Agaram <vc@akkartik.com> | 2020-10-05 10:25:25 -0700 |
| commit | f13576b5d273ef9175e938b15f55bb1ead22fb1d (patch) | |
| tree | a54c4667e384a7eec44d0e5e7c2da687b670b7e9 /subx_opcodes | |
| parent | bb3ce6cdea12ff00b998c5a1c6dbf2c83dba77c2 (diff) | |
| download | mu-f13576b5d273ef9175e938b15f55bb1ead22fb1d.tar.gz | |
6957
The final fix to the raytracing program involves rounding modes. It turns out x86 processors round floats by default, unlike C which has trained me to expect truncation. Rather than mess with the MXCSR register, I added another instruction for truncation. Now milestone 3 emits perfectly correct results.
Diffstat (limited to 'subx_opcodes')
| -rw-r--r-- | subx_opcodes | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/subx_opcodes b/subx_opcodes index 75a42e3e..fe44527b 100644 --- a/subx_opcodes +++ b/subx_opcodes @@ -115,6 +115,7 @@ Opcodes currently supported by SubX: f3 0f 10: copy xm32 to x32 (movss) f3 0f 11: copy x32 to xm32 (movss) f3 0f 2a: convert integer to floating-point (cvtsi2ss) + f3 0f 2c: truncate floating-point to int (cvttss2si) f3 0f 2d: convert floating-point to int (cvtss2si) f3 0f 51: square root of float (sqrtss) f3 0f 52: inverse square root of float (rsqrtss) |