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+<pre id='vimCodeElement'>
+<span id="L1" class="LineNr"> 1 </span><span class="Comment">//: operating on memory at the address provided by some register</span>
+<span id="L2" class="LineNr"> 2 </span>
+<span id="L3" class="LineNr"> 3 </span><span class="Delimiter">:(scenario add_r32_to_mem_at_r32)</span>
+<span id="L4" class="LineNr"> 4 </span><span class="Special">% Reg[3].i = 0x10;</span>
+<span id="L5" class="LineNr"> 5 </span><span class="Special">% Reg[0].i = 0x60;</span>
+<span id="L6" class="LineNr"> 6 </span><span class="Comment"># word in addresses 0x60-0x63 has value 1</span>
+<span id="L7" class="LineNr"> 7 </span><span class="Special">% Mem.at(0x60) = 1;</span>
+<span id="L8" class="LineNr"> 8 </span><span class="Comment"># op  ModR/M  SIB   displacement  immediate</span>
+<span id="L9" class="LineNr"> 9 </span>  <span class="PreProc">0</span><span class="Constant">1</span>  <span class="Constant">18</span>                                     <span class="Comment"># add EBX (reg 3) to *EAX (reg 0)</span>
+<span id="L10" class="LineNr">10 </span><span class="traceContains">+run: add reg 3 to effective address</span>
+<span id="L11" class="LineNr">11 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 0)</span>
+<span id="L12" class="LineNr">12 </span><span class="traceContains">+run: storing 0x00000011</span>
+<span id="L13" class="LineNr">13 </span>
+<span id="L14" class="LineNr">14 </span><span class="Delimiter">:(before &quot;End Mod Special-cases&quot;)</span>
+<span id="L15" class="LineNr">15 </span><span class="Normal">case</span> <span class="Constant">0</span>:
+<span id="L16" class="LineNr">16 </span>  <span class="Comment">// mod 0 is usually indirect addressing</span>
+<span id="L17" class="LineNr">17 </span>  <span class="Normal">switch</span> <span class="Delimiter">(</span>rm<span class="Delimiter">)</span> <span class="Delimiter">{</span>
+<span id="L18" class="LineNr">18 </span>  <span class="Normal">default</span>:
+<span id="L19" class="LineNr">19 </span>  <span class="Conceal">¦</span> trace<span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">&quot;run&quot;</span><span class="Delimiter">)</span> &lt;&lt; <span class="Constant">&quot;effective address is mem at address 0x&quot;</span> &lt;&lt; std::hex &lt;&lt; Reg[rm]<span class="Delimiter">.</span>u &lt;&lt; <span class="Constant">&quot; (reg &quot;</span> &lt;&lt; NUM<span class="Delimiter">(</span>rm<span class="Delimiter">)</span> &lt;&lt; <span class="Constant">&quot;)&quot;</span> &lt;&lt; end<span class="Delimiter">();</span>
+<span id="L20" class="LineNr">20 </span>  <span class="Conceal">¦</span> assert<span class="Delimiter">(</span>Reg[rm]<span class="Delimiter">.</span>u + <span class="Normal">sizeof</span><span class="Delimiter">(</span><span class="Normal">int32_t</span><span class="Delimiter">)</span> &lt;= Mem<span class="Delimiter">.</span>size<span class="Delimiter">());</span>
+<span id="L21" class="LineNr">21 </span>  <span class="Conceal">¦</span> result = <span class="Normal">reinterpret_cast</span>&lt;<span class="Normal">int32_t</span>*&gt;<span class="Delimiter">(</span>&amp;Mem<span class="Delimiter">.</span>at<span class="Delimiter">(</span>Reg[rm]<span class="Delimiter">.</span>u<span class="Delimiter">));</span>  <span class="Comment">// rely on the host itself being in little-endian order</span>
+<span id="L22" class="LineNr">22 </span>  <span class="Conceal">¦</span> <span class="Identifier">break</span><span class="Delimiter">;</span>
+<span id="L23" class="LineNr">23 </span>  <span class="Comment">// End Mod 0 Special-cases</span>
+<span id="L24" class="LineNr">24 </span>  <span class="Delimiter">}</span>
+<span id="L25" class="LineNr">25 </span>  <span class="Identifier">break</span><span class="Delimiter">;</span>
+<span id="L26" class="LineNr">26 </span>
+<span id="L27" class="LineNr">27 </span><span class="Comment">//:</span>
+<span id="L28" class="LineNr">28 </span>
+<span id="L29" class="LineNr">29 </span><span class="Delimiter">:(scenario add_mem_at_r32_to_r32)</span>
+<span id="L30" class="LineNr">30 </span><span class="Special">% Reg[0].i = 0x60;</span>
+<span id="L31" class="LineNr">31 </span><span class="Special">% Reg[3].i = 0x10;</span>
+<span id="L32" class="LineNr">32 </span><span class="Special">% Mem.at(0x60) = 1;</span>
+<span id="L33" class="LineNr">33 </span><span class="Comment"># op  ModR/M  SIB   displacement  immediate</span>
+<span id="L34" class="LineNr">34 </span>  <span class="PreProc">0</span><span class="Constant">3</span>  <span class="Constant">18</span>                                      <span class="Comment"># add *EAX (reg 0) to EBX (reg 3)</span>
+<span id="L35" class="LineNr">35 </span><span class="traceContains">+run: add effective address to reg 3</span>
+<span id="L36" class="LineNr">36 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 0)</span>
+<span id="L37" class="LineNr">37 </span><span class="traceContains">+run: storing 0x00000011</span>
+<span id="L38" class="LineNr">38 </span>
+<span id="L39" class="LineNr">39 </span><span class="Delimiter">:(before &quot;End Single-Byte Opcodes&quot;)</span>
+<span id="L40" class="LineNr">40 </span><span class="Normal">case</span> <span class="Constant">0x03</span>: <span class="Delimiter">{</span>  <span class="Comment">// add r/m32 to r32</span>
+<span id="L41" class="LineNr">41 </span>  <span class="Normal">uint8_t</span> modrm = next<span class="Delimiter">();</span>
+<span id="L42" class="LineNr">42 </span>  <span class="Normal">uint8_t</span> arg1 = <span class="Delimiter">(</span>modrm&gt;&gt;<span class="Constant">3</span><span class="Delimiter">)</span>&amp;<span class="Constant">0x7</span><span class="Delimiter">;</span>
+<span id="L43" class="LineNr">43 </span>  trace<span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">&quot;run&quot;</span><span class="Delimiter">)</span> &lt;&lt; <span class="Constant">&quot;add effective address to reg &quot;</span> &lt;&lt; NUM<span class="Delimiter">(</span>arg1<span class="Delimiter">)</span> &lt;&lt; end<span class="Delimiter">();</span>
+<span id="L44" class="LineNr">44 </span>  <span class="Normal">const</span> <span class="Normal">int32_t</span>* arg2 = effective_address<span class="Delimiter">(</span>modrm<span class="Delimiter">);</span>
+<span id="L45" class="LineNr">45 </span>  BINARY_ARITHMETIC_OP<span class="Delimiter">(</span>+<span class="Delimiter">,</span> Reg[arg1]<span class="Delimiter">.</span>i<span class="Delimiter">,</span> *arg2<span class="Delimiter">);</span>
+<span id="L46" class="LineNr">46 </span>  <span class="Identifier">break</span><span class="Delimiter">;</span>
+<span id="L47" class="LineNr">47 </span><span class="Delimiter">}</span>
+<span id="L48" class="LineNr">48 </span>
+<span id="L49" class="LineNr">49 </span><span class="SalientComment">//:: subtract</span>
+<span id="L50" class="LineNr">50 </span>
+<span id="L51" class="LineNr">51 </span><span class="Delimiter">:(scenario sub_r32_from_mem_at_r32)</span>
+<span id="L52" class="LineNr">52 </span><span class="Special">% Reg[0].i = 0x60;</span>
+<span id="L53" class="LineNr">53 </span><span class="Special">% Mem.at(0x60) = 10;</span>
+<span id="L54" class="LineNr">54 </span><span class="Special">% Reg[3].i = 1;</span>
+<span id="L55" class="LineNr">55 </span><span class="Comment"># op  ModRM   SIB   displacement  immediate</span>
+<span id="L56" class="LineNr">56 </span>  <span class="Constant">29</span>  <span class="Constant">18</span>                                      <span class="Comment"># subtract EBX (reg 3) from *EAX (reg 0)</span>
+<span id="L57" class="LineNr">57 </span><span class="traceContains">+run: subtract reg 3 from effective address</span>
+<span id="L58" class="LineNr">58 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 0)</span>
+<span id="L59" class="LineNr">59 </span><span class="traceContains">+run: storing 0x00000009</span>
+<span id="L60" class="LineNr">60 </span>
+<span id="L61" class="LineNr">61 </span><span class="Comment">//:</span>
+<span id="L62" class="LineNr">62 </span>
+<span id="L63" class="LineNr">63 </span><span class="Delimiter">:(scenario sub_mem_at_r32_from_r32)</span>
+<span id="L64" class="LineNr">64 </span><span class="Special">% Reg[0].i = 0x60;</span>
+<span id="L65" class="LineNr">65 </span><span class="Special">% Mem.at(0x60) = 1;</span>
+<span id="L66" class="LineNr">66 </span><span class="Special">% Reg[3].i = 10;</span>
+<span id="L67" class="LineNr">67 </span><span class="Comment"># op  ModRM   SIB   displacement  immediate</span>
+<span id="L68" class="LineNr">68 </span>  2b  <span class="Constant">18</span>                                      <span class="Comment"># subtract *EAX (reg 0) from EBX (reg 3)</span>
+<span id="L69" class="LineNr">69 </span><span class="traceContains">+run: subtract effective address from reg 3</span>
+<span id="L70" class="LineNr">70 </span><span class="traceContains">+run: effective address is mem at address 0x60 (reg 0)</span>
+<span id="L71" class="LineNr">71 </span><span class="traceContains">+run: storing 0x00000009</span>
+<span id="L72" class="LineNr">72 </span>
+<span id="L73" class="LineNr">73 </span><span class="Delimiter">:(before &quot;End Single-Byte Opcodes&quot;)</span>
+<span id="L74" class="LineNr">74 </span><span class="Normal">case</span> <span class="Constant">0x2b</span>: <span class="Delimiter">{</span>  <span class="Comment">// subtract r/m32 from r32</span>
+<span id="L75" class="LineNr">75 </span>  <span class="Normal">uint8_t</span> modrm = next<span class="Delimiter">();</span>
+<span id="L76" class="LineNr">76 </span>  <span class="Normal">uint8_t</span> arg1 = <span class="Delimiter">(</span>modrm&gt;&gt;<span class="Constant">3</span><span class="Delimiter">)</span>&amp;<span class="Constant">0x7</span><span class="Delimiter">;</span>
+<span id="L77" class="LineNr">77 </span>  trace<span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">&quot;run&quot;</span><span class="Delimiter">)</span> &lt;&lt; <span class="Constant">&quot;subtract effective address from reg &quot;</span> &lt;&lt; NUM<span class="Delimiter">(</span>arg1<span class="Delimiter">)</span> &lt;&lt; end<span class="Delimiter">();</span>
+<span id="L78" class="LineNr">78 </span>  <span class="Normal">const</span> <span class="Normal">int32_t</span>* arg2 = effective_address<span class="Delimiter">(</span>modrm<span class="Delimiter">);</span>
+<span id="L79" class="LineNr">79 </span>  BINARY_ARITHMETIC_OP<span class="Delimiter">(</span>-<span class="Delimiter">,</span> Reg[arg1]<span class="Delimiter">.</span>i<span class="Delimiter">,</span> *arg2<span class="Delimiter">);</span>
+<span id="L80" class="LineNr">80 </span>  <span class="Identifier">break</span><span class="Delimiter">;</span>
+<span id="L81" class="LineNr">81 </span><span class="Delimiter">}</span>
+</pre>
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