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* 4059Kartik K. Agaram2017-10-133-242/+609
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* 4058Kartik K. Agaram2017-10-132-0/+38
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* 4057Kartik K. Agaram2017-10-133-0/+111
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* 4056Kartik K. Agaram2017-10-133-0/+111
| | | | subx: 'or'
* 4055Kartik K. Agaram2017-10-133-0/+105
| | | | subx: Implement 'and' for the addressing modes we've built so far.
* 4054Kartik K. Agaram2017-10-1210-371/+375
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* 4053Kartik K. Agaram2017-10-124-10/+10
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* 4052Kartik K. Agaram2017-10-1210-140/+1949
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* 4051Kartik K. Agaram2017-10-123-74/+74
| | | | subx: Move register direct mode before indirect in the exposition.
* 4050Kartik K. Agaram2017-10-121-0/+18
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* 4049Kartik K. Agaram2017-10-123-99/+101
| | | | Instead of organizing layers by instruction, do so by addressing mode.
* 4048Kartik K. Agaram2017-10-121-0/+22
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* 4047Kartik K. Agaram2017-10-121-0/+22
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* 4046Kartik K. Agaram2017-10-121-0/+12
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* 4045Kartik K. Agaram2017-10-121-3/+24
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* 4044Kartik K. Agaram2017-10-122-2/+18
| | | | subx: now starting on subtraction instructions.
* 4043Kartik K. Agaram2017-10-122-2/+25
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* 4042Kartik K. Agaram2017-10-121-4/+15
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* 4041Kartik K. Agaram2017-10-121-0/+4
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* 4040Kartik K. Agaram2017-10-122-3/+37
| | | | | | | subx: add immediate First example of a more complex opcode that needs to do its own decoding to decide what instruction to run.
* 4039Kartik K. Agaram2017-10-121-3/+3
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* 4038Kartik K. Agaram2017-10-122-8/+10
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* 4037Kartik K. Agaram2017-10-122-12/+15
| | | | Fix non-standard switch statement.
* 4036Kartik K. Agaram2017-10-121-6/+6
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* 4035Kartik K. Agaram2017-10-121-0/+3
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* 4034Kartik K. Agaram2017-10-123-0/+58
| | | | Start implementing core x86 addressing mode decoding.
* 4033Kartik K. Agaram2017-10-121-1/+0
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* 4032Kartik K. Agaram2017-10-121-13/+13
| | | | Consistent naming for the common terms 'register' and 'memory'.
* 4031Kartik K. Agaram2017-10-121-7/+7
| | | | | | No, go back to a vector for `Memory`. We need it to be contiguously laid out in memory so that we can write words all at once rather than a byte at a time.
* 4030Kartik K. Agaram2017-10-121-18/+53
| | | | Take control of hex byte parsing.
* 4029Kartik K. Agaram2017-10-121-25/+25
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* 4028Kartik K. Agaram2017-10-122-7/+7
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* 4027Kartik K. Agaram2017-10-121-0/+249
| | | | Hacky one-time html rendering for a single layer in subx.
* 4026Kartik K. Agaram2017-10-122-29/+35
| | | | | | | | | | Make memory a sparse map rather than contiguous vector. In the process, a bugfix for `load_program`: support multiple lines of comments. Also save a local copy of the x86 cheatsheet I've been using: https://net.cs.uni-bonn.de/fileadmin/user_upload/plohmann/x86_opcode_structure_and_instruction_overview.pdf
* 4025Kartik K. Agaram2017-10-111-0/+1
| | | | Fix CI.
* 4024 - attempt to get CI working for SubXKartik K. Agaram2017-10-111-0/+1
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* 4023Kartik K. Agaram2017-10-111-4/+4
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* 4022Kartik K. Agaram2017-10-111-2/+4
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* 4021Kartik K. Agaram2017-10-111-2/+2
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* 4020Kartik K. Agaram2017-10-111-0/+1
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* 4019Kartik K. Agaram2017-10-111-4/+4
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* 4018Kartik K. Agaram2017-10-111-3/+3
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* 4017Kartik K. Agaram2017-10-111-6/+6
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* 4016 - include subx/ tests in CIKartik K. Agaram2017-10-115-18/+32
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* 4015Kartik K. Agaram2017-10-112-6/+3
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* 4014 - core skeleton for x86 interpreterKartik K. Agaram2017-10-113-16/+180
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* 4013Kartik K. Agaram2017-10-113-4/+8
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* 4012Kartik K. Agaram2017-10-101-0/+6
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* 4011 - start of sub-x86 VMKartik K. Agaram2017-10-096-37/+44
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* 4010Kartik K. Agaram2017-10-042-31/+31
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