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* 4185Kartik K. Agaram2018-01-241-7/+17
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* 4183Kartik K. Agaram2018-01-241-49/+50
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* 4180Kartik K. Agaram2018-01-031-2/+7
| | | | Incomplete implementation of `xchg` since commit 4175.
* 4175Kartik K. Agaram2017-12-301-0/+21
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* 4084Kartik K. Agaram2017-10-181-12/+18
| | | | | subx: extract helpers for 'push' and 'pop'. We will be using them in 'call' and 'ret' as well.
* 4083Kartik K. Agaram2017-10-181-1/+30
| | | | subx: 'pop'
* 4082Kartik K. Agaram2017-10-181-1/+1
| | | | | subx: correct a 'copy' ('mov') instruction as well to get its operand right from the opcode.
* 4080Kartik K. Agaram2017-10-181-4/+10
| | | | | | | | subx: correct 'push' register. It gets its operand right from the opcode, not a new modrm byte. Have I misinterpreted any other instructions in this manner (`+rd` in the Intel manual)?
* 4079Kartik K. Agaram2017-10-181-0/+26
| | | | subx: 'pop'
* 4067Kartik K. Agaram2017-10-151-1/+22
| | | | subx: 'mov'
* 4066Kartik K. Agaram2017-10-141-1/+1
| | | | | | I spent a while spelunking into the code generated by C compilers before realizing that ignoring the order of arguments for 'cmp' instructions clarifies everything.
* 4065Kartik K. Agaram2017-10-141-0/+45
| | | | | | subx: 'compare' Hopefully I've implemented the 'sense' of comparisons right..
* 4058Kartik K. Agaram2017-10-131-0/+23
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* 4057Kartik K. Agaram2017-10-131-0/+21
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* 4056Kartik K. Agaram2017-10-131-0/+21
| | | | subx: 'or'
* 4055Kartik K. Agaram2017-10-131-0/+21
| | | | subx: Implement 'and' for the addressing modes we've built so far.
* 4051Kartik K. Agaram2017-10-121-0/+64
subx: Move register direct mode before indirect in the exposition.
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