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I've extracted it into a separate binary, independent of my Mu prototype.
I also cleaned up my tracing layer to be a little nicer. Major improvements:
- Realized that incremental tracing really ought to be the default.
And to minimize printing traces to screen.
- Finally figured out how to combine layers and call stack frames in a
single dimension of depth. The answer: optimize for the experience of
`browse_trace`. Instructions occupy a range of depths based on their call
stack frame, and minor details of an instruction lie one level deeper
in each case.
Other than that, I spent some time adjusting levels everywhere to make
`browse_trace` useful.
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In the process of building next-token I finally added some support for a
debugging situation I've found myself in a couple of times: wondering "what
changed this memory location"?
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New helper: printing a byte in textual (hex) form.
This required adding instructions for bitwise shift operations.
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Fix CI.
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Check for duplicate docstrings.
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Add the standard mnemonic for each opcode.
We aren't ever going to have complete docs of the subset of the x86 ISA
we support, so we need to help readers cross-correlate with the complete
docs.
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It now includes details for 8-bit registers. And we'll just use the classic
names for the registers so that the relationships between 8- and 32-bit
versions are more obvious.
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Now simulated 'Memory' isn't just a single flat array. Instead it knows
about segments and VMAs.
The code segment will always be first, and the data/heap segment will always
be second. The brk() syscall knows about the data segment.
One nice side-effect is that I no longer need to mess with Memory initialization
regardless of where I place my segments.
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Include LEA (load effective address) in the SubX subset of x86 ISA.
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Streamline the factorial function; we don't need to save a stack variable
into a register before operating on it. All instructions can take a stack
variable directly.
In the process we found two bugs:
a) Opcode f7 was not implemented correctly. It was internally consistent
but I'd never validated it against a natively running program. Turns out
it encodes multiple instructions, not just 'not'.
b) The way we look up imm32 operands was sometimes reading them before
disp8/disp32 operands.
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The new example ex9 doesn't yet work natively.
In the process I've emulated the kernel's role in providing args, implemented
a couple of instructions acting on 8-bit operands (useful for ASCII string
operations), and begun the start of the standard library (ascii_length
is the same as strlen).
At the level of SubX we're just only going to support ASCII.
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