| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | 4051 | Kartik K. Agaram | 2017-10-12 | 3 | -74/+74 |
| | | | | | subx: Move register direct mode before indirect in the exposition. | ||||
| * | 4050 | Kartik K. Agaram | 2017-10-12 | 1 | -0/+18 |
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| * | 4049 | Kartik K. Agaram | 2017-10-12 | 3 | -99/+101 |
| | | | | | Instead of organizing layers by instruction, do so by addressing mode. | ||||
| * | 4048 | Kartik K. Agaram | 2017-10-12 | 1 | -0/+22 |
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| * | 4047 | Kartik K. Agaram | 2017-10-12 | 1 | -0/+22 |
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| * | 4046 | Kartik K. Agaram | 2017-10-12 | 1 | -0/+12 |
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| * | 4045 | Kartik K. Agaram | 2017-10-12 | 1 | -3/+24 |
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| * | 4044 | Kartik K. Agaram | 2017-10-12 | 2 | -2/+18 |
| | | | | | subx: now starting on subtraction instructions. | ||||
| * | 4043 | Kartik K. Agaram | 2017-10-12 | 2 | -2/+25 |
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| * | 4042 | Kartik K. Agaram | 2017-10-12 | 1 | -4/+15 |
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| * | 4041 | Kartik K. Agaram | 2017-10-12 | 1 | -0/+4 |
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| * | 4040 | Kartik K. Agaram | 2017-10-12 | 2 | -3/+37 |
| | | | | | | | | subx: add immediate First example of a more complex opcode that needs to do its own decoding to decide what instruction to run. | ||||
| * | 4039 | Kartik K. Agaram | 2017-10-12 | 1 | -3/+3 |
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| * | 4038 | Kartik K. Agaram | 2017-10-12 | 2 | -8/+10 |
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| * | 4037 | Kartik K. Agaram | 2017-10-12 | 2 | -12/+15 |
| | | | | | Fix non-standard switch statement. | ||||
| * | 4036 | Kartik K. Agaram | 2017-10-12 | 1 | -6/+6 |
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| * | 4035 | Kartik K. Agaram | 2017-10-12 | 1 | -0/+3 |
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| * | 4034 | Kartik K. Agaram | 2017-10-12 | 3 | -0/+58 |
| | | | | | Start implementing core x86 addressing mode decoding. | ||||
| * | 4033 | Kartik K. Agaram | 2017-10-12 | 1 | -1/+0 |
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| * | 4032 | Kartik K. Agaram | 2017-10-12 | 1 | -13/+13 |
| | | | | | Consistent naming for the common terms 'register' and 'memory'. | ||||
| * | 4031 | Kartik K. Agaram | 2017-10-12 | 1 | -7/+7 |
| | | | | | | | No, go back to a vector for `Memory`. We need it to be contiguously laid out in memory so that we can write words all at once rather than a byte at a time. | ||||
| * | 4030 | Kartik K. Agaram | 2017-10-12 | 1 | -18/+53 |
| | | | | | Take control of hex byte parsing. | ||||
| * | 4029 | Kartik K. Agaram | 2017-10-12 | 1 | -25/+25 |
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| * | 4028 | Kartik K. Agaram | 2017-10-12 | 1 | -3/+3 |
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| * | 4026 | Kartik K. Agaram | 2017-10-12 | 2 | -29/+35 |
| | | | | | | | | | | | Make memory a sparse map rather than contiguous vector. In the process, a bugfix for `load_program`: support multiple lines of comments. Also save a local copy of the x86 cheatsheet I've been using: https://net.cs.uni-bonn.de/fileadmin/user_upload/plohmann/x86_opcode_structure_and_instruction_overview.pdf | ||||
| * | 4025 | Kartik K. Agaram | 2017-10-11 | 1 | -0/+1 |
| | | | | | Fix CI. | ||||
| * | 4024 - attempt to get CI working for SubX | Kartik K. Agaram | 2017-10-11 | 1 | -0/+1 |
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| * | 4023 | Kartik K. Agaram | 2017-10-11 | 1 | -4/+4 |
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| * | 4022 | Kartik K. Agaram | 2017-10-11 | 1 | -2/+4 |
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| * | 4021 | Kartik K. Agaram | 2017-10-11 | 1 | -2/+2 |
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| * | 4020 | Kartik K. Agaram | 2017-10-11 | 1 | -0/+1 |
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| * | 4019 | Kartik K. Agaram | 2017-10-11 | 1 | -4/+4 |
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| * | 4018 | Kartik K. Agaram | 2017-10-11 | 1 | -3/+3 |
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| * | 4017 | Kartik K. Agaram | 2017-10-11 | 1 | -6/+6 |
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| * | 4016 - include subx/ tests in CI | Kartik K. Agaram | 2017-10-11 | 3 | -0/+13 |
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| * | 4015 | Kartik K. Agaram | 2017-10-11 | 1 | -1/+1 |
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| * | 4014 - core skeleton for x86 interpreter | Kartik K. Agaram | 2017-10-11 | 3 | -16/+180 |
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| * | 4013 | Kartik K. Agaram | 2017-10-11 | 3 | -4/+8 |
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| * | 4012 | Kartik K. Agaram | 2017-10-10 | 1 | -0/+6 |
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| * | 4011 - start of sub-x86 VM | Kartik K. Agaram | 2017-10-09 | 6 | -37/+44 |
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| * | 3968 | Kartik K. Agaram | 2017-07-11 | 2 | -0/+68 |
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| * | 3930 - experimental bytecode interpreter | Kartik K. Agaram | 2017-06-19 | 8 | -0/+1108 |