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//: Everything this project/binary supports.
//: This should give you a sense for what to look forward to in later layers.

:(before "End Commandline Parsing")
if (argc <= 1 || is_equal(argv[1], "--help")) {
  // this is the functionality later layers will provide
  // currently no automated tests for commandline arg parsing
  if (argc <= 1) {
    cerr << "Please provide a Mu program to run.\n"
         << "\n";
  }
  cerr << "Usage:\n"
       << "  mu [options] [test] [files]\n"
       << "or:\n"
       << "  mu [options] [test] [files] -- [ingredients for function/recipe 'main']\n"
       << "Square brackets surround optional arguments.\n"
       << "\n"
       << "Examples:\n"
       << "  To load files and run 'main':\n"
       << "    mu file1.mu file2.mu ...\n"
       << "  To run all tests:\n"
       << "    mu test\n"
       << "  To load files and then run all tests:\n"
       << "    mu test file1.mu file2.mu ...\n"
       << "  To load files and run only the tests in explicitly loaded files (for apps):\n"
       << "    mu --test-only-app test file1.mu file2.mu ...\n"
       << "  To load all files with a numeric prefix in a directory:\n"
       << "    mu directory1 directory2 ...\n"
       << "  You can test directories just like files.\n"
       << "    mu test directory1 directory2 ...\n"
       << "  To pass ingredients to a mu program, provide them after '--':\n"
       << "    mu file_or_dir1 file_or_dir2 ... -- ingredient1 ingredient2 ...\n"
       << "\n"
       << "  To browse a trace generated by a previous run:\n"
       << "    mu browse-trace file\n"
       ;
  return 0;
}

//: Support for option parsing.
//: Options always begin with '--' and are always the first arguments. An
//: option will never follow a non-option.
:(before "End Commandline Parsing")
char** arg = &argv[1];
while (argc > 1 && starts_with(*arg, "--")) {
  if (false)
    ;  // no-op branch just so any further additions can consistently always start with 'else'
  // End Commandline Options(*arg)
  else
    cerr << "skipping unknown option " << *arg << '\n';
  --argc; ++argv; ++arg;
}

//:: Helper function used by the above fragment of code (and later layers too,
//:: who knows?).
//: The :(code) directive appends function definitions to the end of the
//: project. Regardless of where functions are defined, we can call them
//: anywhere we like as long as we format the function header in a specific
//: way: put it all on a single line without indent, end the line with ') {'
//: and no trailing whitespace. As long as functions uniformly start this
//: way, our makefile contains a little command to automatically generate
//: declarations for them.
:(code)
bool is_equal(char* s, const char* lit) {
  return strncmp(s, lit, strlen(lit)) == 0;
}

bool starts_with(const string& s, const string& pat) {
  return s.substr(0, pat.size()) == pat;
}

//: I'll throw some style conventions here for want of a better place for them.
//: As a rule I hate style guides. Do what you want, that's my motto. But since
//: we're dealing with C/C++, the one big thing we want to avoid is undefined
//: behavior. If a compiler ever encounters undefined behavior it can make
//: your program do anything it wants.
//:
//: For reference, my checklist of undefined behaviors to watch out for:
//:   out-of-bounds access
//:   uninitialized variables
//:   use after free
//:   dereferencing invalid pointers: null, a new of size 0, others
//:
//:   casting a large number to a type too small to hold it
//:
//:   integer overflow
//:   division by zero and other undefined expressions
//:   left-shift by negative count
//:   shifting values by more than or equal to the number of bits they contain
//:   bitwise operations on signed numbers
//:
//:   Converting pointers to types of different alignment requirements
//:     T* -> void* -> T*: defined
//:     T* -> U* -> T*: defined if non-function pointers and alignment requirements are same
//:     function pointers may be cast to other function pointers
//:
//:       Casting a numeric value into a value that can't be represented by the target type (either directly or via static_cast)
//:
//: To guard against these, some conventions:
//:
//: 0. Initialize all primitive variables in functions and constructors.
//:
//: 1. Minimize use of pointers and pointer arithmetic. Avoid 'new' and
//: 'delete' as far as possible. Rely on STL to perform memory management to
//: avoid use-after-free issues (and memory leaks).
//:
//: 2. Avoid naked arrays to avoid out-of-bounds access. Never use operator[]
//: except with map. Use at() with STL vectors and so on.
//:
//: 3. Valgrind all the things.
//:
//: 4. Avoid unsigned numbers. Not strictly an undefined-behavior issue, but
//: the extra range doesn't matter, and it's one less confusing category of
//: interaction gotchas to worry about.
//:
//: Corollary: don't use the size() method on containers, since it returns an
//: unsigned and that'll cause warnings about mixing signed and unsigned,
//: yadda-yadda. Instead use this macro below to perform an unsafe cast to
//: signed. We'll just give up immediately if a container's ever too large.
//: Basically, Mu is not concerned about this being a little slower than it
//: could be. (https://gist.github.com/rygorous/e0f055bfb74e3d5f0af20690759de5a7)
//:
//: Addendum to corollary: We're going to uniformly use int everywhere, to
//: indicate that we're oblivious to number size, and since Clang on 32-bit
//: platforms doesn't yet support multiplication over 64-bit integers, and
//: since multiplying two integers seems like a more common situation to end
//: up in than integer overflow.
:(before "End Includes")
#define SIZE(X) (assert((X).size() < (1LL<<(sizeof(int)*8-2))), static_cast<int>((X).size()))

//: 5. Integer overflow is guarded against at runtime using the -ftrapv flag
//: to the compiler, supported by Clang (GCC version only works sometimes:
//: http://stackoverflow.com/questions/20851061/how-to-make-gcc-ftrapv-work).
:(before "atexit(teardown)")
initialize_signal_handlers();  // not always necessary, but doesn't hurt
//? cerr << INT_MAX+1 << '\n';  // test overflow
//? assert(false);  // test SIGABRT
:(code)
// based on https://spin.atomicobject.com/2013/01/13/exceptions-stack-traces-c
void initialize_signal_handlers() {
  struct sigaction action;
  bzero(&action, sizeof(action));
  action.sa_sigaction = dump_and_exit;
  sigemptyset(&action.sa_mask);
  sigaction(SIGABRT, &action, NULL);  // assert() failure or integer overflow on linux (with -ftrapv)
  sigaction(SIGILL,  &action, NULL);  // integer overflow on OS X (with -ftrapv)
}
void dump_and_exit(int sig, unused siginfo_t* dummy1, unused void* dummy2) {
  switch (sig) {
    case SIGABRT:
      #ifndef __APPLE__
        cerr << "SIGABRT: might be an integer overflow if it wasn't an assert() failure\n";
        _Exit(1);
      #endif
      break;
    case SIGILL:
      #ifdef __APPLE__
        cerr << "SIGILL: most likely caused by integer overflow\n";
        _Exit(1);
      #endif
      break;
    default:
      break;
  }
}
:(before "End Includes")
#include <signal.h>

//: For good measure we'll also enable SIGFPE.
:(before "atexit(teardown)")
feenableexcept(FE_OVERFLOW | FE_UNDERFLOW);
//? assert(sizeof(int) == 4 && sizeof(float) == 4);
//? //                          | exp   |  mantissa
//? int smallest_subnormal = 0b00000000000000000000000000000001;
//? float smallest_subnormal_f = *reinterpret_cast<float*>(&smallest_subnormal);
//? cerr << "ε: " << smallest_subnormal_f << '\n';
//? cerr << "ε/2: " << smallest_subnormal_f/2 << " (underflow)\n";  // test SIGFPE
:(before "End Includes")
#include <fenv.h>
:(code)
#ifdef __APPLE__
// Public domain polyfill for feenableexcept on OS X
// http://www-personal.umich.edu/~williams/archive/computation/fe-handling-example.c
int feenableexcept (unsigned int excepts) {
  static fenv_t fenv;
  unsigned int new_excepts = excepts & FE_ALL_EXCEPT;
  unsigned int old_excepts;
  if (fegetenv(&fenv)) return -1;
  old_excepts = fenv.__control & FE_ALL_EXCEPT;
  fenv.__control &= ~new_excepts;
  fenv.__mxcsr   &= ~(new_excepts << 7);
  return fesetenv(&fenv) ? -1 : old_excepts;
}
#endif

//: 6. Map's operator[] being non-const is fucking evil.
:(before "Globals")  // can't generate prototypes for these
// from http://stackoverflow.com/questions/152643/idiomatic-c-for-reading-from-a-const-map
template<typename T> typename T::mapped_type& get(T& map, typename T::key_type const& key) {
  typename T::iterator iter(map.find(key));
  assert(iter != map.end());
  return iter->second;
}
template<typename T> typename T::mapped_type const& get(const T& map, typename T::key_type const& key) {
  typename T::const_iterator iter(map.find(key));
  assert(iter != map.end());
  return iter->second;
}
template<typename T> typename T::mapped_type const& put(T& map, typename T::key_type const& key, typename T::mapped_type const& value) {
  map[key] = value;
  return map[key];
}
template<typename T> bool contains_key(T& map, typename T::key_type const& key) {
  return map.find(key) != map.end();
}
template<typename T> typename T::mapped_type& get_or_insert(T& map, typename T::key_type const& key) {
  return map[key];
}
//: The contract: any container that relies on get_or_insert should never call
//: contains_key.

//: 7. istreams are a royal pain in the arse. You have to be careful about
//: what subclass you try to putback into. You have to watch out for the pesky
//: failbit and badbit. Just avoid eof() and use this helper instead.
:(code)
bool has_data(istream& in) {
  return in && !in.eof();
}

:(before "End Includes")
#include <assert.h>

#include <iostream>
using std::istream;
using std::ostream;
using std::iostream;
using std::cin;
using std::cout;
using std::cerr;
#include <iomanip>

#include <string.h>
#include <string>
using std::string;

#define unused  __attribute__((unused))
pan class="p">(Reg[EAX].i) + signed_arg2; OF = (signed_result != signed_full_result); // set CF uint32_t unsigned_arg2 = static_cast<uint32_t>(signed_arg2); uint32_t unsigned_result = Reg[EAX].u + unsigned_arg2; uint64_t unsigned_full_result = static_cast<uint64_t>(Reg[EAX].u) + unsigned_arg2; CF = (unsigned_result != unsigned_full_result); trace(Callstack_depth+1, "run") << "SF=" << SF << "; ZF=" << ZF << "; CF=" << CF << "; OF=" << OF << end(); Reg[EAX].i = signed_result; trace(Callstack_depth+1, "run") << "storing 0x" << HEXWORD << Reg[EAX].i << end(); break; } :(code) void test_add_imm32_to_EAX_signed_overflow() { Reg[EAX].i = 0x7fffffff; // largest positive signed integer run( "== code 0x1\n" // op ModR/M SIB displacement immediate " 05 01 00 00 00 \n" // add 1 to EAX ); CHECK_TRACE_CONTENTS( "run: add imm32 0x00000001 to EAX\n" "run: SF=1; ZF=0; CF=0; OF=1\n" "run: storing 0x80000000\n" ); } void test_add_imm32_to_EAX_unsigned_overflow() { Reg[EAX].u = 0xffffffff; // largest unsigned number Reg[EBX].u = 1; run( "== code 0x1\n" // op ModR/M SIB displacement immediate " 05 01 00 00 00 \n" // add 1 to EAX ); CHECK_TRACE_CONTENTS( "run: add imm32 0x00000001 to EAX\n" "run: SF=0; ZF=1; CF=1; OF=0\n" "run: storing 0x00000000\n" ); } void test_add_imm32_to_EAX_unsigned_and_signed_overflow() { Reg[EAX].u = 0x80000000; // smallest negative signed integer run( "== code 0x1\n" // op ModR/M SIB displacement immediate " 05 00 00 00 80 \n" // add 0x80000000 to EAX ); CHECK_TRACE_CONTENTS( "run: add imm32 0x80000000 to EAX\n" "run: SF=0; ZF=1; CF=1; OF=1\n" "run: storing 0x00000000\n" ); } //: :(before "End Initialize Op Names") put_new(Name, "81", "combine rm32 with imm32 based on subop (add/sub/and/or/xor/cmp)"); :(code) void test_add_imm32_to_r32() { Reg[EBX].i = 1; run( "== code 0x1\n" // op ModR/M SIB displacement immediate " 81 c3 0a 0b 0c 0d\n" // add 0x0d0c0b0a to EBX // ModR/M in binary: 11 (direct mode) 000 (subop add) 011 (dest EBX) ); CHECK_TRACE_CONTENTS( "run: combine r/m32 with imm32\n" "run: r/m32 is EBX\n" "run: imm32 is 0x0d0c0b0a\n" "run: subop add\n" "run: storing 0x0d0c0b0b\n" ); } :(before "End Single-Byte Opcodes") case 0x81: { // combine r/m32 with imm32 trace(Callstack_depth+1, "run") << "combine r/m32 with imm32" << end(); const uint8_t modrm = next(); int32_t* signed_arg1 = effective_address(modrm); const int32_t signed_arg2 = next32(); trace(Callstack_depth+1, "run") << "imm32 is 0x" << HEXWORD << signed_arg2 << end(); const uint8_t subop = (modrm>>3)&0x7; // middle 3 'reg opcode' bits switch (subop) { case 0: { trace(Callstack_depth+1, "run") << "subop add" << end(); int32_t signed_result = *signed_arg1 + signed_arg2; SF = (signed_result < 0); ZF = (signed_result == 0); int64_t signed_full_result = static_cast<int64_t>(*signed_arg1) + signed_arg2; OF = (signed_result != signed_full_result); // set CF uint32_t unsigned_arg1 = static_cast<uint32_t>(*signed_arg1); uint32_t unsigned_arg2 = static_cast<uint32_t>(signed_arg2); uint32_t unsigned_result = unsigned_arg1 + unsigned_arg2; uint64_t unsigned_full_result = static_cast<uint64_t>(unsigned_arg1) + unsigned_arg2; CF = (unsigned_result != unsigned_full_result); trace(Callstack_depth+1, "run") << "SF=" << SF << "; ZF=" << ZF << "; CF=" << CF << "; OF=" << OF << end(); *signed_arg1 = signed_result; trace(Callstack_depth+1, "run") << "storing 0x" << HEXWORD << *signed_arg1 << end(); break; } // End Op 81 Subops default: cerr << "unrecognized subop for opcode 81: " << NUM(subop) << '\n'; exit(1); } break; } :(code) void test_add_imm32_to_r32_signed_overflow() { Reg[EBX].i = 0x7fffffff; // largest positive signed integer run( "== code 0x1\n" // op ModR/M SIB displacement immediate " 81 c3 01 00 00 00\n" // add 1 to EBX // ModR/M in binary: 11 (direct mode) 000 (subop add) 011 (dest EBX) ); CHECK_TRACE_CONTENTS( "run: combine r/m32 with imm32\n" "run: r/m32 is EBX\n" "run: imm32 is 0x00000001\n" "run: subop add\n" "run: SF=1; ZF=0; CF=0; OF=1\n" "run: storing 0x80000000\n" ); } void test_add_imm32_to_r32_unsigned_overflow() { Reg[EBX].u = 0xffffffff; // largest unsigned number run( "== code 0x1\n" // op ModR/M SIB displacement immediate " 81 c3 01 00 00 00\n" // add 1 to EBX // ModR/M in binary: 11 (direct mode) 011 (subop add) 011 (dest EBX) ); CHECK_TRACE_CONTENTS( "run: combine r/m32 with imm32\n" "run: r/m32 is EBX\n" "run: imm32 is 0x00000001\n" "run: subop add\n" "run: SF=0; ZF=1; CF=1; OF=0\n" "run: storing 0x00000000\n" ); } void test_add_imm32_to_r32_unsigned_and_signed_overflow() { Reg[EBX].u = 0x80000000; // smallest negative signed integer run( "== code 0x1\n" // op ModR/M SIB displacement immediate " 81 c3 00 00 00 80\n" // add 0x80000000 to EBX // ModR/M in binary: 11 (direct mode) 011 (subop add) 011 (dest EBX) ); CHECK_TRACE_CONTENTS( "run: combine r/m32 with imm32\n" "run: r/m32 is EBX\n" "run: imm32 is 0x80000000\n" "run: subop add\n" "run: SF=0; ZF=1; CF=1; OF=1\n" "run: storing 0x00000000\n" ); } //: :(code) void test_add_imm32_to_mem_at_r32() { Reg[EBX].i = 0x2000; run( "== code 0x1\n" // op ModR/M SIB displacement immediate " 81 03 0a 0b 0c 0d \n" // add 0x0d0c0b0a to *EBX // ModR/M in binary: 00 (indirect mode) 000 (subop add) 011 (dest EBX) "== data 0x2000\n" "01 00 00 00\n" // 0x00000001 ); CHECK_TRACE_CONTENTS( "run: combine r/m32 with imm32\n" "run: effective address is 0x00002000 (EBX)\n" "run: imm32 is 0x0d0c0b0a\n" "run: subop add\n" "run: storing 0x0d0c0b0b\n" ); } //:: subtract :(before "End Initialize Op Names") put_new(Name, "2d", "subtract imm32 from EAX (sub)"); :(code) void test_subtract_imm32_from_EAX() { Reg[EAX].i = 0x0d0c0baa; run( "== code 0x1\n" // op ModR/M SIB displacement immediate " 2d 0a 0b 0c 0d \n" // subtract 0x0d0c0b0a from EAX ); CHECK_TRACE_CONTENTS( "run: subtract imm32 0x0d0c0b0a from EAX\n" "run: storing 0x000000a0\n" ); } :(before "End Single-Byte Opcodes") case 0x2d: { // subtract imm32 from EAX const int32_t signed_arg2 = next32(); trace(Callstack_depth+1, "run") << "subtract imm32 0x" << HEXWORD << signed_arg2 << " from EAX" << end(); int32_t signed_result = Reg[EAX].i - signed_arg2; SF = (signed_result < 0); ZF = (signed_result == 0); int64_t signed_full_result = static_cast<int64_t>(Reg[EAX].i) - signed_arg2; OF = (signed_result != signed_full_result); // set CF uint32_t unsigned_arg2 = static_cast<uint32_t>(signed_arg2); uint32_t unsigned_result = Reg[EAX].u - unsigned_arg2; uint64_t unsigned_full_result = static_cast<uint64_t>(Reg[EAX].u) - unsigned_arg2; CF = (unsigned_result != unsigned_full_result); trace(Callstack_depth+1, "run") << "SF=" << SF << "; ZF=" << ZF << "; CF=" << CF << "; OF=" << OF << end(); Reg[EAX].i = signed_result; trace(Callstack_depth+1, "run") << "storing 0x" << HEXWORD << Reg[EAX].i << end(); break; } :(code) void test_subtract_imm32_from_EAX_signed_overflow() { Reg[EAX].i = 0x80000000; // smallest negative signed integer run( "== code 0x1\n" // op ModR/M SIB displacement immediate " 2d ff ff ff 7f \n" // subtract largest positive signed integer from EAX ); CHECK_TRACE_CONTENTS( "run: subtract imm32 0x7fffffff from EAX\n" "run: SF=0; ZF=0; CF=0; OF=1\n" "run: storing 0x00000001\n" ); } void test_subtract_imm32_from_EAX_unsigned_overflow() { Reg[EAX].i = 0; run( "== code 0x1\n" // op ModR/M SIB displacement immediate " 2d 01 00 00 00 \n" // subtract 1 from EAX ); CHECK_TRACE_CONTENTS( "run: subtract imm32 0x00000001 from EAX\n" "run: SF=1; ZF=0; CF=1; OF=0\n" "run: storing 0xffffffff\n" ); } void test_subtract_imm32_from_EAX_signed_and_unsigned_overflow() { Reg[EAX].i = 0; run( "== code 0x1\n" // op ModR/M SIB displacement immediate " 2d 00 00 00 80 \n" // subtract smallest negative signed integer from EAX ); CHECK_TRACE_CONTENTS( "run: subtract imm32 0x80000000 from EAX\n" "run: SF=1; ZF=0; CF=1; OF=1\n" "run: storing 0x80000000\n" ); } //: void test_subtract_imm32_from_mem_at_r32() { Reg[EBX].i = 0x2000; run( "== code 0x1\n" // op ModR/M SIB displacement immediate " 81 2b 01 00 00 00 \n" // subtract 1 from *EBX // ModR/M in binary: 00 (indirect mode) 101 (subop subtract) 011 (dest EBX) "== data 0x2000\n" "0a 00 00 00\n" // 0x0000000a ); CHECK_TRACE_CONTENTS( "run: combine r/m32 with imm32\n" "run: effective address is 0x00002000 (EBX)\n" "run: imm32 is 0x00000001\n" "run: subop subtract\n" "run: storing 0x00000009\n" ); } :(before "End Op 81 Subops") case 5: { trace(Callstack_depth+1, "run") << "subop subtract" << end(); int32_t signed_result = *signed_arg1 - signed_arg2; SF = (signed_result < 0); ZF = (signed_result == 0); int64_t signed_full_result = static_cast<int64_t>(*signed_arg1) - signed_arg2; OF = (signed_result != signed_full_result); // set CF uint32_t unsigned_arg1 = static_cast<uint32_t>(*signed_arg1); uint32_t unsigned_arg2 = static_cast<uint32_t>(signed_arg2); uint32_t unsigned_result = unsigned_arg1 - unsigned_arg2; uint64_t unsigned_full_result = static_cast<uint64_t>(unsigned_arg1) - unsigned_arg2; CF = (unsigned_result != unsigned_full_result); trace(Callstack_depth+1, "run") << "SF=" << SF << "; ZF=" << ZF << "; CF=" << CF << "; OF=" << OF << end(); *signed_arg1 = signed_result; trace(Callstack_depth+1, "run") << "storing 0x" << HEXWORD << *signed_arg1 << end(); break; } :(code) void test_subtract_imm32_from_mem_at_r32_signed_overflow() { Reg[EBX].i = 0x2000; run( "== code 0x1\n" // op ModR/M SIB displacement immediate " 81 2b ff ff ff 7f \n" // subtract largest positive signed integer from *EBX // ModR/M in binary: 00 (indirect mode) 101 (subop subtract) 011 (dest EBX) "== data 0x2000\n" "00 00 00 80\n" // smallest negative signed integer ); CHECK_TRACE_CONTENTS( "run: combine r/m32 with imm32\n" "run: effective address is 0x00002000 (EBX)\n" "run: effective address contains 0x80000000\n" "run: imm32 is 0x7fffffff\n" "run: subop subtract\n" "run: SF=0; ZF=0; CF=0; OF=1\n" "run: storing 0x00000001\n" ); } void test_subtract_imm32_from_mem_at_r32_unsigned_overflow() { Reg[EBX].i = 0x2000; run( "== code 0x1\n" // op ModR/M SIB displacement immediate " 81 2b 01 00 00 00 \n" // subtract 1 from *EBX // ModR/M in binary: 00 (indirect mode) 101 (subop subtract) 011 (dest EBX) "== data 0x2000\n" "00 00 00 00\n" // 0 ); CHECK_TRACE_CONTENTS( "run: combine r/m32 with imm32\n" "run: effective address is 0x00002000 (EBX)\n" "run: effective address contains 0x00000000\n" "run: imm32 is 0x00000001\n" "run: subop subtract\n" "run: SF=1; ZF=0; CF=1; OF=0\n" "run: storing 0xffffffff\n" ); } void test_subtract_imm32_from_mem_at_r32_signed_and_unsigned_overflow() { Reg[EBX].i = 0x2000; run( "== code 0x1\n" // op ModR/M SIB displacement immediate " 81 2b 00 00 00 80 \n" // subtract smallest negative signed integer from *EBX // ModR/M in binary: 00 (indirect mode) 101 (subop subtract) 011 (dest EBX) "== data 0x2000\n" "00 00 00 00\n" // 0 ); CHECK_TRACE_CONTENTS( "run: combine r/m32 with imm32\n" "run: effective address is 0x00002000 (EBX)\n" "run: effective address contains 0x00000000\n" "run: imm32 is 0x80000000\n" "run: subop subtract\n" "run: SF=1; ZF=0; CF=1; OF=1\n" "run: storing 0x80000000\n" ); } //: void test_subtract_imm32_from_r32() { Reg[EBX].i = 10; run( "== code 0x1\n" // op ModR/M SIB displacement immediate " 81 eb 01 00 00 00 \n" // subtract 1 from EBX // ModR/M in binary: 11 (direct mode) 101 (subop subtract) 011 (dest EBX) ); CHECK_TRACE_CONTENTS( "run: combine r/m32 with imm32\n" "run: r/m32 is EBX\n" "run: imm32 is 0x00000001\n" "run: subop subtract\n" "run: storing 0x00000009\n" ); } //:: shift left :(before "End Initialize Op Names") put_new(Name, "c1", "shift rm32 by imm8 bits depending on subop (sal/sar/shl/shr)"); :(code) void test_shift_left_r32_with_imm8() { Reg[EBX].i = 13; run( "== code 0x1\n" // op ModR/M SIB displacement immediate " c1 e3 01 \n" // shift EBX left by 1 bit // ModR/M in binary: 11 (direct mode) 100 (subop shift left) 011 (dest EBX) ); CHECK_TRACE_CONTENTS( "run: operate on r/m32\n" "run: r/m32 is EBX\n" "run: subop: shift left by CL bits\n" "run: storing 0x0000001a\n" ); } :(before "End Single-Byte Opcodes") case 0xc1: { const uint8_t modrm = next(); trace(Callstack_depth+1, "run") << "operate on r/m32" << end(); int32_t* arg1 = effective_address(modrm); const uint8_t subop = (modrm>>3)&0x7; // middle 3 'reg opcode' bits switch (subop) { case 4: { // shift left r/m32 by CL trace(Callstack_depth+1, "run") << "subop: shift left by CL bits" << end(); uint8_t count = next() & 0x1f; // OF is only defined if count is 1 if (count == 1) { bool msb = (*arg1 & 0x80000000) >> 1; bool pnsb = (*arg1 & 0x40000000); OF = (msb != pnsb); } *arg1 = (*arg1 << count); ZF = (*arg1 == 0); SF = (*arg1 < 0); // CF undefined trace(Callstack_depth+1, "run") << "SF=" << SF << "; ZF=" << ZF << "; CF=" << CF << "; OF=" << OF << end(); trace(Callstack_depth+1, "run") << "storing 0x" << HEXWORD << *arg1 << end(); break; } // End Op c1 Subops default: cerr << "unrecognized subop for opcode c1: " << NUM(subop) << '\n'; exit(1); } break; } //:: shift right arithmetic :(code) void test_shift_right_arithmetic_r32_with_imm8() { Reg[EBX].i = 26; run( "== code 0x1\n" // op ModR/M SIB displacement immediate " c1 fb 01 \n" // shift EBX right by 1 bit // ModR/M in binary: 11 (direct mode) 111 (subop shift right arithmetic) 011 (dest EBX) ); CHECK_TRACE_CONTENTS( "run: operate on r/m32\n" "run: r/m32 is EBX\n" "run: subop: shift right by CL bits, while preserving sign\n" "run: storing 0x0000000d\n" ); } :(before "End Op c1 Subops") case 7: { // shift right r/m32 by CL, preserving sign trace(Callstack_depth+1, "run") << "subop: shift right by CL bits, while preserving sign" << end(); uint8_t count = next() & 0x1f; int32_t result = (*arg1 >> count); ZF = (*arg1 == 0); SF = (*arg1 < 0); // OF is only defined if count is 1 if (count == 1) OF = false; // CF CF = ((*arg1 >> (count-1)) & 0x1); trace(Callstack_depth+1, "run") << "SF=" << SF << "; ZF=" << ZF << "; CF=" << CF << "; OF=" << OF << end(); *arg1 = result; trace(Callstack_depth+1, "run") << "storing 0x" << HEXWORD << *arg1 << end(); break; } :(code) void test_shift_right_arithmetic_odd_r32_with_imm8() { Reg[EBX].i = 27; run( "== code 0x1\n" // op ModR/M SIB displacement immediate " c1 fb 01 \n" // shift EBX right by 1 bit // ModR/M in binary: 11 (direct mode) 111 (subop shift right arithmetic) 011 (dest EBX) ); CHECK_TRACE_CONTENTS( "run: operate on r/m32\n" "run: r/m32 is EBX\n" "run: subop: shift right by CL bits, while preserving sign\n" // result: 13 "run: storing 0x0000000d\n" ); } :(code) void test_shift_right_arithmetic_negative_r32_with_imm8() { Reg[EBX].i = 0xfffffffd; // -3 run( "== code 0x1\n" // op ModR/M SIB displacement immediate " c1 fb 01 \n" // shift EBX right by 1 bit, while preserving sign // ModR/M in binary: 11 (direct mode) 111 (subop shift right arithmetic) 011 (dest EBX) ); CHECK_TRACE_CONTENTS( "run: operate on r/m32\n" "run: r/m32 is EBX\n" "run: subop: shift right by CL bits, while preserving sign\n" // result: -2 "run: storing 0xfffffffe\n" ); } //:: shift right logical :(code) void test_shift_right_logical_r32_with_imm8() { Reg[EBX].i = 26; run( "== code 0x1\n" // op ModR/M SIB displacement immediate " c1 eb 01 \n" // shift EBX right by 1 bit, while padding zeroes // ModR/M in binary: 11 (direct mode) 101 (subop shift right logical) 011 (dest EBX) ); CHECK_TRACE_CONTENTS( "run: operate on r/m32\n" "run: r/m32 is EBX\n" "run: subop: shift right by CL bits, while padding zeroes\n" "run: storing 0x0000000d\n" ); } :(before "End Op c1 Subops") case 5: { // shift right r/m32 by CL, preserving sign trace(Callstack_depth+1, "run") << "subop: shift right by CL bits, while padding zeroes" << end(); uint8_t count = next() & 0x1f; // OF is only defined if count is 1 if (count == 1) { bool msb = (*arg1 & 0x80000000) >> 1; bool pnsb = (*arg1 & 0x40000000); OF = (msb != pnsb); } uint32_t* uarg1 = reinterpret_cast<uint32_t*>(arg1); *uarg1 = (*uarg1 >> count); ZF = (*uarg1 == 0); // result is always positive by definition SF = false; // CF undefined trace(Callstack_depth+1, "run") << "SF=" << SF << "; ZF=" << ZF << "; CF=" << CF << "; OF=" << OF << end(); trace(Callstack_depth+1, "run") << "storing 0x" << HEXWORD << *arg1 << end(); break; } :(code) void test_shift_right_logical_odd_r32_with_imm8() { Reg[EBX].i = 27; run( "== code 0x1\n" // op ModR/M SIB displacement immediate " c1 eb 01 \n" // shift EBX right by 1 bit, while padding zeroes ); CHECK_TRACE_CONTENTS( "run: operate on r/m32\n" "run: r/m32 is EBX\n" "run: subop: shift right by CL bits, while padding zeroes\n" // result: 13 "run: storing 0x0000000d\n" ); } :(code) void test_shift_right_logical_negative_r32_with_imm8() { Reg[EBX].i = 0xfffffffd; run( "== code 0x1\n" // op ModR/M SIB displacement immediate " c1 eb 01 \n" // shift EBX right by 1 bit, while padding zeroes // ModR/M in binary: 11 (direct mode) 101 (subop shift right logical) 011 (dest EBX) ); CHECK_TRACE_CONTENTS( "run: operate on r/m32\n" "run: r/m32 is EBX\n" "run: subop: shift right by CL bits, while padding zeroes\n" "run: storing 0x7ffffffe\n" ); } //:: and :(before "End Initialize Op Names") put_new(Name, "25", "EAX = bitwise AND of imm32 with EAX (and)"); :(code) void test_and_EAX_with_imm32() { Reg[EAX].i = 0xff; run( "== code 0x1\n" // op ModR/M SIB displacement immediate " 25 0a 0b 0c 0d \n" // and 0x0d0c0b0a with EAX ); CHECK_TRACE_CONTENTS( "run: and imm32 0x0d0c0b0a with EAX\n" "run: storing 0x0000000a\n" ); } :(before "End Single-Byte Opcodes") case 0x25: { // and imm32 with EAX // bitwise ops technically operate on unsigned numbers, but it makes no // difference const int32_t signed_arg2 = next32(); trace(Callstack_depth+1, "run") << "and imm32 0x" << HEXWORD << signed_arg2 << " with EAX" << end(); Reg[EAX].i &= signed_arg2; trace(Callstack_depth+1, "run") << "storing 0x" << HEXWORD << Reg[EAX].i << end(); SF = (Reg[EAX].i >> 31); ZF = (Reg[EAX].i == 0); CF = false; OF = false; trace(Callstack_depth+1, "run") << "SF=" << SF << "; ZF=" << ZF << "; CF=" << CF << "; OF=" << OF << end(); break; } //: :(code) void test_and_imm32_with_mem_at_r32() { Reg[EBX].i = 0x2000; run( "== code 0x1\n" // op ModR/M SIB displacement immediate " 81 23 0a 0b 0c 0d \n" // and 0x0d0c0b0a with *EBX // ModR/M in binary: 00 (indirect mode) 100 (subop and) 011 (dest EBX) "== data 0x2000\n" "ff 00 00 00\n" // 0x000000ff ); CHECK_TRACE_CONTENTS( "run: combine r/m32 with imm32\n" "run: effective address is 0x00002000 (EBX)\n" "run: imm32 is 0x0d0c0b0a\n" "run: subop and\n" "run: storing 0x0000000a\n" ); } :(before "End Op 81 Subops") case 4: { trace(Callstack_depth+1, "run") << "subop and" << end(); // bitwise ops technically operate on unsigned numbers, but it makes no // difference *signed_arg1 &= signed_arg2; trace(Callstack_depth+1, "run") << "storing 0x" << HEXWORD << *signed_arg1 << end(); SF = (*signed_arg1 >> 31); ZF = (*signed_arg1 == 0); CF = false; OF = false; trace(Callstack_depth+1, "run") << "SF=" << SF << "; ZF=" << ZF << "; CF=" << CF << "; OF=" << OF << end(); break; } //: :(code) void test_and_imm32_with_r32() { Reg[EBX].i = 0xff; run( "== code 0x1\n" // op ModR/M SIB displacement immediate " 81 e3 0a 0b 0c 0d \n" // and 0x0d0c0b0a with EBX // ModR/M in binary: 11 (direct mode) 100 (subop and) 011 (dest EBX) ); CHECK_TRACE_CONTENTS( "run: combine r/m32 with imm32\n" "run: r/m32 is EBX\n" "run: imm32 is 0x0d0c0b0a\n" "run: subop and\n" "run: storing 0x0000000a\n" ); } //:: or :(before "End Initialize Op Names") put_new(Name, "0d", "EAX = bitwise OR of imm32 with EAX (or)"); :(code) void test_or_EAX_with_imm32() { Reg[EAX].i = 0xd0c0b0a0; run( "== code 0x1\n" // op ModR/M SIB displacement immediate " 0d 0a 0b 0c 0d \n" // or 0x0d0c0b0a with EAX ); CHECK_TRACE_CONTENTS( "run: or imm32 0x0d0c0b0a with EAX\n" "run: storing 0xddccbbaa\n" ); } :(before "End Single-Byte Opcodes") case 0x0d: { // or imm32 with EAX // bitwise ops technically operate on unsigned numbers, but it makes no // difference const int32_t signed_arg2 = next32(); trace(Callstack_depth+1, "run") << "or imm32 0x" << HEXWORD << signed_arg2 << " with EAX" << end(); Reg[EAX].i |= signed_arg2; trace(Callstack_depth+1, "run") << "storing 0x" << HEXWORD << Reg[EAX].i << end(); SF = (Reg[EAX].i >> 31); ZF = (Reg[EAX].i == 0); CF = false; OF = false; trace(Callstack_depth+1, "run") << "SF=" << SF << "; ZF=" << ZF << "; CF=" << CF << "; OF=" << OF << end(); break; } //: :(code) void test_or_imm32_with_mem_at_r32() { Reg[EBX].i = 0x2000; run( "== code 0x1\n" // op ModR/M SIB displacement immediate " 81 0b 0a 0b 0c 0d \n" // or 0x0d0c0b0a with *EBX // ModR/M in binary: 00 (indirect mode) 001 (subop or) 011 (dest EBX) "== data 0x2000\n" "a0 b0 c0 d0\n" // 0xd0c0b0a0 ); CHECK_TRACE_CONTENTS( "run: combine r/m32 with imm32\n" "run: effective address is 0x00002000 (EBX)\n" "run: imm32 is 0x0d0c0b0a\n" "run: subop or\n" "run: storing 0xddccbbaa\n" ); } :(before "End Op 81 Subops") case 1: { trace(Callstack_depth+1, "run") << "subop or" << end(); // bitwise ops technically operate on unsigned numbers, but it makes no // difference *signed_arg1 |= signed_arg2; trace(Callstack_depth+1, "run") << "storing 0x" << HEXWORD << *signed_arg1 << end(); SF = (*signed_arg1 >> 31); ZF = (*signed_arg1 == 0); CF = false; OF = false; trace(Callstack_depth+1, "run") << "SF=" << SF << "; ZF=" << ZF << "; CF=" << CF << "; OF=" << OF << end(); break; } :(code) void test_or_imm32_with_r32() { Reg[EBX].i = 0xd0c0b0a0; run( "== code 0x1\n" // op ModR/M SIB displacement immediate " 81 cb 0a 0b 0c 0d \n" // or 0x0d0c0b0a with EBX // ModR/M in binary: 11 (direct mode) 001 (subop or) 011 (dest EBX) ); CHECK_TRACE_CONTENTS( "run: combine r/m32 with imm32\n" "run: r/m32 is EBX\n" "run: imm32 is 0x0d0c0b0a\n" "run: subop or\n" "run: storing 0xddccbbaa\n" ); } //:: xor :(before "End Initialize Op Names") put_new(Name, "35", "EAX = bitwise XOR of imm32 with EAX (xor)"); :(code) void test_xor_EAX_with_imm32() { Reg[EAX].i = 0xddccb0a0; run( "== code 0x1\n" // op ModR/M SIB displacement immediate " 35 0a 0b 0c 0d \n" // xor 0x0d0c0b0a with EAX ); CHECK_TRACE_CONTENTS( "run: xor imm32 0x0d0c0b0a with EAX\n" "run: storing 0xd0c0bbaa\n" ); } :(before "End Single-Byte Opcodes") case 0x35: { // xor imm32 with EAX // bitwise ops technically operate on unsigned numbers, but it makes no // difference const int32_t signed_arg2 = next32(); trace(Callstack_depth+1, "run") << "xor imm32 0x" << HEXWORD << signed_arg2 << " with EAX" << end(); Reg[EAX].i ^= signed_arg2; trace(Callstack_depth+1, "run") << "storing 0x" << HEXWORD << Reg[EAX].i << end(); SF = (Reg[EAX].i >> 31); ZF = (Reg[EAX].i == 0); CF = false; OF = false; trace(Callstack_depth+1, "run") << "SF=" << SF << "; ZF=" << ZF << "; CF=" << CF << "; OF=" << OF << end(); break; } //: :(code) void test_xor_imm32_with_mem_at_r32() { Reg[EBX].i = 0x2000; run( "== code 0x1\n" // op ModR/M SIB displacement immediate " 81 33 0a 0b 0c 0d \n" // xor 0x0d0c0b0a with *EBX // ModR/M in binary: 00 (indirect mode) 110 (subop xor) 011 (dest EBX) "== data 0x2000\n" "a0 b0 c0 d0\n" // 0xd0c0b0a0 ); CHECK_TRACE_CONTENTS( "run: combine r/m32 with imm32\n" "run: effective address is 0x00002000 (EBX)\n" "run: imm32 is 0x0d0c0b0a\n" "run: subop xor\n" "run: storing 0xddccbbaa\n" ); } :(before "End Op 81 Subops") case 6: { trace(Callstack_depth+1, "run") << "subop xor" << end(); // bitwise ops technically operate on unsigned numbers, but it makes no // difference *signed_arg1 ^= signed_arg2; trace(Callstack_depth+1, "run") << "storing 0x" << HEXWORD << *signed_arg1 << end(); SF = (*signed_arg1 >> 31); ZF = (*signed_arg1 == 0); CF = false; OF = false; trace(Callstack_depth+1, "run") << "SF=" << SF << "; ZF=" << ZF << "; CF=" << CF << "; OF=" << OF << end(); break; } :(code) void test_xor_imm32_with_r32() { Reg[EBX].i = 0xd0c0b0a0; run( "== code 0x1\n" // op ModR/M SIB displacement immediate " 81 f3 0a 0b 0c 0d \n" // xor 0x0d0c0b0a with EBX // ModR/M in binary: 11 (direct mode) 110 (subop xor) 011 (dest EBX) ); CHECK_TRACE_CONTENTS( "run: combine r/m32 with imm32\n" "run: r/m32 is EBX\n" "run: imm32 is 0x0d0c0b0a\n" "run: subop xor\n" "run: storing 0xddccbbaa\n" ); } //:: compare (cmp) :(before "End Initialize Op Names") put_new(Name, "3d", "compare: set SF if EAX < imm32 (cmp)"); :(code) void test_compare_EAX_with_imm32_greater() { Reg[EAX].i = 0x0d0c0b0a; run( "== code 0x1\n" // op ModR/M SIB displacement immediate " 3d 07 0b 0c 0d \n" // compare EAX with 0x0d0c0b07 ); CHECK_TRACE_CONTENTS( "run: compare EAX with imm32 0x0d0c0b07\n" "run: SF=0; ZF=0; CF=0; OF=0\n" ); } :(before "End Single-Byte Opcodes") case 0x3d: { // compare EAX with imm32 const int32_t signed_arg1 = Reg[EAX].i; const int32_t signed_arg2 = next32(); trace(Callstack_depth+1, "run") << "compare EAX with imm32 0x" << HEXWORD << signed_arg2 << end(); const int32_t signed_difference = signed_arg1 - signed_arg2; SF = (signed_difference < 0); ZF = (signed_difference == 0); const int64_t full_signed_difference = static_cast<int64_t>(signed_arg1) - signed_arg2; OF = (signed_difference != full_signed_difference); const uint32_t unsigned_arg1 = static_cast<uint32_t>(signed_arg1); const uint32_t unsigned_arg2 = static_cast<uint32_t>(signed_arg2); const uint32_t unsigned_difference = unsigned_arg1 - unsigned_arg2; const uint64_t full_unsigned_difference = static_cast<uint64_t>(unsigned_arg1) - unsigned_arg2; CF = (unsigned_difference != full_unsigned_difference); trace(Callstack_depth+1, "run") << "SF=" << SF << "; ZF=" << ZF << "; CF=" << CF << "; OF=" << OF << end(); break; } :(code) void test_compare_EAX_with_imm32_lesser_unsigned_and_signed() { Reg[EAX].i = 0x0a0b0c07; run( "== code 0x1\n" // op ModR/M SIB displacement immediate " 3d 0d 0c 0b 0a \n" // compare EAX with imm32 ); CHECK_TRACE_CONTENTS( "run: compare EAX with imm32 0x0a0b0c0d\n" "run: SF=1; ZF=0; CF=1; OF=0\n" ); } void test_compare_EAX_with_imm32_lesser_unsigned_and_signed_due_to_overflow() { Reg[EAX].i = 0x7fffffff; // largest positive signed integer run( "== code 0x1\n" // op ModR/M SIB displacement immediate " 3d 00 00 00 80\n" // compare EAX with smallest negative signed integer ); CHECK_TRACE_CONTENTS( "run: compare EAX with imm32 0x80000000\n" "run: SF=1; ZF=0; CF=1; OF=1\n" ); } void test_compare_EAX_with_imm32_lesser_signed() { Reg[EAX].i = 0xffffffff; // -1 run( "== code 0x1\n" // op ModR/M SIB displacement immediate " 3d 01 00 00 00\n" // compare EAX with 1 ); CHECK_TRACE_CONTENTS( "run: compare EAX with imm32 0x00000001\n" "run: SF=1; ZF=0; CF=0; OF=0\n" ); } void test_compare_EAX_with_imm32_lesser_unsigned() { Reg[EAX].i = 0x00000001; // 1 run( "== code 0x1\n" // op ModR/M SIB displacement immediate " 3d ff ff ff ff\n" // compare EAX with -1 ); CHECK_TRACE_CONTENTS( "run: compare EAX with imm32 0xffffffff\n" "run: SF=0; ZF=0; CF=1; OF=0\n" ); } void test_compare_EAX_with_imm32_equal() { Reg[EAX].i = 0x0d0c0b0a; run( "== code 0x1\n" // op ModR/M SIB displacement immediate " 3d 0a 0b 0c 0d \n" // compare 0x0d0c0b0a with EAX ); CHECK_TRACE_CONTENTS( "run: compare EAX with imm32 0x0d0c0b0a\n" "run: SF=0; ZF=1; CF=0; OF=0\n" ); } //: void test_compare_imm32_with_r32_greater() { Reg[EBX].i = 0x0d0c0b0a; run( "== code 0x1\n" // op ModR/M SIB displacement immediate " 81 fb 07 0b 0c 0d \n" // compare 0x0d0c0b07 with EBX // ModR/M in binary: 11 (direct mode) 111 (subop compare) 011 (dest EBX) ); CHECK_TRACE_CONTENTS( "run: combine r/m32 with imm32\n" "run: r/m32 is EBX\n" "run: imm32 is 0x0d0c0b07\n" "run: SF=0; ZF=0; CF=0; OF=0\n" ); } :(before "End Op 81 Subops") case 7: { trace(Callstack_depth+1, "run") << "subop compare" << end(); const int32_t tmp1 = *signed_arg1 - signed_arg2; SF = (tmp1 < 0); ZF = (tmp1 == 0); const int64_t tmp2 = static_cast<int64_t>(*signed_arg1) - signed_arg2; OF = (tmp1 != tmp2); const uint32_t unsigned_arg1 = static_cast<uint32_t>(*signed_arg1); const uint32_t unsigned_arg2 = static_cast<uint32_t>(signed_arg2); const uint32_t tmp3 = unsigned_arg1 - unsigned_arg2; const uint64_t tmp4 = static_cast<uint64_t>(unsigned_arg1) - unsigned_arg2; CF = (tmp3 != tmp4); trace(Callstack_depth+1, "run") << "SF=" << SF << "; ZF=" << ZF << "; CF=" << CF << "; OF=" << OF << end(); break; } :(code) void test_compare_rm32_with_imm32_lesser_unsigned_and_signed() { Reg[EAX].i = 0x0a0b0c07; run( "== code 0x1\n" // op ModR/M SIB displacement immediate " 81 f8 0d 0c 0b 0a \n" // compare EAX with imm32 // ModR/M in binary: 11 (direct mode) 111 (subop compare) 000 (dest EAX) ); CHECK_TRACE_CONTENTS( "run: combine r/m32 with imm32\n" "run: r/m32 is EAX\n" "run: imm32 is 0x0a0b0c0d\n" "run: subop compare\n" "run: SF=1; ZF=0; CF=1; OF=0\n" ); } void test_compare_rm32_with_imm32_lesser_unsigned_and_signed_due_to_overflow() { Reg[EAX].i = 0x7fffffff; // largest positive signed integer run( "== code 0x1\n" // op ModR/M SIB displacement immediate " 81 f8 00 00 00 80\n" // compare EAX with smallest negative signed integer // ModR/M in binary: 11 (direct mode) 111 (subop compare) 000 (dest EAX) ); CHECK_TRACE_CONTENTS( "run: combine r/m32 with imm32\n" "run: r/m32 is EAX\n" "run: imm32 is 0x80000000\n" "run: subop compare\n" "run: SF=1; ZF=0; CF=1; OF=1\n" ); } void test_compare_rm32_with_imm32_lesser_signed() { Reg[EAX].i = 0xffffffff; // -1 run( "== code 0x1\n" // op ModR/M SIB displacement immediate " 81 f8 01 00 00 00\n" // compare EAX with 1 // ModR/M in binary: 11 (direct mode) 111 (subop compare) 000 (dest EAX) ); CHECK_TRACE_CONTENTS( "run: combine r/m32 with imm32\n" "run: r/m32 is EAX\n" "run: imm32 is 0x00000001\n" "run: subop compare\n" "run: SF=1; ZF=0; CF=0; OF=0\n" ); } void test_compare_rm32_with_imm32_lesser_unsigned() { Reg[EAX].i = 0x00000001; // 1 run( "== code 0x1\n" // op ModR/M SIB displacement immediate " 81 f8 ff ff ff ff\n" // compare EAX with -1 // ModR/M in binary: 11 (direct mode) 111 (subop compare) 000 (dest EAX) ); CHECK_TRACE_CONTENTS( "run: combine r/m32 with imm32\n" "run: r/m32 is EAX\n" "run: imm32 is 0xffffffff\n" "run: subop compare\n" "run: SF=0; ZF=0; CF=1; OF=0\n" ); } :(code) void test_compare_imm32_with_r32_equal() { Reg[EBX].i = 0x0d0c0b0a; run( "== code 0x1\n" // op ModR/M SIB displacement immediate " 81 fb 0a 0b 0c 0d \n" // compare 0x0d0c0b0a with EBX // ModR/M in binary: 11 (direct mode) 111 (subop compare) 011 (dest EBX) ); CHECK_TRACE_CONTENTS( "run: combine r/m32 with imm32\n" "run: r/m32 is EBX\n" "run: imm32 is 0x0d0c0b0a\n" "run: SF=0; ZF=1; CF=0; OF=0\n" ); } :(code) void test_compare_imm32_with_mem_at_r32_greater() { Reg[EBX].i = 0x2000; run( "== code 0x1\n" // op ModR/M SIB displacement immediate " 81 3b 07 0b 0c 0d \n" // compare 0x0d0c0b07 with *EBX // ModR/M in binary: 00 (indirect mode) 111 (subop compare) 011 (dest EBX) "== data 0x2000\n" "0a 0b 0c 0d\n" // 0x0d0c0b0a ); CHECK_TRACE_CONTENTS( "run: combine r/m32 with imm32\n" "run: effective address is 0x00002000 (EBX)\n" "run: imm32 is 0x0d0c0b07\n" "run: SF=0; ZF=0; CF=0; OF=0\n" ); } :(code) void test_compare_imm32_with_mem_at_r32_lesser() { Reg[EAX].i = 0x2000; run( "== code 0x1\n" // op ModR/M SIB displacement immediate " 81 38 0a 0b 0c 0d \n" // compare 0x0d0c0b0a with *EAX // ModR/M in binary: 00 (indirect mode) 111 (subop compare) 000 (dest EAX) "== data 0x2000\n" "07 0b 0c 0d\n" // 0x0d0c0b07 ); CHECK_TRACE_CONTENTS( "run: combine r/m32 with imm32\n" "run: effective address is 0x00002000 (EAX)\n" "run: imm32 is 0x0d0c0b0a\n" "run: SF=1; ZF=0; CF=1; OF=0\n" ); } :(code) void test_compare_imm32_with_mem_at_r32_equal() { Reg[EBX].i = 0x0d0c0b0a; Reg[EBX].i = 0x2000; run( "== code 0x1\n" // op ModR/M SIB displacement immediate " 81 3b 0a 0b 0c 0d \n" // compare 0x0d0c0b0a with *EBX // ModR/M in binary: 00 (indirect mode) 111 (subop compare) 011 (dest EBX) "== data 0x2000\n" "0a 0b 0c 0d\n" // 0x0d0c0b0a ); CHECK_TRACE_CONTENTS( "run: combine r/m32 with imm32\n" "run: effective address is 0x00002000 (EBX)\n" "run: imm32 is 0x0d0c0b0a\n" "run: SF=0; ZF=1; CF=0; OF=0\n" ); } //:: copy (mov) :(before "End Initialize Op Names") // b8 defined earlier to copy imm32 to EAX put_new(Name, "b9", "copy imm32 to ECX (mov)"); put_new(Name, "ba", "copy imm32 to EDX (mov)"); put_new(Name, "bb", "copy imm32 to EBX (mov)"); put_new(Name, "bc", "copy imm32 to ESP (mov)"); put_new(Name, "bd", "copy imm32 to EBP (mov)"); put_new(Name, "be", "copy imm32 to ESI (mov)"); put_new(Name, "bf", "copy imm32 to EDI (mov)"); :(code) void test_copy_imm32_to_r32() { run( "== code 0x1\n" // op ModR/M SIB displacement immediate " bb 0a 0b 0c 0d \n" // copy 0x0d0c0b0a to EBX ); CHECK_TRACE_CONTENTS( "run: copy imm32 0x0d0c0b0a to EBX\n" ); } :(before "End Single-Byte Opcodes") case 0xb9: case 0xba: case 0xbb: case 0xbc: case 0xbd: case 0xbe: case 0xbf: { // copy imm32 to r32 const uint8_t rdest = op & 0x7; const int32_t src = next32(); trace(Callstack_depth+1, "run") << "copy imm32 0x" << HEXWORD << src << " to " << rname(rdest) << end(); Reg[rdest].i = src; break; } //: :(before "End Initialize Op Names") put_new(Name, "c7", "copy imm32 to rm32 with subop 0 (mov)"); :(code) void test_copy_imm32_to_mem_at_r32() { Reg[EBX].i = 0x60; run( "== code 0x1\n" // op ModR/M SIB displacement immediate " c7 03 0a 0b 0c 0d \n" // copy 0x0d0c0b0a to *EBX // ModR/M in binary: 00 (indirect mode) 000 (subop) 011 (dest EBX) ); CHECK_TRACE_CONTENTS( "run: copy imm32 to r/m32\n" "run: effective address is 0x00000060 (EBX)\n" "run: imm32 is 0x0d0c0b0a\n" ); } :(before "End Single-Byte Opcodes") case 0xc7: { // copy imm32 to r32 const uint8_t modrm = next(); trace(Callstack_depth+1, "run") << "copy imm32 to r/m32" << end(); const uint8_t subop = (modrm>>3)&0x7; // middle 3 'reg opcode' bits if (subop != 0) { cerr << "unrecognized subop for opcode c7: " << NUM(subop) << " (only 0/copy currently implemented)\n"; exit(1); } int32_t* dest = effective_address(modrm); const int32_t src = next32(); trace(Callstack_depth+1, "run") << "imm32 is 0x" << HEXWORD << src << end(); *dest = src; break; } //:: push :(before "End Initialize Op Names") put_new(Name, "68", "push imm32 to stack (push)"); :(code) void test_push_imm32() { Mem.push_back(vma(0xbd000000)); // manually allocate memory Reg[ESP].u = 0xbd000014; run( "== code 0x1\n" // op ModR/M SIB displacement immediate " 68 af 00 00 00 \n" // push *EAX to stack ); CHECK_TRACE_CONTENTS( "run: push imm32 0x000000af\n" "run: ESP is now 0xbd000010\n" "run: contents at ESP: 0x000000af\n" ); } :(before "End Single-Byte Opcodes") case 0x68: { const uint32_t val = static_cast<uint32_t>(next32()); trace(Callstack_depth+1, "run") << "push imm32 0x" << HEXWORD << val << end(); //? cerr << "push: " << val << " => " << Reg[ESP].u << '\n'; push(val); trace(Callstack_depth+1, "run") << "ESP is now 0x" << HEXWORD << Reg[ESP].u << end(); trace(Callstack_depth+1, "run") << "contents at ESP: 0x" << HEXWORD << read_mem_u32(Reg[ESP].u) << end(); break; }