about summary refs log tree commit diff stats
ModeNameSize
-rw-r--r--Readme.md13464log stats plain blame
-rw-r--r--blocking.arc.t900log stats plain blame
-rw-r--r--buffered-stdin.mu1263log stats plain blame
-rw-r--r--callcc.mu599log stats plain blame
-rw-r--r--channel.mu1941log stats plain blame
d---------charterm268log stats plain
-rw-r--r--chessboard.arc.t12666log stats plain blame
-rw-r--r--chessboard.mu11672log stats plain blame
-rw-r--r--color-repl.mu23324log stats plain blame
-rw-r--r--counters.mu1190log stats plain blame
d---------cpp815log stats plain
-rw-r--r--edit.arc.t1161log stats plain blame
-rw-r--r--edit.mu813log stats plain blame
-rw-r--r--factorial.mu629log stats plain blame
-rw-r--r--fork.mu408log stats plain blame
-rw-r--r--generic.mu898log stats plain blame
-rw-r--r--graphics.mu889log stats plain blame
-rw-r--r--highlights969log stats plain blame
-rw-r--r--load.arc775log stats plain blame
-rwxr-xr-xmu615log stats plain blame
-rw-r--r--mu.arc126730log stats plain blame
-rw-r--r--mu.arc.t171613log stats plain blame
-rw-r--r--mu.arc.t.html562366log stats plain blame
-rw-r--r--mu.vim1229log stats plain blame
-rw-r--r--render.vim5000log stats plain blame
-rw-r--r--scratch.vim1558log stats plain blame
-rw-r--r--stdin.mu1091log stats plain blame
-rw-r--r--tangle.mu963log stats plain blame
-rw-r--r--trace.arc.t73475log stats plain blame
-rw-r--r--trace.mu49823log stats plain blame
-rw-r--r--vimrc.vim25log stats plain blame
-rw-r--r--x.mu142log stats plain blame
3:31 -0700 4347' href='/akkartik/mu/commit/subx/017jump_relative.cc?h=main&id=fc455c969d1d193f2bd8cb4f139b7da74b719117'>fc455c96 ^
4a943d4e ^



83c67014 ^
4a943d4e ^











fc455c96 ^


0f851e48 ^
656b840e ^

82a24dfc ^
4a943d4e ^





83c67014 ^
4a943d4e ^











fc455c96 ^

50dcc0c1 ^

fc455c96 ^
066e01f8 ^
fc455c96 ^



94f2de6d ^
aaab91b8 ^
94f2de6d ^





fc455c96 ^
4a943d4e ^





83c67014 ^
4a943d4e ^











fc455c96 ^


0f851e48 ^
656b840e ^

82a24dfc ^
4a943d4e ^




83c67014 ^
4a943d4e ^











fc455c96 ^

50dcc0c1 ^

fc455c96 ^
066e01f8 ^
fc455c96 ^



94f2de6d ^







fc455c96 ^
4a943d4e ^




83c67014 ^
4a943d4e ^











fc455c96 ^


0f851e48 ^
656b840e ^

82a24dfc ^
4a943d4e ^





83c67014 ^
4a943d4e ^











fc455c96 ^

50dcc0c1 ^

fc455c96 ^
066e01f8 ^
fc455c96 ^



ce27f90f ^
94f2de6d ^






fc455c96 ^
4a943d4e ^





83c67014 ^
4a943d4e ^











fc455c96 ^


0f851e48 ^
656b840e ^

82a24dfc ^
4a943d4e ^





83c67014 ^
4a943d4e ^


















83c67014 ^
4a943d4e ^











fc455c96 ^

50dcc0c1 ^

fc455c96 ^
066e01f8 ^
fc455c96 ^



94f2de6d ^







fc455c96 ^
4a943d4e ^





83c67014 ^
4a943d4e ^











1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
                         


         
                                   
                                                    
 


                         
                     











                                                                                  

                                   

                                  
                                                                


                


                       
                                   
                                                                                    
 



                               
                     











                                                                                  

                                                 

                                  
           
                                                                  




                  



                            
                     











                                                                                  


                               
                                   
                                                                                              
 



                                
                     











                                                                                  

                                                 
                                   
                                  
            
                                                                  




                  



                             
                     











                                                                                  


                    
                                   

                                                                                                                        
 





                               
                     











                                                                                  

                                                 

                                           
                        
                                                                  



                  
                                           
                                  





                                                                  
 





                            
                     











                                                                                  


                             
                                   

                                                                                                                 
 




                                
                     











                                                                                  

                                                 

                                   
                 
                                                                  



                  







                                                                  
 




                             
                     











                                                                                  


                   
                                   

                                                                                                     
 





                               
                     











                                                                                  

                                                 

                                          
                 
                                                                  



                  
                                  






                                                                  
 





                            
                     











                                                                                  


                            
                                   

                                                                                                                           
 





                              
                     


















                                                                                  
                     











                                                                                  

                                                 

                                        
                       
                                                                  



                  







                                                                  
 





                                
                     











                                                                                  
//: jump to 32-bit offset

//:: jump

:(before "End Initialize Op Names")
put_new(Name, "e9", "jump disp32 bytes away (jmp)");

:(code)
void test_jump_disp32() {
  run(
      "== code 0x1\n"
      // op     ModR/M  SIB   displacement  immediate
      "  e9                   05 00 00 00               \n"  // skip 1 instruction
      "  05                                 00 00 00 01 \n"
      "  05                                 00 00 00 02 \n"
  );
  CHECK_TRACE_CONTENTS(
      "run: 0x00000001 opcode: e9\n"
      "run: jump 5\n"
      "run: 0x0000000b opcode: 05\n"
  );
  CHECK_TRACE_DOESNT_CONTAIN("run: 0x00000006 opcode: 05");
}

:(before "End Single-Byte Opcodes")
case 0xe9: {  // jump disp32
  const int32_t offset = next32();
  trace(Callstack_depth+1, "run") << "jump " << offset << end();
  EIP += offset;
  break;
}

//:: jump if equal/zero

:(before "End Initialize Op Names")
put_new(Name_0f, "84", "jump disp32 bytes away if equal, if ZF is set (jcc/jz/je)");

:(code)
void test_je_disp32_success() {
  ZF = true;
  run(
      "== code 0x1\n"
      // op     ModR/M  SIB   displacement  immediate
      "  0f 84                05 00 00 00               \n"  // skip 1 instruction
      "  05                                 00 00 00 01 \n"
      "  05                                 00 00 00 02 \n"
  );
  CHECK_TRACE_CONTENTS(
      "run: 0x00000001 opcode: 0f\n"
      "run: jump 5\n"
      "run: 0x0000000c opcode: 05\n"
  );
  CHECK_TRACE_DOESNT_CONTAIN("run: 0x00000007 opcode: 05");
}

:(before "End Two-Byte Opcodes Starting With 0f")
case 0x84: {  // jump disp32 if ZF
  const int32_t offset = next32();
  if (ZF) {
    trace(Callstack_depth+1, "run") << "jump " << offset << end();
    EIP += offset;
  }
  break;
}

:(code)
void test_je_disp32_fail() {
  ZF = false;
  run(
      "== code 0x1\n"
      // op     ModR/M  SIB   displacement  immediate
      "  0f 84                05 00 00 00               \n"  // skip 1 instruction
      "  05                                 00 00 00 01 \n"
      "  05                                 00 00 00 02 \n"
  );
  CHECK_TRACE_CONTENTS(
      "run: 0x00000001 opcode: 0f\n"
      "run: 0x00000007 opcode: 05\n"
      "run: 0x0000000c opcode: 05\n"
  );
  CHECK_TRACE_DOESNT_CONTAIN("run: jump 5");
}

//:: jump if not equal/not zero

:(before "End Initialize Op Names")
put_new(Name_0f, "85", "jump disp32 bytes away if not equal, if ZF is not set (jcc/jnz/jne)");

:(code)
void test_jne_disp32_success() {
  ZF = false;
  run(
      "== code 0x1\n"
      // op     ModR/M  SIB   displacement  immediate
      "  0f 85                05 00 00 00               \n"  // skip 1 instruction
      "  05                                 00 00 00 01 \n"
      "  05                                 00 00 00 02 \n"
  );
  CHECK_TRACE_CONTENTS(
      "run: 0x00000001 opcode: 0f\n"
      "run: jump 5\n"
      "run: 0x0000000c opcode: 05\n"
  );
  CHECK_TRACE_DOESNT_CONTAIN("run: 0x00000007 opcode: 05");
}

:(before "End Two-Byte Opcodes Starting With 0f")
case 0x85: {  // jump disp32 if !ZF
  const int32_t offset = next32();
  if (!ZF) {
    trace(Callstack_depth+1, "run") << "jump " << offset << end();
    EIP += offset;
  }
  break;
}

:(code)
void test_jne_disp32_fail() {
  ZF = true;
  run(
      "== code 0x1\n"
      // op     ModR/M  SIB   displacement  immediate
      "  0f 85                05 00 00 00               \n"  // skip 1 instruction
      "  05                                 00 00 00 01 \n"
      "  05                                 00 00 00 02 \n"
  );
  CHECK_TRACE_CONTENTS(
      "run: 0x00000001 opcode: 0f\n"
      "run: 0x00000007 opcode: 05\n"
      "run: 0x0000000c opcode: 05\n"
  );
  CHECK_TRACE_DOESNT_CONTAIN("run: jump 5");
}

//:: jump if greater

:(before "End Initialize Op Names")
put_new(Name_0f, "8f", "jump disp32 bytes away if greater, if ZF is unset and SF == OF (jcc/jg/jnle)");
put_new(Name_0f, "87", "jump disp32 bytes away if greater (addr, float), if ZF is unset and CF is unset (jcc/ja/jnbe)");

:(code)
void test_jg_disp32_success() {
  ZF = false;
  SF = false;
  OF = false;
  run(
      "== code 0x1\n"
      // op     ModR/M  SIB   displacement  immediate
      "  0f 8f                05 00 00 00               \n"  // skip 1 instruction
      "  05                                 00 00 00 01 \n"
      "  05                                 00 00 00 02 \n"
  );
  CHECK_TRACE_CONTENTS(
      "run: 0x00000001 opcode: 0f\n"
      "run: jump 5\n"
      "run: 0x0000000c opcode: 05\n"
  );
  CHECK_TRACE_DOESNT_CONTAIN("run: 0x00000007 opcode: 05");
}

:(before "End Two-Byte Opcodes Starting With 0f")
case 0x8f: {  // jump disp32 if !SF and !ZF
  const int32_t offset = next32();
  if (!ZF && SF == OF) {
    trace(Callstack_depth+1, "run") << "jump " << offset << end();
    EIP += offset;
  }
  break;
}
case 0x87: {  // jump disp32 if !CF and !ZF
  const int32_t offset = next32();
  if (!CF && !ZF) {
    trace(Callstack_depth+1, "run") << "jump " << offset << end();
    EIP += offset;
  }
  break;
}

:(code)
void test_jg_disp32_fail() {
  ZF = false;
  SF = true;
  OF = false;
  run(
      "== code 0x1\n"
      // op     ModR/M  SIB   displacement  immediate
      "  0f 8f                05 00 00 00               \n"  // skip 1 instruction
      "  05                                 00 00 00 01 \n"
      "  05                                 00 00 00 02 \n"
  );
  CHECK_TRACE_CONTENTS(
      "run: 0x00000001 opcode: 0f\n"
      "run: 0x00000007 opcode: 05\n"
      "run: 0x0000000c opcode: 05\n"
  );
  CHECK_TRACE_DOESNT_CONTAIN("run: jump 5");
}

//:: jump if greater or equal

:(before "End Initialize Op Names")
put_new(Name_0f, "8d", "jump disp32 bytes away if greater or equal, if SF == OF (jcc/jge/jnl)");
put_new(Name_0f, "83", "jump disp32 bytes away if greater or equal (addr, float), if CF is unset (jcc/jae/jnb)");

:(code)
void test_jge_disp32_success() {
  SF = false;
  OF = false;
  run(
      "== code 0x1\n"
      // op     ModR/M  SIB   displacement  immediate
      "  0f 8d                05 00 00 00               \n"  // skip 1 instruction
      "  05                                 00 00 00 01 \n"
      "  05                                 00 00 00 02 \n"
  );
  CHECK_TRACE_CONTENTS(
      "run: 0x00000001 opcode: 0f\n"
      "run: jump 5\n"
      "run: 0x0000000c opcode: 05\n"
  );
  CHECK_TRACE_DOESNT_CONTAIN("run: 0x00000007 opcode: 05");
}

:(before "End Two-Byte Opcodes Starting With 0f")
case 0x8d: {  // jump disp32 if !SF
  const int32_t offset = next32();
  if (SF == OF) {
    trace(Callstack_depth+1, "run") << "jump " << offset << end();
    EIP += offset;
  }
  break;
}
case 0x83: {  // jump disp32 if !CF
  const int32_t offset = next32();
  if (!CF) {
    trace(Callstack_depth+1, "run") << "jump " << offset << end();
    EIP += offset;
  }
  break;
}

:(code)
void test_jge_disp32_fail() {
  SF = true;
  OF = false;
  run(
      "== code 0x1\n"
      // op     ModR/M  SIB   displacement  immediate
      "  0f 8d                05 00 00 00               \n"  // skip 1 instruction
      "  05                                 00 00 00 01 \n"
      "  05                                 00 00 00 02 \n"
  );
  CHECK_TRACE_CONTENTS(
      "run: 0x00000001 opcode: 0f\n"
      "run: 0x00000007 opcode: 05\n"
      "run: 0x0000000c opcode: 05\n"
  );
  CHECK_TRACE_DOESNT_CONTAIN("run: jump 5");
}

//:: jump if lesser

:(before "End Initialize Op Names")
put_new(Name_0f, "8c", "jump disp32 bytes away if lesser, if SF != OF (jcc/jl/jnge)");
put_new(Name_0f, "82", "jump disp32 bytes away if lesser (addr, float), if CF is set (jcc/jb/jnae)");

:(code)
void test_jl_disp32_success() {
  ZF = false;
  SF = true;
  OF = false;
  run(
      "== code 0x1\n"
      // op     ModR/M  SIB   displacement  immediate
      "  0f 8c                05 00 00 00               \n"  // skip 1 instruction
      "  05                                 00 00 00 01 \n"
      "  05                                 00 00 00 02 \n"
  );
  CHECK_TRACE_CONTENTS(
      "run: 0x00000001 opcode: 0f\n"
      "run: jump 5\n"
      "run: 0x0000000c opcode: 05\n"
  );
  CHECK_TRACE_DOESNT_CONTAIN("run: 0x00000007 opcode: 05");
}

:(before "End Two-Byte Opcodes Starting With 0f")
case 0x8c: {  // jump disp32 if SF and !ZF
  const int32_t offset = next32();
  if (SF != OF) {
    trace(Callstack_depth+1, "run") << "jump " << offset << end();
    EIP += offset;
  }
  break;
}
case 0x82: {  // jump disp32 if CF
  const int32_t offset = next32();
  if (CF) {
    trace(Callstack_depth+1, "run") << "jump " << offset << end();
    EIP += offset;
  }
  break;
}

:(code)
void test_jl_disp32_fail() {
  ZF = false;
  SF = false;
  OF = false;
  run(
      "== code 0x1\n"
      // op     ModR/M  SIB   displacement  immediate
      "  0f 8c                05 00 00 00               \n"  // skip 1 instruction
      "  05                                 00 00 00 01 \n"
      "  05                                 00 00 00 02 \n"
  );
  CHECK_TRACE_CONTENTS(
      "run: 0x00000001 opcode: 0f\n"
      "run: 0x00000007 opcode: 05\n"
      "run: 0x0000000c opcode: 05\n"
  );
  CHECK_TRACE_DOESNT_CONTAIN("run: jump 5");
}

//:: jump if lesser or equal

:(before "End Initialize Op Names")
put_new(Name_0f, "8e", "jump disp32 bytes away if lesser or equal, if ZF is set or SF != OF (jcc/jle/jng)");
put_new(Name_0f, "86", "jump disp32 bytes away if lesser or equal (addr, float), if ZF is set or CF is set (jcc/jbe/jna)");

:(code)
void test_jle_disp32_equal() {
  ZF = true;
  SF = false;
  OF = false;
  run(
      "== code 0x1\n"
      // op     ModR/M  SIB   displacement  immediate
      "  0f 8e                05 00 00 00               \n"  // skip 1 instruction
      "  05                                 00 00 00 01 \n"
      "  05                                 00 00 00 02 \n"
  );
  CHECK_TRACE_CONTENTS(
      "run: 0x00000001 opcode: 0f\n"
      "run: jump 5\n"
      "run: 0x0000000c opcode: 05\n"
  );
  CHECK_TRACE_DOESNT_CONTAIN("run: 0x00000007 opcode: 05");
}

:(code)
void test_jle_disp32_lesser() {
  ZF = false;
  SF = true;
  OF = false;
  run(
      "== code 0x1\n"
      // op     ModR/M  SIB   displacement  immediate
      "  0f 8e                05 00 00 00               \n"  // skip 1 instruction
      "  05                                 00 00 00 01 \n"
      "  05                                 00 00 00 02 \n"
  );
  CHECK_TRACE_CONTENTS(
      "run: 0x00000001 opcode: 0f\n"
      "run: jump 5\n"
      "run: 0x0000000c opcode: 05\n"
  );
  CHECK_TRACE_DOESNT_CONTAIN("run: 0x00000007 opcode: 05");
}

:(before "End Two-Byte Opcodes Starting With 0f")
case 0x8e: {  // jump disp32 if SF or ZF
  const int32_t offset = next32();
  if (ZF || SF != OF) {
    trace(Callstack_depth+1, "run") << "jump " << offset << end();
    EIP += offset;
  }
  break;
}
case 0x86: {  // jump disp32 if ZF or CF
  const int32_t offset = next32();
  if (ZF || CF) {
    trace(Callstack_depth+1, "run") << "jump " << offset << end();
    EIP += offset;
  }
  break;
}

:(code)
void test_jle_disp32_greater() {
  ZF = false;
  SF = false;
  OF = false;
  run(
      "== code 0x1\n"
      // op     ModR/M  SIB   displacement  immediate
      "  0f 8e                05 00 00 00               \n"  // skip 1 instruction
      "  05                                 00 00 00 01 \n"
      "  05                                 00 00 00 02 \n"
  );
  CHECK_TRACE_CONTENTS(
      "run: 0x00000001 opcode: 0f\n"
      "run: 0x00000007 opcode: 05\n"
      "run: 0x0000000c opcode: 05\n"
  );
  CHECK_TRACE_DOESNT_CONTAIN("run: jump 5");
}