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<span id="L1" class="LineNr"> 1 </span><span class="Comment">//: operating on memory at the address provided by some register plus optional scale and offset</span>
<span id="L2" class="LineNr"> 2 </span>
<span id="L3" class="LineNr"> 3 </span><span class="Delimiter">:(scenario add_r32_to_mem_at_r32_with_sib)</span>
<span id="L4" class="LineNr"> 4 </span><span class="Special">% Reg[EBX].i = 0x10;</span>
<span id="L5" class="LineNr"> 5 </span><span class="Special">% Reg[EAX].i = 0x2000;</span>
<span id="L6" class="LineNr"> 6 </span>== <span class="Constant">0x1</span> <span class="Comment"># code segment</span>
<span id="L7" class="LineNr"> 7 </span><span class="Comment"># op ModR/M SIB displacement immediate</span>
<span id="L8" class="LineNr"> 8 </span> <span class="PreProc">0</span><span class="Constant">1</span> 1c <span class="Constant">20</span> <span class="Comment"># add EBX to *EAX</span>
<span id="L9" class="LineNr"> 9 </span><span class="Comment"># ModR/M in binary: 00 (indirect mode) 011 (src EBX) 100 (dest in SIB)</span>
<span id="L10" class="LineNr"> 10 </span><span class="Comment"># SIB in binary: 00 (scale 1) 100 (no index) 000 (base EAX)</span>
<span id="L11" class="LineNr"> 11 </span>== <span class="Constant">0x2000</span> <span class="Comment"># data segment</span>
<span id="L12" class="LineNr"> 12 </span><span class="PreProc">0</span><span class="Constant">1</span> <span class="PreProc">0</span><span class="Constant">0</span> <span class="PreProc">0</span><span class="Constant">0</span> <span class="PreProc">0</span><span class="Constant">0</span> <span class="Comment"># 1</span>
<span id="L13" class="LineNr"> 13 </span><span class="traceContains">+run: add EBX to r/m32</span>
<span id="L14" class="LineNr"> 14 </span><span class="traceContains">+run: effective address is initially 0x00002000 (EAX)</span>
<span id="L15" class="LineNr"> 15 </span><span class="traceContains">+run: effective address is 0x00002000</span>
<span id="L16" class="LineNr"> 16 </span><span class="traceContains">+run: storing 0x00000011</span>
<span id="L17" class="LineNr"> 17 </span>
<span id="L18" class="LineNr"> 18 </span><span class="Delimiter">:(before "End Mod 0 Special-cases(addr)")</span>
<span id="L19" class="LineNr"> 19 </span><span class="Normal">case</span> <span class="Constant">4</span>: <span class="Comment">// exception: mod 0b00 rm 0b100 => incoming SIB (scale-index-base) byte</span>
<span id="L20" class="LineNr"> 20 </span> addr = effective_address_from_sib<span class="Delimiter">(</span>mod<span class="Delimiter">);</span>
<span id="L21" class="LineNr"> 21 </span> <span class="Identifier">break</span><span class="Delimiter">;</span>
<span id="L22" class="LineNr"> 22 </span><span class="Delimiter">:(code)</span>
<span id="L23" class="LineNr"> 23 </span><span class="Normal">uint32_t</span> effective_address_from_sib<span class="Delimiter">(</span><span class="Normal">uint8_t</span> mod<span class="Delimiter">)</span> <span class="Delimiter">{</span>
<span id="L24" class="LineNr"> 24 </span> <span class="Normal">const</span> <span class="Normal">uint8_t</span> sib = next<span class="Delimiter">();</span>
<span id="L25" class="LineNr"> 25 </span> <span class="Normal">const</span> <span class="Normal">uint8_t</span> base = sib&<span class="Constant">0x7</span><span class="Delimiter">;</span>
<span id="L26" class="LineNr"> 26 </span> <span class="Normal">uint32_t</span> addr = <span class="Constant">0</span><span class="Delimiter">;</span>
<span id="L27" class="LineNr"> 27 </span> <span class="Normal">if</span> <span class="Delimiter">(</span>base != EBP || mod != <span class="Constant">0</span><span class="Delimiter">)</span> <span class="Delimiter">{</span>
<span id="L28" class="LineNr"> 28 </span> addr = Reg[base]<span class="Delimiter">.</span>u<span class="Delimiter">;</span>
<span id="L29" class="LineNr"> 29 </span> trace<span class="Delimiter">(</span><span class="Constant">90</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"effective address is initially 0x"</span> << HEXWORD << addr << <span class="Constant">" ("</span> << rname<span class="Delimiter">(</span>base<span class="Delimiter">)</span> << <span class="Constant">")"</span> << end<span class="Delimiter">();</span>
<span id="L30" class="LineNr"> 30 </span> <span class="Delimiter">}</span>
<span id="L31" class="LineNr"> 31 </span> <span class="Normal">else</span> <span class="Delimiter">{</span>
<span id="L32" class="LineNr"> 32 </span> <span class="Comment">// base == EBP && mod == 0</span>
<span id="L33" class="LineNr"> 33 </span> addr = next32<span class="Delimiter">();</span> <span class="Comment">// ignore base</span>
<span id="L34" class="LineNr"> 34 </span> trace<span class="Delimiter">(</span><span class="Constant">90</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"effective address is initially 0x"</span> << HEXWORD << addr << <span class="Constant">" (disp32)"</span> << end<span class="Delimiter">();</span>
<span id="L35" class="LineNr"> 35 </span> <span class="Delimiter">}</span>
<span id="L36" class="LineNr"> 36 </span> <span class="Normal">const</span> <span class="Normal">uint8_t</span> index = <span class="Delimiter">(</span>sib>><span class="Constant">3</span><span class="Delimiter">)</span>&<span class="Constant">0x7</span><span class="Delimiter">;</span>
<span id="L37" class="LineNr"> 37 </span> <span class="Normal">if</span> <span class="Delimiter">(</span>index == ESP<span class="Delimiter">)</span> <span class="Delimiter">{</span>
<span id="L38" class="LineNr"> 38 </span> <span class="Comment">// ignore index and scale</span>
<span id="L39" class="LineNr"> 39 </span> trace<span class="Delimiter">(</span><span class="Constant">90</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"effective address is 0x"</span> << HEXWORD << addr << end<span class="Delimiter">();</span>
<span id="L40" class="LineNr"> 40 </span> <span class="Delimiter">}</span>
<span id="L41" class="LineNr"> 41 </span> <span class="Normal">else</span> <span class="Delimiter">{</span>
<span id="L42" class="LineNr"> 42 </span> <span class="Normal">const</span> <span class="Normal">uint8_t</span> scale = <span class="Delimiter">(</span><span class="Constant">1</span> << <span class="Delimiter">(</span>sib>><span class="Constant">6</span><span class="Delimiter">));</span>
<span id="L43" class="LineNr"> 43 </span> addr += Reg[index]<span class="Delimiter">.</span>i*scale<span class="Delimiter">;</span> <span class="Comment">// treat index register as signed. Maybe base as well? But we'll always ensure it's non-negative.</span>
<span id="L44" class="LineNr"> 44 </span> trace<span class="Delimiter">(</span><span class="Constant">90</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"effective address is 0x"</span> << HEXWORD << addr << <span class="Constant">" (after adding "</span> << rname<span class="Delimiter">(</span>index<span class="Delimiter">)</span> << <span class="Constant">"*"</span> << NUM<span class="Delimiter">(</span>scale<span class="Delimiter">)</span> << <span class="Constant">")"</span> << end<span class="Delimiter">();</span>
<span id="L45" class="LineNr"> 45 </span> <span class="Delimiter">}</span>
<span id="L46" class="LineNr"> 46 </span> <span class="Identifier">return</span> addr<span class="Delimiter">;</span>
<span id="L47" class="LineNr"> 47 </span><span class="Delimiter">}</span>
<span id="L48" class="LineNr"> 48 </span>
<span id="L49" class="LineNr"> 49 </span><span class="Delimiter">:(scenario add_r32_to_mem_at_base_r32_index_r32)</span>
<span id="L50" class="LineNr"> 50 </span><span class="Special">% Reg[EBX].i = 0x10; // source</span>
<span id="L51" class="LineNr"> 51 </span><span class="Special">% Reg[EAX].i = 0x1ffe; // dest base</span>
<span id="L52" class="LineNr"> 52 </span><span class="Special">% Reg[ECX].i = 0x2; // dest index</span>
<span id="L53" class="LineNr"> 53 </span>== <span class="Constant">0x1</span> <span class="Comment"># code segment</span>
<span id="L54" class="LineNr"> 54 </span><span class="Comment"># op ModR/M SIB displacement immediate</span>
<span id="L55" class="LineNr"> 55 </span> <span class="PreProc">0</span><span class="Constant">1</span> 1c <span class="Error">08</span> <span class="Comment"># add EBX to *(EAX+ECX)</span>
<span id="L56" class="LineNr"> 56 </span><span class="Comment"># ModR/M in binary: 00 (indirect mode) 011 (src EBX) 100 (dest in SIB)</span>
<span id="L57" class="LineNr"> 57 </span><span class="Comment"># SIB in binary: 00 (scale 1) 001 (index ECX) 000 (base EAX)</span>
<span id="L58" class="LineNr"> 58 </span>== <span class="Constant">0x2000</span> <span class="Comment"># data segment</span>
<span id="L59" class="LineNr"> 59 </span><span class="PreProc">0</span><span class="Constant">1</span> <span class="PreProc">0</span><span class="Constant">0</span> <span class="PreProc">0</span><span class="Constant">0</span> <span class="PreProc">0</span><span class="Constant">0</span> <span class="Comment"># 1</span>
<span id="L60" class="LineNr"> 60 </span><span class="traceContains">+run: add EBX to r/m32</span>
<span id="L61" class="LineNr"> 61 </span><span class="traceContains">+run: effective address is initially 0x00001ffe (EAX)</span>
<span id="L62" class="LineNr"> 62 </span><span class="traceContains">+run: effective address is 0x00002000 (after adding ECX*1)</span>
<span id="L63" class="LineNr"> 63 </span><span class="traceContains">+run: storing 0x00000011</span>
<span id="L64" class="LineNr"> 64 </span>
<span id="L65" class="LineNr"> 65 </span><span class="Delimiter">:(scenario add_r32_to_mem_at_displacement_using_sib)</span>
<span id="L66" class="LineNr"> 66 </span><span class="Special">% Reg[EBX].i = 0x10; // source</span>
<span id="L67" class="LineNr"> 67 </span>== <span class="Constant">0x1</span> <span class="Comment"># code segment</span>
<span id="L68" class="LineNr"> 68 </span><span class="Comment"># op ModR/M SIB displacement immediate</span>
<span id="L69" class="LineNr"> 69 </span> <span class="PreProc">0</span><span class="Constant">1</span> 1c <span class="Constant">25</span> <span class="PreProc">0</span><span class="Constant">0</span> <span class="Constant">20</span> <span class="PreProc">0</span><span class="Constant">0</span> <span class="PreProc">0</span><span class="Constant">0</span> <span class="Comment"># add EBX to *0x2000</span>
<span id="L70" class="LineNr"> 70 </span><span class="Comment"># ModR/M in binary: 00 (indirect mode) 011 (src EBX) 100 (dest in SIB)</span>
<span id="L71" class="LineNr"> 71 </span><span class="Comment"># SIB in binary: 00 (scale 1) 100 (no index) 101 (not EBP but disp32)</span>
<span id="L72" class="LineNr"> 72 </span>== <span class="Constant">0x2000</span> <span class="Comment"># data segment</span>
<span id="L73" class="LineNr"> 73 </span><span class="PreProc">0</span><span class="Constant">1</span> <span class="PreProc">0</span><span class="Constant">0</span> <span class="PreProc">0</span><span class="Constant">0</span> <span class="PreProc">0</span><span class="Constant">0</span> <span class="Comment"># 1</span>
<span id="L74" class="LineNr"> 74 </span><span class="traceContains">+run: add EBX to r/m32</span>
<span id="L75" class="LineNr"> 75 </span><span class="traceContains">+run: effective address is initially 0x00002000 (disp32)</span>
<span id="L76" class="LineNr"> 76 </span><span class="traceContains">+run: effective address is 0x00002000</span>
<span id="L77" class="LineNr"> 77 </span><span class="traceContains">+run: storing 0x00000011</span>
<span id="L78" class="LineNr"> 78 </span>
<span id="L79" class="LineNr"> 79 </span><span class="Comment">//:</span>
<span id="L80" class="LineNr"> 80 </span>
<span id="L81" class="LineNr"> 81 </span><span class="Delimiter">:(scenario add_r32_to_mem_at_base_r32_index_r32_plus_disp8)</span>
<span id="L82" class="LineNr"> 82 </span><span class="Special">% Reg[EBX].i = 0x10; // source</span>
<span id="L83" class="LineNr"> 83 </span><span class="Special">% Reg[EAX].i = 0x1ff9; // dest base</span>
<span id="L84" class="LineNr"> 84 </span><span class="Special">% Reg[ECX].i = 0x5; // dest index</span>
<span id="L85" class="LineNr"> 85 </span>== <span class="Constant">0x1</span> <span class="Comment"># code segment</span>
<span id="L86" class="LineNr"> 86 </span><span class="Comment"># op ModR/M SIB displacement immediate</span>
<span id="L87" class="LineNr"> 87 </span> <span class="PreProc">0</span><span class="Constant">1</span> 5c <span class="Error">08</span> <span class="PreProc">0</span><span class="Constant">2</span> <span class="Comment"># add EBX to *(EAX+ECX+2)</span>
<span id="L88" class="LineNr"> 88 </span><span class="Comment"># ModR/M in binary: 01 (indirect+disp8 mode) 011 (src EBX) 100 (dest in SIB)</span>
<span id="L89" class="LineNr"> 89 </span><span class="Comment"># SIB in binary: 00 (scale 1) 001 (index ECX) 000 (base EAX)</span>
<span id="L90" class="LineNr"> 90 </span>== <span class="Constant">0x2000</span> <span class="Comment"># data segment</span>
<span id="L91" class="LineNr"> 91 </span><span class="PreProc">0</span><span class="Constant">1</span> <span class="PreProc">0</span><span class="Constant">0</span> <span class="PreProc">0</span><span class="Constant">0</span> <span class="PreProc">0</span><span class="Constant">0</span> <span class="Comment"># 1</span>
<span id="L92" class="LineNr"> 92 </span><span class="traceContains">+run: add EBX to r/m32</span>
<span id="L93" class="LineNr"> 93 </span><span class="traceContains">+run: effective address is initially 0x00001ff9 (EAX)</span>
<span id="L94" class="LineNr"> 94 </span><span class="traceContains">+run: effective address is 0x00001ffe (after adding ECX*1)</span>
<span id="L95" class="LineNr"> 95 </span><span class="traceContains">+run: effective address is 0x00002000 (after adding disp8)</span>
<span id="L96" class="LineNr"> 96 </span><span class="traceContains">+run: storing 0x00000011</span>
<span id="L97" class="LineNr"> 97 </span>
<span id="L98" class="LineNr"> 98 </span><span class="Delimiter">:(before "End Mod 1 Special-cases(addr)")</span>
<span id="L99" class="LineNr"> 99 </span><span class="Normal">case</span> <span class="Constant">4</span>: <span class="Comment">// exception: mod 0b01 rm 0b100 => incoming SIB (scale-index-base) byte</span>
<span id="L100" class="LineNr">100 </span> addr = effective_address_from_sib<span class="Delimiter">(</span>mod<span class="Delimiter">);</span>
<span id="L101" class="LineNr">101 </span> <span class="Identifier">break</span><span class="Delimiter">;</span>
<span id="L102" class="LineNr">102 </span>
<span id="L103" class="LineNr">103 </span><span class="Comment">//:</span>
<span id="L104" class="LineNr">104 </span>
<span id="L105" class="LineNr">105 </span><span class="Delimiter">:(scenario add_r32_to_mem_at_base_r32_index_r32_plus_disp32)</span>
<span id="L106" class="LineNr">106 </span><span class="Special">% Reg[EBX].i = 0x10; // source</span>
<span id="L107" class="LineNr">107 </span><span class="Special">% Reg[EAX].i = 0x1ff9; // dest base</span>
<span id="L108" class="LineNr">108 </span><span class="Special">% Reg[ECX].i = 0x5; // dest index</span>
<span id="L109" class="LineNr">109 </span>== <span class="Constant">0x1</span> <span class="Comment"># code segment</span>
<span id="L110" class="LineNr">110 </span><span class="Comment"># op ModR/M SIB displacement immediate</span>
<span id="L111" class="LineNr">111 </span> <span class="PreProc">0</span><span class="Constant">1</span> 9c <span class="Error">08</span> <span class="PreProc">0</span><span class="Constant">2</span> <span class="PreProc">0</span><span class="Constant">0</span> <span class="PreProc">0</span><span class="Constant">0</span> <span class="PreProc">0</span><span class="Constant">0</span> <span class="Comment"># add EBX to *(EAX+ECX+2)</span>
<span id="L112" class="LineNr">112 </span><span class="Comment"># ModR/M in binary: 10 (indirect+disp32 mode) 011 (src EBX) 100 (dest in SIB)</span>
<span id="L113" class="LineNr">113 </span><span class="Comment"># SIB in binary: 00 (scale 1) 001 (index ECX) 000 (base EAX)</span>
<span id="L114" class="LineNr">114 </span>== <span class="Constant">0x2000</span> <span class="Comment"># data segment</span>
<span id="L115" class="LineNr">115 </span><span class="PreProc">0</span><span class="Constant">1</span> <span class="PreProc">0</span><span class="Constant">0</span> <span class="PreProc">0</span><span class="Constant">0</span> <span class="PreProc">0</span><span class="Constant">0</span> <span class="Comment"># 1</span>
<span id="L116" class="LineNr">116 </span><span class="traceContains">+run: add EBX to r/m32</span>
<span id="L117" class="LineNr">117 </span><span class="traceContains">+run: effective address is initially 0x00001ff9 (EAX)</span>
<span id="L118" class="LineNr">118 </span><span class="traceContains">+run: effective address is 0x00001ffe (after adding ECX*1)</span>
<span id="L119" class="LineNr">119 </span><span class="traceContains">+run: effective address is 0x00002000 (after adding disp32)</span>
<span id="L120" class="LineNr">120 </span><span class="traceContains">+run: storing 0x00000011</span>
<span id="L121" class="LineNr">121 </span>
<span id="L122" class="LineNr">122 </span><span class="Delimiter">:(before "End Mod 2 Special-cases(addr)")</span>
<span id="L123" class="LineNr">123 </span><span class="Normal">case</span> <span class="Constant">4</span>: <span class="Comment">// exception: mod 0b10 rm 0b100 => incoming SIB (scale-index-base) byte</span>
<span id="L124" class="LineNr">124 </span> addr = effective_address_from_sib<span class="Delimiter">(</span>mod<span class="Delimiter">);</span>
<span id="L125" class="LineNr">125 </span> <span class="Identifier">break</span><span class="Delimiter">;</span>
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