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| author | Crystal <crystal@wizard.tower> | 2024-02-24 17:36:27 +0100 |
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| committer | Crystal <crystal@wizard.tower> | 2024-02-24 17:36:27 +0100 |
| commit | 9c369129fc44ce90088476387cd54665035a9505 (patch) | |
| tree | 152e595a0660ccd482884c5db14d7dce15be7dc6 | |
| parent | d76770c2a56bcc5cb795661d76e24f6116f26154 (diff) | |
| download | www-9c369129fc44ce90088476387cd54665035a9505.tar.gz | |
Add stuff
| -rw-r--r-- | blog/asm/1.html | 119 | ||||
| -rw-r--r-- | src/org/blog/assembly/1.org | 59 |
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diff --git a/blog/asm/1.html b/blog/asm/1.html new file mode 100644 index 0000000..e9efd34 --- /dev/null +++ b/blog/asm/1.html @@ -0,0 +1,119 @@ +<?xml version="1.0" encoding="utf-8"?> +<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" +"http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd"> +<html xmlns="http://www.w3.org/1999/xhtml" lang="en" xml:lang="en"> +<head> +<!-- 2024-02-24 Sat 17:36 --> +<meta http-equiv="Content-Type" content="text/html;charset=utf-8" /> +<meta name="viewport" content="width=device-width, initial-scale=1" /> +<title>x86 Assembly from my understanding</title> +<meta name="author" content="Crystal" /> +<meta name="generator" content="Org Mode" /> +<link rel="stylesheet" type="text/css" href="../../src/css/colors.css"/> +<link rel="stylesheet" type="text/css" href="../../src/css/style.css"/> +<link rel="icon" type="image/x-icon" href="../../../favicon.png"> +</head> +<body> +<div id="org-div-home-and-up"> + <a accesskey="h" href=""> UP </a> + | + <a accesskey="H" href="https://crystal.tilde.institute/"> HOME </a> +</div><div id="content" class="content"> +<h1 class="title">x86 Assembly from my understanding</h1> +<p> +Soooo this article (or maybe even a series of articles, who knows ?) will be about x86 assembly, or rather, what I understood from it and my road from the bottom-up hopefully reaching a good level of understanding +</p> +<div id="outline-container-org8392211" class="outline-2"> +<h2 id="org8392211">Memory :</h2> +<div class="outline-text-2" id="text-org8392211"> +<p> +Memory is a sequence of octets (Aka 8bits) that each have a unique integer assigned to them called <b>The Effective Address (EA)</b>, in this particular CPU Architecture (the i8086), the octet is designated by a couple (A segment number, and the offset in the segment) +</p> + + +<ul class="org-ul"> +<li>The Segment is a set of 64 consecutive Koctets (1 Koctet = 1024 octets).</li> +<li>And the offset is to specify the particular octet in that segment.</li> +</ul> + +<p> +The offset and segment are encoded in 16bits, so they take a value between 0 and 65535 +</p> +</div> +<div id="outline-container-orgb021039" class="outline-4"> +<h4 id="orgb021039">Important :</h4> +<div class="outline-text-4" id="text-orgb021039"> +<p> +The relation between the Effective Address and the Segment & Offset is as follow : +</p> + +<p> +<b><b>Effective address = 16 x segment + offset</b></b> keep in mind that this equation is encoded in decimal, which will change soon as we use Hexadecimal for convention reasons. +</p> +</div> +<ul class="org-ul"> +<li><a id="orgda02cd3"></a>Example :<br /> +<div class="outline-text-5" id="text-orgda02cd3"> +<p> +Let the Physical address (Or Effective Address, these two terms are enterchangeable) <b>12345h</b> (the h refers to Hexadecimal, which can also be written like this <b>0x12345</b>), the register <b>DS = 1230h</b> and the register <b>SI = 0045h</b>, the CPU calculates the physical address by multiplying the content of the segment register <b>DS</b> by 10h (or 16) and adding the content of the register <b>SI</b>. so we get : <b>1230h x 10h + 45h = 12345h</b> +</p> + + +<p> +Now if you are a clever one ( I know you are, since you are reading this <3 ) you may say that the physical address <b>12345h</b> can be written in more than one way….and you are right, more precisely : <b>2<sup>12</sup> = 4096</b> different ways !!! +</p> +</div> +</li> +</ul> +</div> +<div id="outline-container-orgd56c9fa" class="outline-3"> +<h3 id="orgd56c9fa">Registers</h3> +<div class="outline-text-3" id="text-orgd56c9fa"> +<p> +The 8086 CPU has 14 registers of 16bits of size. From the POV of the user, the 8086 has 3 groups of 4 registers of 16bits. One state register of 9bits and a counting program of 16bits inaccessible to the user (whatever this means). +</p> +</div> +<div id="outline-container-orgd10cc4b" class="outline-4"> +<h4 id="orgd10cc4b">General Registers</h4> +<div class="outline-text-4" id="text-orgd10cc4b"> +<p> +General registers contribute to arithmetic’s and logic and addressing too. +</p> + + +<p> +Each half-register is accessible as a register of 8bits, therefor making the 8086 backwards compatible with the 8080 (which had 8bit registers) +</p> + + +<p> +Now here are the Registers we can find in this section: +</p> + + +<p> +<b>AX</b>: This is the accumulator. It is of 16 bits and is divided into two 8-bit registers AH and AL to also perform 8-bit instructions. It is generally used for arithmetical and logical instructions but in 8086 microprocessor it is not mandatory to have an accumulator as the destination operand. Example: +</p> +<div class="org-src-container"> +<pre class="src src-asm"><span style="color: #89b4fa;">ADD</span> <span style="color: #cba6f7;">AX</span>, AX <span style="color: #6c7086;">;</span><span style="color: #6c7086;">(AX = AX + AX)</span> +</pre> +</div> + +<p> +<b>BX</b>: This is the base register. It is of 16 bits and is divided into two 8-bit registers BH and BL to also perform 8-bit instructions. It is used to store the value of the offset. Example: +</p> +<div class="org-src-container"> +<pre class="src src-asm"><span style="color: #89b4fa;">MOV</span> <span style="color: #cba6f7;">BL</span>, [<span style="color: #fab387;">500</span>] <span style="color: #6c7086;">;</span><span style="color: #6c7086;">(BL = 500H)</span> +</pre> +</div> +</div> +</div> +</div> +</div> +</div> +<div id="postamble" class="status"> +<p class="author">Author: Crystal</p> +<p class="date">Created: 2024-02-24 Sat 17:36</p> +</div> +</body> +</html> diff --git a/src/org/blog/assembly/1.org b/src/org/blog/assembly/1.org new file mode 100644 index 0000000..f5a1a59 --- /dev/null +++ b/src/org/blog/assembly/1.org @@ -0,0 +1,59 @@ +#+title: x86 Assembly from my understanding +#+OPTIONS: ^:{} +#+AUTHOR: Crystal +#+OPTIONS: num:nil +#+EXPORT_FILE_NAME: ../../../../blog/asm/1.html +#+HTML_HEAD: <link rel="stylesheet" type="text/css" href="../../src/css/colors.css"/> +#+HTML_HEAD: <link rel="stylesheet" type="text/css" href="../../src/css/style.css"/> +#+OPTIONS: html-style:nil +#+OPTIONS: toc:nil +#+HTML_HEAD: <link rel="icon" type="image/x-icon" href="../../../favicon.png"> +#+HTML_LINK_HOME: https://crystal.tilde.institute/ + + +Soooo this article (or maybe even a series of articles, who knows ?) will be about x86 assembly, or rather, what I understood from it and my road from the bottom-up hopefully reaching a good level of understanding + + +* Memory : +Memory is a sequence of octets (Aka 8bits) that each have a unique integer assigned to them called *The Effective Address (EA)*, in this particular CPU Architecture (the i8086), the octet is designated by a couple (A segment number, and the offset in the segment) + + +- The Segment is a set of 64 consecutive Koctets (1 Koctet = 1024 octets). +- And the offset is to specify the particular octet in that segment. + +The offset and segment are encoded in 16bits, so they take a value between 0 and 65535 + +*** Important : +The relation between the Effective Address and the Segment & Offset is as follow : + +**Effective address = 16 x segment + offset** keep in mind that this equation is encoded in decimal, which will change soon as we use Hexadecimal for convention reasons. + +**** Example : +Let the Physical address (Or Effective Address, these two terms are enterchangeable) *12345h* (the h refers to Hexadecimal, which can also be written like this *0x12345*), the register *DS = 1230h* and the register *SI = 0045h*, the CPU calculates the physical address by multiplying the content of the segment register *DS* by 10h (or 16) and adding the content of the register *SI*. so we get : *1230h x 10h + 45h = 12345h* + + +Now if you are a clever one ( I know you are, since you are reading this <3 ) you may say that the physical address *12345h* can be written in more than one way....and you are right, more precisely : *2^{12} = 4096* different ways !!! + +** Registers + +The 8086 CPU has 14 registers of 16bits of size. From the POV of the user, the 8086 has 3 groups of 4 registers of 16bits. One state register of 9bits and a counting program of 16bits inaccessible to the user (whatever this means). + +*** General Registers +General registers contribute to arithmetic's and logic and addressing too. + + +Each half-register is accessible as a register of 8bits, therefor making the 8086 backwards compatible with the 8080 (which had 8bit registers) + + +Now here are the Registers we can find in this section: + + +*AX*: This is the accumulator. It is of 16 bits and is divided into two 8-bit registers AH and AL to also perform 8-bit instructions. It is generally used for arithmetical and logical instructions but in 8086 microprocessor it is not mandatory to have an accumulator as the destination operand. Example: +#+BEGIN_SRC asm +ADD AX, AX ;(AX = AX + AX) +#+END_SRC + +*BX*: This is the base register. It is of 16 bits and is divided into two 8-bit registers BH and BL to also perform 8-bit instructions. It is used to store the value of the offset. Example: +#+BEGIN_SRC asm +MOV BL, [500] ;(BL = 500H) +#+END_SRC |