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authorCrystal <crystal@wizard.tower>2024-02-24 17:36:27 +0100
committerCrystal <crystal@wizard.tower>2024-02-24 17:36:27 +0100
commit9c369129fc44ce90088476387cd54665035a9505 (patch)
tree152e595a0660ccd482884c5db14d7dce15be7dc6 /src/org
parentd76770c2a56bcc5cb795661d76e24f6116f26154 (diff)
downloadwww-9c369129fc44ce90088476387cd54665035a9505.tar.gz
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+#+title: x86 Assembly from my understanding
+#+OPTIONS: ^:{}
+#+AUTHOR: Crystal
+#+OPTIONS: num:nil
+#+EXPORT_FILE_NAME: ../../../../blog/asm/1.html
+#+HTML_HEAD: <link rel="stylesheet" type="text/css" href="../../src/css/colors.css"/>
+#+HTML_HEAD: <link rel="stylesheet" type="text/css" href="../../src/css/style.css"/>
+#+OPTIONS: html-style:nil
+#+OPTIONS: toc:nil
+#+HTML_HEAD: <link rel="icon" type="image/x-icon" href="../../../favicon.png">
+#+HTML_LINK_HOME: https://crystal.tilde.institute/
+
+
+Soooo this article (or maybe even a series of articles, who knows ?) will be about x86 assembly, or rather, what I understood from it and my road from the bottom-up hopefully reaching a good level of understanding
+
+
+* Memory :
+Memory is a sequence of octets (Aka 8bits) that each have a unique integer assigned to them called *The Effective Address (EA)*, in this particular CPU Architecture (the i8086), the octet is designated by a couple (A segment number, and the offset in the segment)
+
+
+- The Segment is a set of 64 consecutive Koctets (1 Koctet = 1024 octets).
+- And the offset is to specify the particular octet in that segment.
+
+The offset and segment are encoded in 16bits, so they take a value between 0 and 65535
+
+*** Important :
+The relation between the Effective Address and the Segment & Offset is as follow :
+
+**Effective address = 16 x segment + offset** keep in mind that this equation is encoded in decimal, which will change soon as we use Hexadecimal for convention reasons.
+
+**** Example :
+Let the Physical address (Or Effective Address, these two terms are enterchangeable) *12345h* (the h refers to Hexadecimal, which can also be written like this *0x12345*), the register *DS = 1230h* and the register *SI = 0045h*, the CPU calculates the physical address by multiplying the content of the segment register *DS* by 10h (or 16) and adding the content of the register *SI*. so we get : *1230h x 10h + 45h = 12345h*
+
+
+Now if you are a clever one ( I know you are, since you are reading this <3 ) you may say that the physical address *12345h* can be written in more than one way....and you are right, more precisely : *2^{12} = 4096* different ways !!!
+
+** Registers
+
+The 8086 CPU has 14 registers of 16bits of size. From the POV of the user, the 8086 has 3 groups of 4 registers of 16bits. One state register of 9bits and a counting program of 16bits inaccessible to the user (whatever this means).
+
+*** General Registers
+General registers contribute to arithmetic's and logic and addressing too.
+
+
+Each half-register is accessible as a register of 8bits, therefor making the 8086 backwards compatible with the 8080 (which had 8bit registers)
+
+
+Now here are the Registers we can find in this section:
+
+
+*AX*: This is the accumulator. It is of 16 bits and is divided into two 8-bit registers AH and AL to also perform 8-bit instructions. It is generally used for arithmetical and logical instructions but in 8086 microprocessor it is not mandatory to have an accumulator as the destination operand. Example:
+#+BEGIN_SRC asm
+ADD AX, AX ;(AX = AX + AX)
+#+END_SRC
+
+*BX*: This is the base register. It is of 16 bits and is divided into two 8-bit registers BH and BL to also perform 8-bit instructions. It is used to store the value of the offset. Example:
+#+BEGIN_SRC asm
+MOV BL, [500] ;(BL = 500H)
+#+END_SRC
00:44 -0800 committer Kartik K. Agaram <vc@akkartik.com> 2015-01-17 17:00:44 -0800 578 - switch to non-polymorphic 'print' functions' href='/akkartik/mu/commit/generic.mu?h=hlt&id=4b62edd8a63cfdde37b0537c9be1e91062bb2892'>4b62edd8 ^
7d2c2d55 ^
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