summary refs log tree commit diff stats
path: root/src/org
diff options
context:
space:
mode:
Diffstat (limited to 'src/org')
-rw-r--r--src/org/blog/assembly/1.org68
1 files changed, 44 insertions, 24 deletions
diff --git a/src/org/blog/assembly/1.org b/src/org/blog/assembly/1.org
index daa4976..fa77e49 100644
--- a/src/org/blog/assembly/1.org
+++ b/src/org/blog/assembly/1.org
@@ -68,42 +68,62 @@ LOOP
 #+BEGIN_SRC asm
 MUL BX (DX, AX = AX * BX)
 #+END_SRC
+** Addressing and registers...again
+*** I realized what I wrote here before was almost gibberish, sooo here we go again I guess ?
 
-*** Offset/Address Registers
-*SP*: This is the stack pointer. It is of 16 bits. It points to the topmost item of the stack. If the stack is empty the stack pointer will be (FFFE)H (or 65534 in decimal). Its offset address is relative to the stack segment(SS).
+Well lets take a step back to the notion of effective addresses VS relative ones.
+*** Effective = 10h x Segment + Offset . Part1
+When trying to access a specific memory space, we use this annotation *[Segment:Offset]*, so for example, and assuming *DS = 0100h*. We want to write the value *0x0005* to the memory space defined by the physical address *1234h*, what do we do ?
+**** Answer :
+#+BEGIN_SRC asm
+MOV [DS:0234h], 0x0005
+#+END_SRC
 
-*BP*: This is the base pointer. It is of 16 bits. It is primarily used in accessing parameters passed by the stack. Its offset address is relative to the stack segment(SS).
+Why ? Let's break it down :
+[[../../../gifs/lain-dance.gif]]
 
-*SI*: This is the source index register. It is of 16 bits. It is used in the pointer addressing of data and as a source in some string-related operations. Its offset is relative to the data segment(DS).
 
-*DI*: This is the destination index register. It is of 16 bits. It is used in the pointer addressing of data and as a destination in some string-related operations. Its offset is relative to the extra segment(ES).
 
-*** Segment Registers
-*CS*: Code Segment, it defines the start of the program memory, and the different addresses of the different instructions relative to CS.
+We Already know that *Effective = 10h x Segment + Offset*, So here we have : *1234h = 10h x DS + Offset*, we already know that *DS = 0100h*, we end up with this simple equation *1234h = 1000h + Offset*, therefor the Offset is *0234h*
 
-*DS*: Data Segment, defines the start of the data memory where we store all data processed by the program.
 
-*SS*: Stack Segment, or the start of the pile. The pile is a memory zone that is managed in a particular way, it's like a pile of plates, where we can only remove and add plates on top of the pile. Only one address register is enough to manage it, its the stack pointer SP. We say that this pile is a LIFO pile (Last IN, First OUT)
+Simple, right ?, now for another example
+*** Another example :
+What if we now have this instruction ?
+#+BEGIN_SRC asm
+    MOV [0234h], 0x0005
+#+END_SRC
+What does it do ? You might or might not be surprised that it does the exact same thing as the other snipped of code, why though ? Because apparently and for some odd reason I don't know, the compiler Implicitly assumes that the segment used is the *DS* one. So if you don't specify a register( we will get to this later ), or a segment. Then the offset is considered an offset with a DS segment.
+
 
-*EX*: The start of an auxiliary segment for data
 
-** The format of an address:
-An Address must have this fellowing form [RS : RO] with the following possibilities:
+*** Segment + Register <3
 
-- A value : Nothing
-- ES : DI
-- CS : SI
-- ES : BP
-- DS : BX
+Consider *DS = 0100h* and *BX = BP = 0234h* and this code snippet:
+#+BEGIN_SRC asm
+    MOV [BX], 0x0005 ; NOTE : ITS NOT THE SAME AS MOV BX, 0x0005. Refer to earlier paragraphs
+#+END_SRC
 
-*** Note 1 :
-When the register isn't specified. the CPU adds it depending on the offset used :
 
+Well you guessed it right, it also does the same thing, but now consider this :
+#+BEGIN_SRC asm
+    MOV [BP], 0x0005
+#+END_SRC
+
+If you answered that its the same one, you are wrong. And this is because the segment used changes according to the offset as I said before in an implicit way. Here is the explicit equivalent of the two commands above:
+#+BEGIN_SRC asm
+    MOV [DS:BX], 0x0005
+    MOV [SS:BP], 0x0005
+#+END_SRC
+
+The General rule of thumb is as follows :
 - If the offset is : DI SI or BX, the Segment used is DS.
-- If its BP, then the segment is SS.
+- If its BP or SP, then the segment is SS.
 
-*** Note 2 :
-Apparently we will assume that we are in the DS segment and only access to memory using the offset.
 
-*** Note 3 :
-The values of the registers CS DS and SS are automatically initialized by the OS when launching the program. So these segments are implicit. AKA : If we want to access a specific data in memory, we just need to specify its offset.
+**** Note
+The values of the registers CS DS and SS are automatically initialized by the OS when launching the program. So these segments are implicit. AKA : If we want to access a specific data in memory, we just need to specify its offset. Also you can't write directly into the DS or CS segment registers, so something like
+#+BEGIN_SRC asm
+MOV DS, 0x0005 ; Is INVALID
+MOV DS, AX ; This one is VALID
+#+END_SRC
>278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529