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| author | Kartik K. Agaram <vc@akkartik.com> | 2017-10-13 01:27:51 -0700 |
|---|---|---|
| committer | Kartik K. Agaram <vc@akkartik.com> | 2017-10-13 01:27:51 -0700 |
| commit | ba2ec7250d4060e8ebf4a54c31f87d03ab9d8e27 (patch) | |
| tree | a359c7841f16f12d4e78dd47168a092dc410f999 /html/subx/011direct_addressing.cc.html | |
| parent | 5a25c6e66f78b0c5588af9de8d42e30e0d2232f3 (diff) | |
| download | mu-ba2ec7250d4060e8ebf4a54c31f87d03ab9d8e27.tar.gz | |
4059
Diffstat (limited to 'html/subx/011direct_addressing.cc.html')
| -rw-r--r-- | html/subx/011direct_addressing.cc.html | 231 |
1 files changed, 159 insertions, 72 deletions
diff --git a/html/subx/011direct_addressing.cc.html b/html/subx/011direct_addressing.cc.html index 42dd9ea1..97745fd0 100644 --- a/html/subx/011direct_addressing.cc.html +++ b/html/subx/011direct_addressing.cc.html @@ -15,19 +15,20 @@ body { font-size: 12pt; font-family: monospace; color: #aaaaaa; background-color a { color:#eeeeee; text-decoration: none; } a:hover { text-decoration: underline; } * { font-size: 12pt; font-size: 1em; } -.Constant { color: #00a0a0; } -.Special { color: #c00000; } -.Conceal { color: #4e4e4e; } .SalientComment { color: #00ffff; } -.Comment { color: #9090ff; } -.Comment a { color:#0000ee; text-decoration:underline; } -.Delimiter { color: #800080; } .LineNr { color: #444444; } -.Identifier { color: #c0a020; } +.Error { color: #ffffff; background-color: #ff6060; padding-bottom: 1px; } +.Delimiter { color: #800080; } .Normal { color: #aaaaaa; background-color: #080808; padding-bottom: 1px; } -.PreProc { color: #800080; } .cSpecial { color: #008000; } +.Conceal { color: #4e4e4e; } +.Comment { color: #9090ff; } +.Comment a { color:#0000ee; text-decoration:underline; } +.Constant { color: #00a0a0; } +.Special { color: #c00000; } +.Identifier { color: #c0a020; } .traceContains { color: #008000; } +.PreProc { color: #800080; } --> </style> @@ -62,70 +63,156 @@ if ('onhashchange' in window) { </head> <body onload='JumpToLine();'> <pre id='vimCodeElement'> -<span id="L1" class="LineNr"> 1 </span><span class="Comment">//: operating directly on a register</span> -<span id="L2" class="LineNr"> 2 </span> -<span id="L3" class="LineNr"> 3 </span><span class="Delimiter">:(scenario add_r32_to_r32)</span> -<span id="L4" class="LineNr"> 4 </span><span class="Special">% Reg[0].i = 0x10;</span> -<span id="L5" class="LineNr"> 5 </span><span class="Special">% Reg[3].i = 1;</span> -<span id="L6" class="LineNr"> 6 </span><span class="Comment"># op ModR/M SIB displacement immediate</span> -<span id="L7" class="LineNr"> 7 </span> <span class="PreProc">0</span><span class="Constant">1</span> d8 <span class="Comment"># add EBX (reg 3) to EAX (reg 0)</span> -<span id="L8" class="LineNr"> 8 </span><span class="traceContains">+run: add <a href='010core.cc.html#L15'>reg</a> 3 to effective address</span> -<span id="L9" class="LineNr"> 9 </span><span class="traceContains">+run: effective address is <a href='010core.cc.html#L15'>reg</a> 0</span> -<span id="L10" class="LineNr">10 </span><span class="traceContains">+run: storing 0x00000011</span> -<span id="L11" class="LineNr">11 </span> -<span id="L12" class="LineNr">12 </span><span class="Delimiter">:(before "End Single-Byte Opcodes")</span> -<span id="L13" class="LineNr">13 </span><span class="Normal">case</span> <span class="Constant">0x01</span>: <span class="Delimiter">{</span> <span class="Comment">// add r32 to r/m32</span> -<span id="L14" class="LineNr">14 </span> <span class="Normal">uint8_t</span> modrm = <a href='010core.cc.html#L202'>next</a><span class="Delimiter">();</span> -<span id="L15" class="LineNr">15 </span> <span class="Normal">uint8_t</span> arg2 = <span class="Delimiter">(</span>modrm>><span class="Constant">3</span><span class="Delimiter">)</span>&<span class="Constant">0x7</span><span class="Delimiter">;</span> -<span id="L16" class="LineNr">16 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"add <a href='010core.cc.html#L15'>reg</a> "</span> << <a href='010core.cc.html#L220'>NUM</a><span class="Delimiter">(</span>arg2<span class="Delimiter">)</span> << <span class="Constant">" to effective address"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span> -<span id="L17" class="LineNr">17 </span> <span class="Normal">int32_t</span>* arg1 = <a href='011direct_addressing.cc.html#L26'>effective_address</a><span class="Delimiter">(</span>modrm<span class="Delimiter">);</span> -<span id="L18" class="LineNr">18 </span> <a href='010core.cc.html#L39'>BINARY_ARITHMETIC_OP</a><span class="Delimiter">(</span>+<span class="Delimiter">,</span> *arg1<span class="Delimiter">,</span> Reg[arg2]<span class="Delimiter">.</span><a href='010core.cc.html#L16'>i</a><span class="Delimiter">);</span> -<span id="L19" class="LineNr">19 </span> <span class="Identifier">break</span><span class="Delimiter">;</span> -<span id="L20" class="LineNr">20 </span><span class="Delimiter">}</span> -<span id="L21" class="LineNr">21 </span> -<span id="L22" class="LineNr">22 </span><span class="Delimiter">:(code)</span> -<span id="L23" class="LineNr">23 </span><span class="Comment">// Implement tables 2-2 and 2-3 in the Intel manual, Volume 2.</span> -<span id="L24" class="LineNr">24 </span><span class="Comment">// We return a pointer so that instructions can write to multiple bytes in</span> -<span id="L25" class="LineNr">25 </span><span class="Comment">// 'Mem' at once.</span> -<span id="L26" class="LineNr">26 </span><span class="Normal">int32_t</span>* <a href='011direct_addressing.cc.html#L26'>effective_address</a><span class="Delimiter">(</span><span class="Normal">uint8_t</span> modrm<span class="Delimiter">)</span> <span class="Delimiter">{</span> -<span id="L27" class="LineNr">27 </span> <span class="Normal">uint8_t</span> mod = <span class="Delimiter">(</span>modrm>><span class="Constant">6</span><span class="Delimiter">);</span> -<span id="L28" class="LineNr">28 </span> <span class="Comment">// ignore middle 3 'reg opcode' bits</span> -<span id="L29" class="LineNr">29 </span> <span class="Normal">uint8_t</span> rm = modrm & <span class="Constant">0x7</span><span class="Delimiter">;</span> -<span id="L30" class="LineNr">30 </span> <span class="Normal">int32_t</span>* result = <span class="Constant">0</span><span class="Delimiter">;</span> -<span id="L31" class="LineNr">31 </span> <span class="Normal">switch</span> <span class="Delimiter">(</span>mod<span class="Delimiter">)</span> <span class="Delimiter">{</span> -<span id="L32" class="LineNr">32 </span> <span class="Normal">case</span> <span class="Constant">3</span>: -<span id="L33" class="LineNr">33 </span> <span class="Conceal">¦</span> <span class="Comment">// mod 3 is just register direct addressing</span> -<span id="L34" class="LineNr">34 </span> <span class="Conceal">¦</span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"effective address is <a href='010core.cc.html#L15'>reg</a> "</span> << <a href='010core.cc.html#L220'>NUM</a><span class="Delimiter">(</span>rm<span class="Delimiter">)</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span> -<span id="L35" class="LineNr">35 </span> <span class="Conceal">¦</span> result = &Reg[rm]<span class="Delimiter">.</span><a href='010core.cc.html#L16'>i</a><span class="Delimiter">;</span> -<span id="L36" class="LineNr">36 </span> <span class="Conceal">¦</span> <span class="Identifier">break</span><span class="Delimiter">;</span> -<span id="L37" class="LineNr">37 </span> <span class="Comment">// End Mod Special-cases</span> -<span id="L38" class="LineNr">38 </span> <span class="Normal">default</span>: -<span id="L39" class="LineNr">39 </span> <span class="Conceal">¦</span> cerr << <span class="Constant">"unrecognized mod bits: "</span> << <a href='010core.cc.html#L220'>NUM</a><span class="Delimiter">(</span>mod<span class="Delimiter">)</span> << <span class="cSpecial">'\n'</span><span class="Delimiter">;</span> -<span id="L40" class="LineNr">40 </span> <span class="Conceal">¦</span> exit<span class="Delimiter">(</span><span class="Constant">1</span><span class="Delimiter">);</span> -<span id="L41" class="LineNr">41 </span> <span class="Delimiter">}</span> -<span id="L42" class="LineNr">42 </span> <span class="Identifier">return</span> result<span class="Delimiter">;</span> -<span id="L43" class="LineNr">43 </span><span class="Delimiter">}</span> -<span id="L44" class="LineNr">44 </span> -<span id="L45" class="LineNr">45 </span><span class="SalientComment">//:: subtract</span> -<span id="L46" class="LineNr">46 </span> -<span id="L47" class="LineNr">47 </span><span class="Delimiter">:(scenario subtract_r32_from_r32)</span> -<span id="L48" class="LineNr">48 </span><span class="Special">% Reg[0].i = 10;</span> -<span id="L49" class="LineNr">49 </span><span class="Special">% Reg[3].i = 1;</span> -<span id="L50" class="LineNr">50 </span><span class="Comment"># op ModR/M SIB displacement immediate</span> -<span id="L51" class="LineNr">51 </span> <span class="Constant">29</span> d8 <span class="Comment"># subtract EBX (reg 3) from EAX (reg 0)</span> -<span id="L52" class="LineNr">52 </span><span class="traceContains">+run: subtract <a href='010core.cc.html#L15'>reg</a> 3 from effective address</span> -<span id="L53" class="LineNr">53 </span><span class="traceContains">+run: effective address is <a href='010core.cc.html#L15'>reg</a> 0</span> -<span id="L54" class="LineNr">54 </span><span class="traceContains">+run: storing 0x00000009</span> -<span id="L55" class="LineNr">55 </span> -<span id="L56" class="LineNr">56 </span><span class="Delimiter">:(before "End Single-Byte Opcodes")</span> -<span id="L57" class="LineNr">57 </span><span class="Normal">case</span> <span class="Constant">0x29</span>: <span class="Delimiter">{</span> <span class="Comment">// subtract r32 from r/m32</span> -<span id="L58" class="LineNr">58 </span> <span class="Normal">uint8_t</span> modrm = <a href='010core.cc.html#L202'>next</a><span class="Delimiter">();</span> -<span id="L59" class="LineNr">59 </span> <span class="Normal">uint8_t</span> arg2 = <span class="Delimiter">(</span>modrm>><span class="Constant">3</span><span class="Delimiter">)</span>&<span class="Constant">0x7</span><span class="Delimiter">;</span> -<span id="L60" class="LineNr">60 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"subtract <a href='010core.cc.html#L15'>reg</a> "</span> << <a href='010core.cc.html#L220'>NUM</a><span class="Delimiter">(</span>arg2<span class="Delimiter">)</span> << <span class="Constant">" from effective address"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span> -<span id="L61" class="LineNr">61 </span> <span class="Normal">int32_t</span>* arg1 = <a href='011direct_addressing.cc.html#L26'>effective_address</a><span class="Delimiter">(</span>modrm<span class="Delimiter">);</span> -<span id="L62" class="LineNr">62 </span> <a href='010core.cc.html#L39'>BINARY_ARITHMETIC_OP</a><span class="Delimiter">(</span>-<span class="Delimiter">,</span> *arg1<span class="Delimiter">,</span> Reg[arg2]<span class="Delimiter">.</span><a href='010core.cc.html#L16'>i</a><span class="Delimiter">);</span> -<span id="L63" class="LineNr">63 </span> <span class="Identifier">break</span><span class="Delimiter">;</span> -<span id="L64" class="LineNr">64 </span><span class="Delimiter">}</span> +<span id="L1" class="LineNr"> 1 </span><span class="Comment">//: operating directly on a register</span> +<span id="L2" class="LineNr"> 2 </span> +<span id="L3" class="LineNr"> 3 </span><span class="Delimiter">:(scenario add_r32_to_r32)</span> +<span id="L4" class="LineNr"> 4 </span><span class="Special">% Reg[0].i = 0x10;</span> +<span id="L5" class="LineNr"> 5 </span><span class="Special">% Reg[3].i = 1;</span> +<span id="L6" class="LineNr"> 6 </span><span class="Comment"># op ModR/M SIB displacement immediate</span> +<span id="L7" class="LineNr"> 7 </span> <span class="PreProc">0</span><span class="Constant">1</span> d8 <span class="Comment"># add EBX (reg 3) to EAX (reg 0)</span> +<span id="L8" class="LineNr"> 8 </span><span class="traceContains">+run: add <a href='010core.cc.html#L15'>reg</a> 3 to effective address</span> +<span id="L9" class="LineNr"> 9 </span><span class="traceContains">+run: effective address is <a href='010core.cc.html#L15'>reg</a> 0</span> +<span id="L10" class="LineNr"> 10 </span><span class="traceContains">+run: storing 0x00000011</span> +<span id="L11" class="LineNr"> 11 </span> +<span id="L12" class="LineNr"> 12 </span><span class="Delimiter">:(before "End Single-Byte Opcodes")</span> +<span id="L13" class="LineNr"> 13 </span><span class="Normal">case</span> <span class="Constant">0x01</span>: <span class="Delimiter">{</span> <span class="Comment">// add r32 to r/m32</span> +<span id="L14" class="LineNr"> 14 </span> <span class="Normal">uint8_t</span> modrm = <a href='010core.cc.html#L202'>next</a><span class="Delimiter">();</span> +<span id="L15" class="LineNr"> 15 </span> <span class="Normal">uint8_t</span> arg2 = <span class="Delimiter">(</span>modrm>><span class="Constant">3</span><span class="Delimiter">)</span>&<span class="Constant">0x7</span><span class="Delimiter">;</span> +<span id="L16" class="LineNr"> 16 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"add <a href='010core.cc.html#L15'>reg</a> "</span> << <a href='010core.cc.html#L220'>NUM</a><span class="Delimiter">(</span>arg2<span class="Delimiter">)</span> << <span class="Constant">" to effective address"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span> +<span id="L17" class="LineNr"> 17 </span> <span class="Normal">int32_t</span>* arg1 = <a href='011direct_addressing.cc.html#L26'>effective_address</a><span class="Delimiter">(</span>modrm<span class="Delimiter">);</span> +<span id="L18" class="LineNr"> 18 </span> <a href='010core.cc.html#L39'>BINARY_ARITHMETIC_OP</a><span class="Delimiter">(</span>+<span class="Delimiter">,</span> *arg1<span class="Delimiter">,</span> Reg[arg2]<span class="Delimiter">.</span><a href='010core.cc.html#L16'>i</a><span class="Delimiter">);</span> +<span id="L19" class="LineNr"> 19 </span> <span class="Identifier">break</span><span class="Delimiter">;</span> +<span id="L20" class="LineNr"> 20 </span><span class="Delimiter">}</span> +<span id="L21" class="LineNr"> 21 </span> +<span id="L22" class="LineNr"> 22 </span><span class="Delimiter">:(code)</span> +<span id="L23" class="LineNr"> 23 </span><span class="Comment">// Implement tables 2-2 and 2-3 in the Intel manual, Volume 2.</span> +<span id="L24" class="LineNr"> 24 </span><span class="Comment">// We return a pointer so that instructions can write to multiple bytes in</span> +<span id="L25" class="LineNr"> 25 </span><span class="Comment">// 'Mem' at once.</span> +<span id="L26" class="LineNr"> 26 </span><span class="Normal">int32_t</span>* <a href='011direct_addressing.cc.html#L26'>effective_address</a><span class="Delimiter">(</span><span class="Normal">uint8_t</span> modrm<span class="Delimiter">)</span> <span class="Delimiter">{</span> +<span id="L27" class="LineNr"> 27 </span> <span class="Normal">uint8_t</span> mod = <span class="Delimiter">(</span>modrm>><span class="Constant">6</span><span class="Delimiter">);</span> +<span id="L28" class="LineNr"> 28 </span> <span class="Comment">// ignore middle 3 'reg opcode' bits</span> +<span id="L29" class="LineNr"> 29 </span> <span class="Normal">uint8_t</span> rm = modrm & <span class="Constant">0x7</span><span class="Delimiter">;</span> +<span id="L30" class="LineNr"> 30 </span> <span class="Normal">int32_t</span>* result = <span class="Constant">0</span><span class="Delimiter">;</span> +<span id="L31" class="LineNr"> 31 </span> <span class="Normal">switch</span> <span class="Delimiter">(</span>mod<span class="Delimiter">)</span> <span class="Delimiter">{</span> +<span id="L32" class="LineNr"> 32 </span> <span class="Normal">case</span> <span class="Constant">3</span>: +<span id="L33" class="LineNr"> 33 </span> <span class="Conceal">¦</span> <span class="Comment">// mod 3 is just register direct addressing</span> +<span id="L34" class="LineNr"> 34 </span> <span class="Conceal">¦</span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"effective address is <a href='010core.cc.html#L15'>reg</a> "</span> << <a href='010core.cc.html#L220'>NUM</a><span class="Delimiter">(</span>rm<span class="Delimiter">)</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span> +<span id="L35" class="LineNr"> 35 </span> <span class="Conceal">¦</span> result = &Reg[rm]<span class="Delimiter">.</span><a href='010core.cc.html#L16'>i</a><span class="Delimiter">;</span> +<span id="L36" class="LineNr"> 36 </span> <span class="Conceal">¦</span> <span class="Identifier">break</span><span class="Delimiter">;</span> +<span id="L37" class="LineNr"> 37 </span> <span class="Comment">// End Mod Special-cases</span> +<span id="L38" class="LineNr"> 38 </span> <span class="Normal">default</span>: +<span id="L39" class="LineNr"> 39 </span> <span class="Conceal">¦</span> cerr << <span class="Constant">"unrecognized mod bits: "</span> << <a href='010core.cc.html#L220'>NUM</a><span class="Delimiter">(</span>mod<span class="Delimiter">)</span> << <span class="cSpecial">'\n'</span><span class="Delimiter">;</span> +<span id="L40" class="LineNr"> 40 </span> <span class="Conceal">¦</span> exit<span class="Delimiter">(</span><span class="Constant">1</span><span class="Delimiter">);</span> +<span id="L41" class="LineNr"> 41 </span> <span class="Delimiter">}</span> +<span id="L42" class="LineNr"> 42 </span> <span class="Identifier">return</span> result<span class="Delimiter">;</span> +<span id="L43" class="LineNr"> 43 </span><span class="Delimiter">}</span> +<span id="L44" class="LineNr"> 44 </span> +<span id="L45" class="LineNr"> 45 </span><span class="SalientComment">//:: subtract</span> +<span id="L46" class="LineNr"> 46 </span> +<span id="L47" class="LineNr"> 47 </span><span class="Delimiter">:(scenario subtract_r32_from_r32)</span> +<span id="L48" class="LineNr"> 48 </span><span class="Special">% Reg[0].i = 10;</span> +<span id="L49" class="LineNr"> 49 </span><span class="Special">% Reg[3].i = 1;</span> +<span id="L50" class="LineNr"> 50 </span><span class="Comment"># op ModR/M SIB displacement immediate</span> +<span id="L51" class="LineNr"> 51 </span> <span class="Constant">29</span> d8 <span class="Comment"># subtract EBX (reg 3) from EAX (reg 0)</span> +<span id="L52" class="LineNr"> 52 </span><span class="traceContains">+run: subtract <a href='010core.cc.html#L15'>reg</a> 3 from effective address</span> +<span id="L53" class="LineNr"> 53 </span><span class="traceContains">+run: effective address is <a href='010core.cc.html#L15'>reg</a> 0</span> +<span id="L54" class="LineNr"> 54 </span><span class="traceContains">+run: storing 0x00000009</span> +<span id="L55" class="LineNr"> 55 </span> +<span id="L56" class="LineNr"> 56 </span><span class="Delimiter">:(before "End Single-Byte Opcodes")</span> +<span id="L57" class="LineNr"> 57 </span><span class="Normal">case</span> <span class="Constant">0x29</span>: <span class="Delimiter">{</span> <span class="Comment">// subtract r32 from r/m32</span> +<span id="L58" class="LineNr"> 58 </span> <span class="Normal">uint8_t</span> modrm = <a href='010core.cc.html#L202'>next</a><span class="Delimiter">();</span> +<span id="L59" class="LineNr"> 59 </span> <span class="Normal">uint8_t</span> arg2 = <span class="Delimiter">(</span>modrm>><span class="Constant">3</span><span class="Delimiter">)</span>&<span class="Constant">0x7</span><span class="Delimiter">;</span> +<span id="L60" class="LineNr"> 60 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"subtract <a href='010core.cc.html#L15'>reg</a> "</span> << <a href='010core.cc.html#L220'>NUM</a><span class="Delimiter">(</span>arg2<span class="Delimiter">)</span> << <span class="Constant">" from effective address"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span> +<span id="L61" class="LineNr"> 61 </span> <span class="Normal">int32_t</span>* arg1 = <a href='011direct_addressing.cc.html#L26'>effective_address</a><span class="Delimiter">(</span>modrm<span class="Delimiter">);</span> +<span id="L62" class="LineNr"> 62 </span> <a href='010core.cc.html#L39'>BINARY_ARITHMETIC_OP</a><span class="Delimiter">(</span>-<span class="Delimiter">,</span> *arg1<span class="Delimiter">,</span> Reg[arg2]<span class="Delimiter">.</span><a href='010core.cc.html#L16'>i</a><span class="Delimiter">);</span> +<span id="L63" class="LineNr"> 63 </span> <span class="Identifier">break</span><span class="Delimiter">;</span> +<span id="L64" class="LineNr"> 64 </span><span class="Delimiter">}</span> +<span id="L65" class="LineNr"> 65 </span> +<span id="L66" class="LineNr"> 66 </span><span class="SalientComment">//:: and</span> +<span id="L67" class="LineNr"> 67 </span> +<span id="L68" class="LineNr"> 68 </span><span class="Delimiter">:(scenario and_r32_with_r32)</span> +<span id="L69" class="LineNr"> 69 </span><span class="Special">% Reg[0].i = 0x0a0b0c0d;</span> +<span id="L70" class="LineNr"> 70 </span><span class="Special">% Reg[3].i = 0x000000ff;</span> +<span id="L71" class="LineNr"> 71 </span><span class="Comment"># op ModR/M SIB displacement immediate</span> +<span id="L72" class="LineNr"> 72 </span> <span class="Constant">21</span> d8 <span class="Comment"># and EBX (reg 3) with destination EAX (reg 0)</span> +<span id="L73" class="LineNr"> 73 </span><span class="traceContains">+run: and <a href='010core.cc.html#L15'>reg</a> 3 with effective address</span> +<span id="L74" class="LineNr"> 74 </span><span class="traceContains">+run: effective address is <a href='010core.cc.html#L15'>reg</a> 0</span> +<span id="L75" class="LineNr"> 75 </span><span class="traceContains">+run: storing 0x0000000d</span> +<span id="L76" class="LineNr"> 76 </span> +<span id="L77" class="LineNr"> 77 </span><span class="Delimiter">:(before "End Single-Byte Opcodes")</span> +<span id="L78" class="LineNr"> 78 </span><span class="Normal">case</span> <span class="Constant">0x21</span>: <span class="Delimiter">{</span> <span class="Comment">// and r32 with r/m32</span> +<span id="L79" class="LineNr"> 79 </span> <span class="Normal">uint8_t</span> modrm = <a href='010core.cc.html#L202'>next</a><span class="Delimiter">();</span> +<span id="L80" class="LineNr"> 80 </span> <span class="Normal">uint8_t</span> arg2 = <span class="Delimiter">(</span>modrm>><span class="Constant">3</span><span class="Delimiter">)</span>&<span class="Constant">0x7</span><span class="Delimiter">;</span> +<span id="L81" class="LineNr"> 81 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"and <a href='010core.cc.html#L15'>reg</a> "</span> << <a href='010core.cc.html#L220'>NUM</a><span class="Delimiter">(</span>arg2<span class="Delimiter">)</span> << <span class="Constant">" with effective address"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span> +<span id="L82" class="LineNr"> 82 </span> <span class="Normal">int32_t</span>* arg1 = <a href='011direct_addressing.cc.html#L26'>effective_address</a><span class="Delimiter">(</span>modrm<span class="Delimiter">);</span> +<span id="L83" class="LineNr"> 83 </span> <a href='010core.cc.html#L49'>BINARY_BITWISE_OP</a><span class="Delimiter">(</span>&<span class="Delimiter">,</span> *arg1<span class="Delimiter">,</span> Reg[arg2]<span class="Delimiter">.</span><a href='010core.cc.html#L17'>u</a><span class="Delimiter">);</span> +<span id="L84" class="LineNr"> 84 </span> <span class="Identifier">break</span><span class="Delimiter">;</span> +<span id="L85" class="LineNr"> 85 </span><span class="Delimiter">}</span> +<span id="L86" class="LineNr"> 86 </span> +<span id="L87" class="LineNr"> 87 </span><span class="SalientComment">//:: or</span> +<span id="L88" class="LineNr"> 88 </span> +<span id="L89" class="LineNr"> 89 </span><span class="Delimiter">:(scenario or_r32_with_r32)</span> +<span id="L90" class="LineNr"> 90 </span><span class="Special">% Reg[0].i = 0x0a0b0c0d;</span> +<span id="L91" class="LineNr"> 91 </span><span class="Special">% Reg[3].i = 0xa0b0c0d0;</span> +<span id="L92" class="LineNr"> 92 </span><span class="Comment"># op ModR/M SIB displacement immediate</span> +<span id="L93" class="LineNr"> 93 </span> <span class="Error">09</span> d8 <span class="Comment"># or EBX (reg 3) with destination EAX (reg 0)</span> +<span id="L94" class="LineNr"> 94 </span><span class="traceContains">+run: or <a href='010core.cc.html#L15'>reg</a> 3 with effective address</span> +<span id="L95" class="LineNr"> 95 </span><span class="traceContains">+run: effective address is <a href='010core.cc.html#L15'>reg</a> 0</span> +<span id="L96" class="LineNr"> 96 </span><span class="traceContains">+run: storing 0xaabbccdd</span> +<span id="L97" class="LineNr"> 97 </span> +<span id="L98" class="LineNr"> 98 </span><span class="Delimiter">:(before "End Single-Byte Opcodes")</span> +<span id="L99" class="LineNr"> 99 </span><span class="Normal">case</span> <span class="Constant">0x09</span>: <span class="Delimiter">{</span> <span class="Comment">// or r32 with r/m32</span> +<span id="L100" class="LineNr">100 </span> <span class="Normal">uint8_t</span> modrm = <a href='010core.cc.html#L202'>next</a><span class="Delimiter">();</span> +<span id="L101" class="LineNr">101 </span> <span class="Normal">uint8_t</span> arg2 = <span class="Delimiter">(</span>modrm>><span class="Constant">3</span><span class="Delimiter">)</span>&<span class="Constant">0x7</span><span class="Delimiter">;</span> +<span id="L102" class="LineNr">102 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"or <a href='010core.cc.html#L15'>reg</a> "</span> << <a href='010core.cc.html#L220'>NUM</a><span class="Delimiter">(</span>arg2<span class="Delimiter">)</span> << <span class="Constant">" with effective address"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span> +<span id="L103" class="LineNr">103 </span> <span class="Normal">int32_t</span>* arg1 = <a href='011direct_addressing.cc.html#L26'>effective_address</a><span class="Delimiter">(</span>modrm<span class="Delimiter">);</span> +<span id="L104" class="LineNr">104 </span> <a href='010core.cc.html#L49'>BINARY_BITWISE_OP</a><span class="Delimiter">(</span>|<span class="Delimiter">,</span> *arg1<span class="Delimiter">,</span> Reg[arg2]<span class="Delimiter">.</span><a href='010core.cc.html#L17'>u</a><span class="Delimiter">);</span> +<span id="L105" class="LineNr">105 </span> <span class="Identifier">break</span><span class="Delimiter">;</span> +<span id="L106" class="LineNr">106 </span><span class="Delimiter">}</span> +<span id="L107" class="LineNr">107 </span> +<span id="L108" class="LineNr">108 </span><span class="SalientComment">//:: xor</span> +<span id="L109" class="LineNr">109 </span> +<span id="L110" class="LineNr">110 </span><span class="Delimiter">:(scenario xor_r32_with_r32)</span> +<span id="L111" class="LineNr">111 </span><span class="Special">% Reg[0].i = 0x0a0b0c0d;</span> +<span id="L112" class="LineNr">112 </span><span class="Special">% Reg[3].i = 0xaabbc0d0;</span> +<span id="L113" class="LineNr">113 </span><span class="Comment"># op ModR/M SIB displacement immediate</span> +<span id="L114" class="LineNr">114 </span> <span class="Constant">31</span> d8 <span class="Comment"># xor EBX (reg 3) with destination EAX (reg 0)</span> +<span id="L115" class="LineNr">115 </span><span class="traceContains">+run: xor <a href='010core.cc.html#L15'>reg</a> 3 with effective address</span> +<span id="L116" class="LineNr">116 </span><span class="traceContains">+run: effective address is <a href='010core.cc.html#L15'>reg</a> 0</span> +<span id="L117" class="LineNr">117 </span><span class="traceContains">+run: storing 0xa0b0ccdd</span> +<span id="L118" class="LineNr">118 </span> +<span id="L119" class="LineNr">119 </span><span class="Delimiter">:(before "End Single-Byte Opcodes")</span> +<span id="L120" class="LineNr">120 </span><span class="Normal">case</span> <span class="Constant">0x31</span>: <span class="Delimiter">{</span> <span class="Comment">// xor r32 with r/m32</span> +<span id="L121" class="LineNr">121 </span> <span class="Normal">uint8_t</span> modrm = <a href='010core.cc.html#L202'>next</a><span class="Delimiter">();</span> +<span id="L122" class="LineNr">122 </span> <span class="Normal">uint8_t</span> arg2 = <span class="Delimiter">(</span>modrm>><span class="Constant">3</span><span class="Delimiter">)</span>&<span class="Constant">0x7</span><span class="Delimiter">;</span> +<span id="L123" class="LineNr">123 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"xor <a href='010core.cc.html#L15'>reg</a> "</span> << <a href='010core.cc.html#L220'>NUM</a><span class="Delimiter">(</span>arg2<span class="Delimiter">)</span> << <span class="Constant">" with effective address"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span> +<span id="L124" class="LineNr">124 </span> <span class="Normal">int32_t</span>* arg1 = <a href='011direct_addressing.cc.html#L26'>effective_address</a><span class="Delimiter">(</span>modrm<span class="Delimiter">);</span> +<span id="L125" class="LineNr">125 </span> <a href='010core.cc.html#L49'>BINARY_BITWISE_OP</a><span class="Delimiter">(</span>^<span class="Delimiter">,</span> *arg1<span class="Delimiter">,</span> Reg[arg2]<span class="Delimiter">.</span><a href='010core.cc.html#L17'>u</a><span class="Delimiter">);</span> +<span id="L126" class="LineNr">126 </span> <span class="Identifier">break</span><span class="Delimiter">;</span> +<span id="L127" class="LineNr">127 </span><span class="Delimiter">}</span> +<span id="L128" class="LineNr">128 </span> +<span id="L129" class="LineNr">129 </span><span class="SalientComment">//:: not</span> +<span id="L130" class="LineNr">130 </span> +<span id="L131" class="LineNr">131 </span><span class="Delimiter">:(scenario not_r32)</span> +<span id="L132" class="LineNr">132 </span><span class="Special">% Reg[3].i = 0x0f0f00ff;</span> +<span id="L133" class="LineNr">133 </span><span class="Comment"># op ModR/M SIB displacement immediate</span> +<span id="L134" class="LineNr">134 </span> f7 c3 <span class="Comment"># not EBX (reg 3)</span> +<span id="L135" class="LineNr">135 </span><span class="traceContains">+run: 'not' of effective address</span> +<span id="L136" class="LineNr">136 </span><span class="traceContains">+run: effective address is <a href='010core.cc.html#L15'>reg</a> 3</span> +<span id="L137" class="LineNr">137 </span><span class="traceContains">+run: storing 0xf0f0ff00</span> +<span id="L138" class="LineNr">138 </span> +<span id="L139" class="LineNr">139 </span><span class="Delimiter">:(before "End Single-Byte Opcodes")</span> +<span id="L140" class="LineNr">140 </span><span class="Normal">case</span> <span class="Constant">0xf7</span>: <span class="Delimiter">{</span> <span class="Comment">// xor r32 with r/m32</span> +<span id="L141" class="LineNr">141 </span> <span class="Normal">uint8_t</span> modrm = <a href='010core.cc.html#L202'>next</a><span class="Delimiter">();</span> +<span id="L142" class="LineNr">142 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"'not' of effective address"</span> << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span> +<span id="L143" class="LineNr">143 </span> <span class="Normal">int32_t</span>* arg1 = <a href='011direct_addressing.cc.html#L26'>effective_address</a><span class="Delimiter">(</span>modrm<span class="Delimiter">);</span> +<span id="L144" class="LineNr">144 </span> *arg1 = ~<span class="Delimiter">(</span>*arg1<span class="Delimiter">);</span> +<span id="L145" class="LineNr">145 </span> <a href='003trace.cc.html#L160'>trace</a><span class="Delimiter">(</span><span class="Constant">2</span><span class="Delimiter">,</span> <span class="Constant">"run"</span><span class="Delimiter">)</span> << <span class="Constant">"storing 0x"</span> << <a href='010core.cc.html#L218'>HEXWORD</a> << *arg1 << <a href='003trace.cc.html#L184'>end</a><span class="Delimiter">();</span> +<span id="L146" class="LineNr">146 </span> SF = <span class="Delimiter">(</span>*arg1 >> <span class="Constant">31</span><span class="Delimiter">);</span> +<span id="L147" class="LineNr">147 </span> <a href='010core.cc.html#L30'>ZF</a> = <span class="Delimiter">(</span>*arg1 == <span class="Constant">0</span><span class="Delimiter">);</span> +<span id="L148" class="LineNr">148 </span> <a href='010core.cc.html#L31'>OF</a> = <span class="Constant">false</span><span class="Delimiter">;</span> +<span id="L149" class="LineNr">149 </span> <span class="Identifier">break</span><span class="Delimiter">;</span> +<span id="L150" class="LineNr">150 </span><span class="Delimiter">}</span> </pre> </body> </html> |