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authorCrystal <crystal@wizard.tower>2024-02-24 18:23:19 +0100
committerCrystal <crystal@wizard.tower>2024-02-24 18:23:19 +0100
commit059c5ab9a67e2ddf45fffc792bcc53b177c87dfe (patch)
treee0e0606d10ec87a0c87691f36f485e1247ea3d61 /src/org
parentb56073daf271031c8e8a2b0d84df81383eea7eca (diff)
downloadwww-059c5ab9a67e2ddf45fffc792bcc53b177c87dfe.tar.gz
Add stuff
Diffstat (limited to 'src/org')
-rw-r--r--src/org/blog/assembly/1.org50
1 files changed, 50 insertions, 0 deletions
diff --git a/src/org/blog/assembly/1.org b/src/org/blog/assembly/1.org
index f5a1a59..daa4976 100644
--- a/src/org/blog/assembly/1.org
+++ b/src/org/blog/assembly/1.org
@@ -57,3 +57,53 @@ ADD AX, AX ;(AX = AX + AX)
 #+BEGIN_SRC asm
 MOV BL, [500] ;(BL = 500H)
 #+END_SRC
+
+*CX*: This is the counter register. It is of 16 bits and is divided into two 8-bit registers CH and CL to also perform 8-bit instructions. It is used in looping and rotation. Example:
+#+BEGIN_SRC asm
+MOV CX, 0005
+LOOP
+#+END_SRC
+
+*DX*: This is the data register. It is of 16 bits and is divided into two 8-bit registers DH and DL to also perform 8-bit instructions. It is used in the multiplication and input/output port addressing. Example:
+#+BEGIN_SRC asm
+MUL BX (DX, AX = AX * BX)
+#+END_SRC
+
+*** Offset/Address Registers
+*SP*: This is the stack pointer. It is of 16 bits. It points to the topmost item of the stack. If the stack is empty the stack pointer will be (FFFE)H (or 65534 in decimal). Its offset address is relative to the stack segment(SS).
+
+*BP*: This is the base pointer. It is of 16 bits. It is primarily used in accessing parameters passed by the stack. Its offset address is relative to the stack segment(SS).
+
+*SI*: This is the source index register. It is of 16 bits. It is used in the pointer addressing of data and as a source in some string-related operations. Its offset is relative to the data segment(DS).
+
+*DI*: This is the destination index register. It is of 16 bits. It is used in the pointer addressing of data and as a destination in some string-related operations. Its offset is relative to the extra segment(ES).
+
+*** Segment Registers
+*CS*: Code Segment, it defines the start of the program memory, and the different addresses of the different instructions relative to CS.
+
+*DS*: Data Segment, defines the start of the data memory where we store all data processed by the program.
+
+*SS*: Stack Segment, or the start of the pile. The pile is a memory zone that is managed in a particular way, it's like a pile of plates, where we can only remove and add plates on top of the pile. Only one address register is enough to manage it, its the stack pointer SP. We say that this pile is a LIFO pile (Last IN, First OUT)
+
+*EX*: The start of an auxiliary segment for data
+
+** The format of an address:
+An Address must have this fellowing form [RS : RO] with the following possibilities:
+
+- A value : Nothing
+- ES : DI
+- CS : SI
+- ES : BP
+- DS : BX
+
+*** Note 1 :
+When the register isn't specified. the CPU adds it depending on the offset used :
+
+- If the offset is : DI SI or BX, the Segment used is DS.
+- If its BP, then the segment is SS.
+
+*** Note 2 :
+Apparently we will assume that we are in the DS segment and only access to memory using the offset.
+
+*** Note 3 :
+The values of the registers CS DS and SS are automatically initialized by the OS when launching the program. So these segments are implicit. AKA : If we want to access a specific data in memory, we just need to specify its offset.