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:(before "End Initialize Op Names")
put_new(Name, "05", "add imm32 to EAX (add)");
:(before "End Single-Byte Opcodes")
case 0x05: { // add imm32 to EAX
int32_t signed_arg2 = next32();
trace(Callstack_depth+1, "run") << "add imm32 0x" << HEXWORD << signed_arg2 << " to EAX" << end();
int32_t signed_result = Reg[EAX].i + signed_arg2;
SF = (signed_result < 0);
ZF = (signed_result == 0);
int64_t signed_full_result = static_cast<int64_t>(Reg[EAX].i) + signed_arg2;
OF = (signed_result != signed_full_result);
// set CF
uint32_t unsigned_arg2 = static_cast<uint32_t>(signed_arg2);
uint32_t unsigned_result = Reg[EAX].u + unsigned_arg2;
uint64_t unsigned_full_result = static_cast<uint64_t>(Reg[EAX].u) + unsigned_arg2;
CF = (unsigned_result != unsigned_full_result);
trace(Callstack_depth+1, "run") << "SF=" << SF << "; ZF=" << ZF << "; CF=" << CF << "; OF=" << OF << end();
Reg[EAX].i = signed_result;
trace(Callstack_depth+1, "run") << "storing 0x" << HEXWORD << Reg[EAX].i << end();
break;
}
:(code)
void test_add_imm32_to_EAX_signed_overflow() {
Reg[EAX].i = 0x7fffffff; // largest positive signed integer
run(
"== code 0x1\n"
// op ModR/M SIB displacement immediate
" 05 01 00 00 00 \n" // add 1 to EAX
);
CHECK_TRACE_CONTENTS(
"run: add imm32 0x00000001 to EAX\n"
"run: SF=1; ZF=0; CF=0; OF=1\n"
"run: storing 0x80000000\n"
);
}
void test_add_imm32_to_EAX_unsigned_overflow() {
Reg[EAX].u = 0xffffffff; // largest unsigned number
Reg[EBX].u = 1;
run(
"== code 0x1\n"
// op ModR/M SIB displacement immediate
" 05 01 00 00 00 \n" // add 1 to EAX
);
CHECK_TRACE_CONTENTS(
"run: add imm32 0x00000001 to EAX\n"
"run: SF=0; ZF=1; CF=1; OF=0\n"
"run: storing 0x00000000\n"
);
}
void test_add_imm32_to_EAX_unsigned_and_signed_overflow() {
Reg[EAX].u = 0x80000000; // smallest negative signed integer
run(
"== code 0x1\n"
// op ModR/M SIB displacement immediate
" 05 00 00 00 80 \n" // add 0x80000000 to EAX
);
CHECK_TRACE_CONTENTS(
"run: add imm32 0x80000000 to EAX\n"
"run: SF=0; ZF=1; CF=1; OF=1\n"
"run: storing 0x00000000\n"
);
}
//:
:(before "End Initialize Op Names")
put_new(Name, "81", "combine rm32 with imm32 based on subop (add/sub/and/or/xor/cmp)");
:(code)
void test_add_imm32_to_r32() {
Reg[EBX].i = 1;
run(
"== code 0x1\n"
// op ModR/M SIB displacement immediate
" 81 c3 0a 0b 0c 0d\n" // add 0x0d0c0b0a to EBX
// ModR/M in binary: 11 (direct mode) 000 (subop add) 011 (dest EBX)
);
CHECK_TRACE_CONTENTS(
"run: combine r/m32 with imm32\n"
"run: r/m32 is EBX\n"
"run: imm32 is 0x0d0c0b0a\n"
"run: subop add\n"
"run: storing 0x0d0c0b0b\n"
);
}
:(before "End Single-Byte Opcodes")
case 0x81: { // combine r/m32 with imm32
trace(Callstack_depth+1, "run") << "combine r/m32 with imm32" << end();
const uint8_t modrm = next();
int32_t* signed_arg1 = effective_address(modrm);
const int32_t signed_arg2 = next32();
trace(Callstack_depth+1, "run") << "imm32 is 0x" << HEXWORD << signed_arg2 << end();
const uint8_t subop = (modrm>>3)&0x7; // middle 3 'reg opcode' bits
switch (subop) {
case 0: {
trace(Callstack_depth+1, "run") << "subop add" << end();
int32_t signed_result = *signed_arg1 + signed_arg2;
SF = (signed_result < 0);
ZF = (signed_result == 0);
int64_t signed_full_result = static_cast<int64_t>(*signed_arg1) + signed_arg2;
OF = (signed_result != signed_full_result);
// set CF
uint32_t unsigned_arg1 = static_cast<uint32_t>(*signed_arg1);
uint32_t unsigned_arg2 = static_cast<uint32_t>(signed_arg2);
uint32_t unsigned_result = unsigned_arg1 + unsigned_arg2;
uint64_t unsigned_full_result = static_cast<uint64_t>(unsigned_arg1) + unsigned_arg2;
CF = (unsigned_result != unsigned_full_result);
trace(Callstack_depth+1, "run") << "SF=" << SF << "; ZF=" << ZF << "; CF=" << CF << "; OF=" << OF << end();
*signed_arg1 = signed_result;
trace(Callstack_depth+1, "run") << "storing 0x" << HEXWORD << *signed_arg1 << end();
break;
}
// End Op 81 Subops
default:
cerr << "unrecognized subop for opcode 81: " << NUM(subop) << '\n';
exit(1);
}
break;
}
:(code)
void test_add_imm32_to_r32_signed_overflow() {
Reg[EBX].i = 0x7fffffff; // largest positive signed integer
run(
"== code 0x1\n"
// op ModR/M SIB displacement immediate
" 81 c3 01 00 00 00\n" // add 1 to EBX
// ModR/M in binary: 11 (direct mode) 000 (subop add) 011 (dest EBX)
);
CHECK_TRACE_CONTENTS(
"run: combine r/m32 with imm32\n"
"run: r/m32 is EBX\n"
"run: imm32 is 0x00000001\n"
"run: subop add\n"
"run: SF=1; ZF=0; CF=0; OF=1\n"
"run: storing 0x80000000\n"
);
}
void test_add_imm32_to_r32_unsigned_overflow() {
Reg[EBX].u = 0xffffffff; // largest unsigned number
run(
"== code 0x1\n"
// op ModR/M SIB displacement immediate
" 81 c3 01 00 00 00\n" // add 1 to EBX
// ModR/M in binary: 11 (direct mode) 011 (subop add) 011 (dest EBX)
);
CHECK_TRACE_CONTENTS(
"run: combine r/m32 with imm32\n"
"run: r/m32 is EBX\n"
"run: imm32 is 0x00000001\n"
"run: subop add\n"
"run: SF=0; ZF=1; CF=1; OF=0\n"
"run: storing 0x00000000\n"
);
}
void test_add_imm32_to_r32_unsigned_and_signed_overflow() {
Reg[EBX].u = 0x80000000; // smallest negative signed integer
run(
"== code 0x1\n"
// op ModR/M SIB displacement immediate
" 81 c3 00 00 00 80\n" // add 0x80000000 to EBX
// ModR/M in binary: 11 (direct mode) 011 (subop add) 011 (dest EBX)
);
CHECK_TRACE_CONTENTS(
"run: combine r/m32 with imm32\n"
"run: r/m32 is EBX\n"
"run: imm32 is 0x80000000\n"
"run: subop add\n"
"run: SF=0; ZF=1; CF=1; OF=1\n"
"run: storing 0x00000000\n"
);
}
//:
:(code)
void test_add_imm32_to_mem_at_r32() {
Reg[EBX].i = 0x2000;
run(
"== code 0x1\n"
// op ModR/M SIB displacement immediate
" 81 03 0a 0b 0c 0d \n" // add 0x0d0c0b0a to *EBX
// ModR/M in binary: 00 (indirect mode) 000 (subop add) 011 (dest EBX)
"== data 0x2000\n"
"01 00 00 00\n" // 0x00000001
);
CHECK_TRACE_CONTENTS(
"run: combine r/m32 with imm32\n"
"run: effective address is 0x00002000 (EBX)\n"
"run: imm32 is 0x0d0c0b0a\n"
"run: subop add\n"
"run: storing 0x0d0c0b0b\n"
);
}
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